SS6526-1CNTR

SS6526 Dual USB High-Side Power Switch FEATURES • 110mΩ (5V Input) High-Side MOSFET Switch. 500mA Continuous Load Current per Channel. 110µA Typical On-State Supply Current. 1µA Typical Off-State Supply Current. Current-Limit / Short Circuit Protection. Thermal Shutdown Protection under Overcurrent Condition. Undervoltage Lockout Ensures that Switch is off at Start Up. Output can be Forced Higher than Input DESCRIPTION The SS6526 is a dual high-side power switch for self-powered and bus-powered Universal Serial Bus (USB) applications. Both high-side switches are MOSFET with 110m Ω RDS(ON), which meets USB voltage drop requirements for maximum transmission wire length. Multi-purpose indicates open-drain fault flag output thermal over-current limiting, shutdown, or undervoltage lockout for each channel. Output current is typically limited to 1A, and the thermal shutdown functions of the power switches independently control their channel under overcurrent condition. Guaranteed minimum output rise time limits inrush current during hot plug-in as well as minimizing EMI and prevents the voltage at upstream port from dropping excessively. (Off-State). Open-Drain Fault Flag. Slow Turn ON and Fast Turn OFF. Enable Active-High or Active-Low. APPLICATIONS USB Power Management. Hot Plug-In Power Supplies. Battery-Charger Circuit. Pb-free; RoHS-compliant 10/23/2007 Rev.1.00 www.SiliconStandard.com 1 SS6526 TYPICAL APPLICATION CIRCUIT VCC 5.0V 4.50V to 5.25V Upstream VBUS 100mA max VBUS D+ DGND + 1µF CIN + 33µF 10K 10K SS6722 IN OUT USB Controller VIN ON/OFF AIC1526 CTLA FLGA FLGB OUTA IN GND 0.1µF VBUS + 33µF D+ DGND Ferrite Bead + GND 10µF COUT OVERCURRENT OVERCURRENT ON/ GND * 0.01µF CTLB OUTB DATA DATA * 33µF, 16V Tantalum, or 100µF, 10V Electrolytic Bold line indicate high- current traces + 33µF * 0.01µF VBUS D+ DGND DATA Two-Port Self-Powered Hub ORDERING INFORMATION SS6526 - XXXXX PACKING TYPE TR: TAPE & REEL TB: TUBE PACKAGING TYPE N: DIP-8 S: SOP-8 O: MSOP-8 C: Commercial G: Lead Free Commercial CONTROL POLARITY 0: Active Low 1: Active High Example: SS6526-0CSTR Active Low Version, in SOP-8 Package & Taping & Reel Packing Type (CN is not available in TR packing) SS6526-1PSTR Active High Version, in Lead Free SOP-8 Package & Taping & Reel Packing Type PIN CONFIGURATION DIP-8 SOP-8 TOP VIEW CTLA 1 FLGA 2 FLGB 3 CTLB 4 MSOP-8 TOP VIEW CTLA 1 FLGA 2 FLGB 3 CTLB 4 8 OUTA 7 IN 6 OUTB 5 GND 8 OUTA 7 IN 6 GND 5 OUTB 10/23/2007 Rev.1.00 www.SiliconStandard.com 2 SS6526 ABSOLUTE MAXIMUM RATINGS Supply Voltage (VIN) Fault Flag Voltage (VFLG) Fault Flag Current (IFLG) Control Input (VCTL) Operating Temperature Range Junction Temperature Storage Temperature Range Lead Temperature (Soldering, 10sec) Thermal Resistance, θJA (Junction to Ambient) DIP-8 (Assume no Ambient Airflow, no Heatsink) Thermal Resistance, θJC (Junction to Case) SOP-8 MSOP-8 7.0V 7.0V 50mA -0.3V ~7V -40°C~85°C 125°C -65°C ~ 150°C 260°C 100°C/W 160°C/W 180°C/W DIP-8……………………………………..60°C /W SOP-8……………………………………40°C /W MSOP-8………………………………….75°C /W Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. TEST CIRCUIT 10K R1 10K R2 ON 10Ω VCC +5V CTLA OFF OUTA IN R4 FLGA 0.1µF C1 FLGB ON GND OUTB 10Ω R4 CTLB OFF SS6526 10/23/2007 Rev.1.00 www.SiliconStandard.com 3 SS6526 ELECTRICAL CHARACTERISTICS (VIN= 5V, TA=25°C, unless otherwise specified.) (Note 1) PARAMETERS Supply Current Control Input Voltage Control Input Current Control Input Capacitance Output MOSFET Resistance Output Turn-On Rise Delay Output Turn-On Rise Time Output Turn-Off Delay Output Turn-Off Fall Time Output Leakage Current Current Limit Threshold Over Temperature Shutdown Threshold Error Flag Output Resistance Error Flag Off Current UVLO Threshold TJ Increasing TJ Decreasing VIN = 5V, IL =10 mA VIN = 3.3V, IL =10mA VFLG = 5V VIN Increasing VIN Decreasing 0.6 1.0 135 125 10 15 0.01 2.6 2.4 25 40 1 µA V RL = 10Ω each Output RL = 10Ω each Output RL = 10Ω each Output RL = 10Ω each Output CONDITIONS VCTL =Logic “0”, OUT=Open VCTL =Logic “1”, OUT=Open VCTL =Logic “0” VCTL =Logic “1” VCTL =Logic “0” VCTL =Logic “1” 2.4 0.01 0.01 1 110 100 1000 0.8 0.7 2500 20 20 10 1.25 150 1 1 MIN. TYP. 0.75 110 MAX. 5 160 0.8 UNIT µA V µA pF mΩ µS µS µS µS µA A °C Ω Note 1: Specifications are production tested at TA=25°C. Specifications over the -40°C to 85°C operating temperature range are assured by design, characterization and correlation with Statistical Quality Controls (SQC). 10/23/2007 Rev.1.00 www.SiliconStandard.com 4 SS6526 TYPICAL PERFORMANCE CHARACTERISTICS 118 116 150 140 ON Resistance (m Ω) 114 112 110 108 106 104 3.0 3.5 RL=47Ω TA=25°C ON Resistance (m Ω) 130 120 110 100 90 80 RL=47Ω TA=25°C 4.0 4.5 5.0 5.5 -40 -20 0 20 40 60 80 100 Supply Voltage (V) Fig. 1 ON Resistance vs. Supply Voltage 3.0 160 Temperature (°C) Fig. 2 Output On Resistance vs. Temperature Threshold Voltage (V) 2.8 140 Rising 2.6 Supply Current (µA) 120 2.4 Falling 100 2.2 Both Switches ON 80 2.0 -40 -20 0 20 40 60 80 100 60 3 4 5 6 7 8 Temperature (°C) Fig. 3 UVLO Threshold Voltage vs. Temperature 130 Supply Voltage (V) Fig. 4 ON-State Supply Current vs. Supply Voltage 0.10 Supply Current (µA) Supply Current (µA) 120 0.08 110 0.06 Both Switches ON 100 Both Switches OFF 0.04 90 0.02 80 -40 -20 0 20 40 60 80 100 0 -40 -20 0 20 40 60 80 100 Temperature (°C) Fig. 5 ON State Current vs. Temperature Temperature (°C) Fig. 6 OFF-State Current vs. Temperature 10/23/2007 Rev.1.00 www.SiliconStandard.com 5 SS6526 TYPICAL PERFORMANCE CHARACTERISTICS 0.10 1.7 1.6 0.08 (Continued) Supply Current (µA) 0.06 Enable voltage 1.5 1.4 1.3 VEN Rising Both Switches OFF 0.04 VEN Falling 1.2 1.1 0.02 0 3 4 5 6 7 8 1.0 3.0 3.5 4.0 4.5 5.0 5.5 Supply Voltage (V) Fig. 7 OFF-State Current vs. Supply Voltage Supply Voltage (V) Fig. 8 Control Threshold vs. Supply Voltage 6 Control (V) 4 FLG VOUT 2 0 5 1A RL=47Ω Output (V) 3 1 -1 0.0 0.5 1.0 IOUT 2.0 2.5 1.5 Time (mS) Fig. 9 Turn-On, Turn-Off Characteristics Fig. 10 Current Limit Response 10/23/2007 Rev.1.00 www.SiliconStandard.com 6 SS6526 BLOCK DIAGRAM OUTA FLGA Driver CTLA Charge Pump Thermal Shutdown Current Limit CS Power N-MOSFET UVLO IN Power N-MOSFET OUTB Charge Pump CTLB FLGB Current Limit CS Driver PIN DESCRIPTIONS PIN 1: CTLA - Controls the turn-on/turn-off of channel A MOSFET with TTL as a control input. Active high for SS6526-1 and active low for SS6526-0. PIN 2: FLGA - An active-low and open-drained fault flag output for channel A. FLGA is an indicator for current limit when CTLA is active. In normal mode operation (CTLA or/and CLTB is active), it also can indicate thermal shutdown or undervoltage. PIN 3: FLGB - An active-low and open-drained fault flag output for channel B. FLGB is an indicator for current limit when CTLB is active. In normal mode operation (CTLB or/and CLTA is active), it also can indicate thermal shutdown or undervoltage. PIN 4: CTLB - Controls the turn-on/turn-off of channel B MOSFET with TTL as a control input. Active High for SS6526-1 and active low for SS6526-0. PIN 5: OUTB - Channel B MOSFET switch output. PIN 6: GND PIN 7: IN - Chip power ground. - Power supply input. PIN 8: OUTA - Channel A MOSFET switch output. 10/23/2007 Rev.1.00 www.SiliconStandard.com 7 SS6526 APPLICATION INFORMATION Error Flag An error Flag is an open-drained output of an N-channel MOSFET. FLG output is pulled low to signal the following fault conditions: input undervoltage, output current limit, and thermal shutdown. Supply Filtering A 0.1µF to 1µF bypass capacitor from IN to GND, located near the device, is strongly recommended to control supply transients. Without a bypass capacitor, an output short may cause sufficient ringing on the input (from supply lead inductance) to damage internal control circuitry. Current Limit The current limit threshold is preset internally. It protects the output MOSFET switches from damage resulting from undesirable short circuit conditions or excess inrush current, which is often encountered during hot plug-in. The low limit of the current limit threshold of the SS6526 allows a minimum current of 0.6A through the MOSFET switches. The error flag signals when any current limit conditions occur. Transient Requirements USB supports dynamic attachment (hot plug-in) of peripherals. A current surge is caused by the input capacitance of downstream device. Ferrite beads are recommended in series with all power and ground connector pins. Ferrite beads reduce EMI and limit the inrush current during hot-attachment by filtering high-frequency signals. Thermal Shutdown When temperature of S S 6 526 exceeds 135°C for any reasons, the thermal shutdown function turns both MOSFET switches off and signals the error flag. A hysteresis of 10°C prevents the MOSFETs from turning back on until the chip temperature drops below 125°C. However, if thermal shutdown is triggered by chip temperature rise resulting from overcurrent fault condition of either one of the MOSFET switches, the thermal shutdown function will only turn off the switch that is in overcurrent condition and the other switch can still remain its normal operation. In other words, the thermal shutdown function of the two switches is independent of each other in the case of overcurrent fault. Short Circuit Transient Bulk capacitance provides the short-term transient current needed during a hot-attachment event. A 33µF/16V tantalum or a 100µF/10V electrolytic capacitor mounted close to downstream connector each port should provide transient drop protection. Printed Circuit Layout The power circuitry of USB printed circuit boards requires a customized layout to maximize thermal dissipation and to minimize voltage drop and EMI. 10/23/2007 Rev.1.00 www.SiliconStandard.com 8 SS6526 APPLICATION CIRCUIT USB Controller AIC1526 Vbus 1 2 CTLA FLGA FLGB CTLB OUTA IN 8 7 Vbus USB Host 3 4.7uF GND OUTB 6 5 0.1uF 33uF Downstream USB Device 4 GND Cable GND Bus Powered Hub Cable Fig. 11 Soft Start (Single Channel) SS6526 Vbus 1 2 USB Host 3 4.7uF 4 CTLA FLGA FLGB CTLB OUTA IN GND OUTB 33uF GND Cable USB Peripheral USB Controller 8 7 6 0.1uF 5 33uF USB Device USB Device Fig. 12 Inrush Current-Limit Application 10/23/2007 Rev.1.00 www.SiliconStandard.com 9 SS6526 PHYSICAL DIMENSIONS (unit: mm) SOP-8 D S Y M B O L SOP-8 MILLIMETERS MIN. 1.35 0.10 0.33 0.19 4.80 3.80 1.27 BSC 5.80 0.25 0.40 0° 6.20 0.50 1.27 8° MAX. 1.75 0.25 0.51 0.25 5.00 4.00 H E A A1 B C h X 45° D SEE VIEW B A A e E e H A h L B A1 θ C WITH PLATING BASE METAL 0.25 GAUGE PLANE SEATING PLANE L VIEW B Note: 1.Refer to JEDEC MS-012AA. 2.Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3.Dimension “E” does not include inter-lead flash or protrusions. Inter-lead flash or protrusion shall not exceed 10 mil per side. 4.Controlling dimension is millimeter, converted inch dimensions are not necessarily exact. 10/23/2007 Rev.1.00 θ www.SiliconStandard.com 10 SS6526 DIP-8 D E GAUGE PLANE S Y M B O L DIP-8 MILLIMETERS MIN. MAX. 5.33 0.38 2.92 0.36 1.14 0.20 9.01 0.13 7.62 6.10 2.54 BSC 7.62 BSC 10.92 2.92 3.81 8.26 7.11 4.95 0.56 1.78 0.35 10.16 E1 A A1 A2 b 0.38 eA eB A2 A b2 c D D1 b WITH PLATING E E1 e eA A A A1 L BASE METAL SECTION A-A D1 b2 e c eB L Note: 1.Refer to JEDEC MS-001BA. 2.Dimension D, D1 and E1 do not include mold flash or protrusions. Mold flash or protrusion shall not exceed 10 mil. 3.Controlling dimension is millimeter, converted inch dimensions are not necessarily exact. 10/23/2007 Rev.1.00 www.SiliconStandard.com 11 SS6526 MSOP-8 D S Y M B O L MSOP-8 MILLIMETERS MIN. MAX. 1.10 0.05 0.75 0.25 0.13 2.90 4.90 BSC 2.90 0.65 BSC 0.40 0° 0.70 6° 3.10 0.15 0.95 0.40 0.23 3.10 A E1 E A1 A2 b c D AA A2 e SEE VIEW B E E1 e A L θ A1 b WITH PLATING 0.25 BASE METAL SECTION A-A L VIEW B Note: 1. Refer to JEDEC MO-187AA. 2. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusion or gate burrs shall not exceed 6 mil per side. 3. Dimension “E” does not include inter-lead flash or protrusions. Inter-lead flash and protrusions shall not exceed 10 mil per side. 4. Controlling dimension is millimeter, converted inch dimensions are not necessarily exact. Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 10/23/2007 Rev.1.00 θ www.SiliconStandard.com c 12