SS6550

SS6550 Low-Noise Synchronous PWM Step-Down DC/DC Converter n FEATURES l l l l n DESCRIPTION The SS6550 is a low-noise pulse-widthmodulated (PWM) DC/DC step-down converter, which can power logic circuits and transmitters in small wireless systems such as communicating PDAs, cellular phones and handy-terminals. The device features an internal synchronous rectifier for high conversion efficiency. Excellent noise characteristics and fixed-frequency operation provide easy post-filtering. The SS6550 is ideally suited for Li-Ion battery applications. It is also suitable for +3V or +5V fixed input applications. The device operates in one of the following four modes. Forced PWM mode operates at a fixed frequency regardless of the load. Synchronizable PWM mode allows the synchronization of an external switching frequency and minimizes harmonics. PWM/PFM Mode extends battery life by switching to a PFM pulse-skipping mode under light loads. Shutdown mode places the device in standby, reducing supply current to under 0.1µA. The SS6550 can deliver over 800mA of output current. The output voltage can be adjusted from 0.75V to VIN with the input range of +2.5V to +5.5V. Other features of the SS6550 include low quiescent current, low dropout voltage, and a ±1.2% accuracy 0.75V reference. It is available in a space-saving 8-pin MSOP package. L1 * 10µF R1 560K CF 15P + CO1 33µF CO2 4.7 µF VOUT = 1.8V l l l l l Greater than 95% efficiency. Guaranteed output current of 800mA. 100% duty cycle in dropout. Fixed 500 KHz or adjustable frequency sychronous PWM operation. Very low quiescent current of 35µA (typ.). Adjustable output voltage from 0.75V to VIN, ranging from 2.5V to 5.5V. Accurate reference: 0.75V (±1.2%). Synchronizable external switching frequency up to 1MHz. Small 8-Pin MSOP package. n APPLICATIONS l l l l l l l l PDAs. Handy-terminals. WLAN cards Cellular phones. CPU I/O supplies. Cordless phones. Notebook chipset supplies. Battery-operated devices (3 or 1 Li-Ion/NiMH/ NiCd Cells). n TYPICAL APPLICATION CIRCUIT VIN= 2.5V to 5.5V 1 2 3 4 CBP 0.1µF SHDN FB VIN BP LX 8 BP + CIN 10µF GND 7 SYNC/ 6 MODE 1N5819 Optional RT 5 SS6550 R2 400K Rev.2.01 6/06/2003 www.SiliconStandard.com 1 of 13 SS6550 n ORDERING INFORMATION SS6550CXXX P ACKING TYPE TR: TAPE & REEL TB: TUBE PACKAGE TYPE O: MSOP8 Example: SS6550COTR à in MSOP package in tape & reel PIN CONFIGURATION TOP VIEW V IN BP 1 2 8 LX 7 G ND 6 SYNC/MODE 5 RT S HDN 3 FB 4 n ABSOLUTE MAXIMUM RATINGS VIN, BP, SHDN, SYNC/MODE, RT to GND BP to VIN LX to GND FB to GND Operating Temperature Range Storage Temperature Range -0.3 to +6V .-0.3 to 0.3V -0.3 to (VIN+0.3V) -0.3 to (VBP+0.3V) -40°C ~ 85°C - 40°C ~ 150°C Rev.2.01 6/06/2003 www.SiliconStandard.com 2 of 13 SS6550 n ELECTRICAL CHARACTERISTICS (VIN=+3.6V, TA=+25°C, SYNC/MODE =GND, SHDN =IN, unless otherwise specified.) PARAMETER Input Voltage Range Output Adjustment Range Feedback Voltage Line Regulation Load Regulation SYMBOL CONDITIONS VIN VOUT VFB Duty Cycle = 100% to 23% IOUT = 0 to 800mA (Note 1) MIN 2.5 VREF 0.735 TYP MAX 5.5 VIN UNITS V V % %/A 0.75 +1 -1.3 0.765 FB Input Current IFB VFB = 1.4V, VIN = 3.6V VIN = 2.5V VIN = 3.6V VIN = 2.5V -50 0.01 0.32 0.38 0.32 0.38 50 0.65 0.65 nA Ω Ω A µA µA µA KHz KHz % P-channel On-Resistance PRDS(ON) ILX = 100mA N-channel On-Resistance NRDS(ON) ILX = 100mA P-channel Current-Limit Threshold Quiescent Current Shutdown Supply Current LX Leakage Current Oscillator Frequency SYNC Capture Range Maximum Duty Cycle Undervoltage Lockout Threshold Logic Input High Logic Input Low Logic Input Current SYNC/MODE Minimum Pulse Width Note 1: dutyMAX UVLO VIH VIL f OSC 0.85 SYNC/MODE = GND, VFB = 1.4V, LX unconnected SHDN = LX = GND, includes LX 1.2 35 0.1 1.55 70 1 20 600 1000 leakage current VIN = 5.5V, VLX = 0 or 5.5V -20 400 500 100 VIN rising, typical hysteresis is 85mV SHDN , SYNC/MODE, LIM SHDN , SYNC/MODE, LIM SHDN , SYNC/MODE, LIM 0.1 500 2.0 2 2.2 2.4 V V 0.4 -1 500 0.1 1 V µA ns High or low Specifications to -40°C are guaranteed by design, not production tested. Rev.2.01 6/06/2003 www.SiliconStandard.com 3 of 13 SS6550 n TYPICAL PERFORMANCE CHARACTERISTICS 90 100 (TA=25oC, VIN=3.6V, SYNC/MODE=GND, L = Coilcraft DS1608C-103, unless otherwise noted.) VOUT=0.9 85 95 90 VIN=2.7V (%) (%) Efficiency 80 75 70 65 60 VIN=2.7V 85 80 75 70 65 60 10 100 10 Efficiency VIN=4.2V VIN=3.3V VIN=3.6V VOUT=1.5V VIN=3.3V VIN=3.6V VIN=4.2V 10 100 1000 Load Current (mA) Fig. 1 Load Current vs. Efficiency (VOUT=0.9V) Fig. 2 Load Current (mA) Load Current vs. Efficiency (VOUT=2.7V) 100 100 VIN=2.7V 95 90 95 90 VIN=3.3V (%) 85 80 (%) Efficiency VIN=4.2V VIN=3.6V VIN=3.3V VOUT=1.8V 10 100 1000 85 80 75 70 65 60 10 100 1000 Efficiency 75 70 65 60 VIN=3.6V VIN=4.2V VOUT=2.5V Load Current (mA) Fig. 3 Load Current vs. Efficiency (VOUT=1.8V) Fig. 4 Load Current (mA) Load Current vs. Efficiency (VOUT=2.5V) 100 95 90 100 95 90 VIN=3.6V (%) 85 80 75 70 65 60 10 100 1000 (%) Efficiency 85 80 75 70 Efficiency VIN=4.2V VIN=4.2V VIN=3.6V VOUT=3.0V 65 60 VOUT=3.3V 200 400 600 800 1000 Load Current (mA) Fig. 5 Load Current vs. Efficiency (VOUT=3.0V) Fig. 6 Load Current (mA) Load Current vs. Efficiency (VOUT=3.3V) Rev.2.01 6/06/2003 www.SiliconStandard.com 4 of 13 SS6550 n TYPICAL PERFORMANCE CHARACTERISTICS (continued) 100 0.765 W / Schottky Diode 90 0.760 VIN=3.6V Reference Voltage (V) 1000 0.755 0.750 0.745 0.740 0.735 0.730 Efficiency (%) 80 70 W /O Schottky Diode 60 10 100 VIN=3.6V VOUT=1.8V 0.725 - 50 -25 0 25 50 75 100 125 Load Current (mA) Fig. 7 Load Current vs. Efficiency (W/ or W/O Schottky Diode) Fig. 8 Temperature (°C) Reference Voltage vs. Temperature 550 540 530 550 VIN=3.6V Frequency (KHz) - 40 -20 0 20 40 60 80 100 120 540 530 520 510 500 490 480 470 460 450 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Frequency (KHz) 520 510 500 490 480 470 460 450 Temperature (°C) Fig. 9 Oscillator Frequency vs. Temperature Fig. 10 Supply Voltage (V) Frequency vs. Input Voltage 0.44 0.42 1.82 RDSON (m Ω) 0.38 0.36 0.34 0.32 0.30 0.28 0.26 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Output Voltage (V) 0.40 Main Switch 1.80 VIN=3.6V 1.78 1.76 Synchronous Switch 1.74 1.72 1 10 100 1000 Supply Voltage (V) Fig. 11 RDSON vs. Supply Voltage Fig. 12 Load Current (mA) Output Voltage vs. Load Current Rev.2.01 6/06/2003 www.SiliconStandard.com 5 of 13 SS6550 n TYPICAL PERFORMANCE CHARACTERISTICS (continued) 40.0 4.0 VOUT=3.3V 3.5 37.5 No Load Current (µA) Supply Current (mA) 3.0 2.5 2.0 1.5 1.0 0.5 0.0 2.5 3.0 3.5 4.0 35.0 32.5 30.0 27.5 25.0 VOUT=2.5V VOUT=1.8V SYNC/PWM=IN 4.5 5.0 5.5 22.5 20.0 2.0 2.5 3.0 3.5 VOUT=1.8V SYNC/PWM=GND R1=560K R2=400K Supply Voltage (V) Fig. 13 Supply Current vs. Supply Voltage 4.0 4.5 5.0 5.5 6.0 Fig. 14 Supply Voltage (V) No Load Current vs. Supply Voltage 1000 Operation Frequency (KHz) 900 800 700 600 500 0 1000 Tuning Resistor (Ω ) Fig. 15 Operation Frequency vs. Tuning Resistor Fig. 16 Start-up from Shutdown, RLOAD=3Ω VOUT=1.8V; I LOAD=50mA to 500mA; SYNC/MODE=IN VOUT=1.8V; ILOAD=50mA to 500mA; SYNC/MODE=GND Fig. 17 Load Transient Response Fig. 18 Load Transient Response Rev.2.01 6/06/2003 www.SiliconStandard.com 6 of 13 SS6550 n TYPICAL PERFORMANCE CHARACTERISTICS (continued) VIN=3.3V to 5V, SYNC/MODE=IN IOUT=1.8V; ILOAD=200mA to 500mA; Fig. 19 Line Transient Response Fig. 20 Short Circuit Protection VIN=3.6V; VOUT=1.8V; ILOAD=500mA to 500mA; SYNC/MODE=IN Fig. 21 Switching Waveform Rev.2.01 6/06/2003 www.SiliconStandard.com 7 of 13 SS6550 n BLOCK DIAGRAM BP Chip Supply 0 .75V REF SHDN 10 V IN + X5 5 Q1 x1 + P hase Compensation FB FB R EF + E rror A MP . PWM C omparator + C ontrol Logic A ntiShootThrough Q3 PWM/PFM C ontrol REF + PFM C omparator Z ero Cross C omparator LX R EF Q1 X20 V IN C urrent AMP . S lope RT 5 00KHz O scillator F requency SYNC S election C urrent Limit C omparator C ompensation + GND n PIN DESCRIPTIONS Supply voltage input. Input range from +2.5V to +5.5V. Bypass with a 10µF capacitor. PIN 2: BPSupply bypass pin, internally connected to VIN. Bypass with a 0.1µF capacitor. Do not connect to an external power source other than VIN. PIN 3: SHDN - Active-low, shutdown-control input. Reduces supply current to 0.1µA in shutdown. PIN 4: FBFeedback input. PIN 5: RTFrequency adjustable pin. Connect a resistor from this pin to GND to decrease the frequency. PIN 1: VINPIN 6: SYNC/MODE- Oscillator sync and low-noise, mode-control Input. SYNC/MODE = VIN (Forced PWM mode) SYNC/MODE = GND (PWM/PFM mode) An external clock signal connected to this pin allows for LX switching synchronization. PIN 7: GND- Ground. PIN 8: LXInductor connection to the drains of the internal power MOSFETs Rev.2.01 6/06/2003 www.SiliconStandard.com 8 of 13 SS6550 n APPLICATION INFORMATION through block. Similarly, when Q3 is on, Q2 will turn off. The SS6550 provides a current limit function by using a 5Ω resistor. When Q1 turns on, current flows through the 5Ω resistor and the current amplifier senses the voltage across the resistor and amplifies it. When the sensed voltage gets bigger than the reference voltage, the control logic shuts the device off. Introduction The SS6550 is a low-noise, pulse-width-modulated (PWM), DC/DC step-down converter. It features an internal synchronous rectifier, which eliminates the external Schottky diode. The SS6550 is suitable for Li-lon battery applications, or can be used with 3V or 5V fixed input voltages. It operates in one of the following four modes 1. The SS6550 can operate in PWM mode with a fixed frequency, regardless of its load. 2. In synchronizable PWM mode, it allows an external switching frequency to control and minimize harmonics. 3. In idle mode (PWM/PFM), it can extend battery life by switching to PFM pulseskipping mode during light loads. 4. In shutdown mode, the device will stop working and the supply current will reduce to 0.1µA or less. The continuous output current of the SS6550 can be up to 800mA and the output voltage can be adjusted from 0.75V to VIN with an input range from 2.5V to 5.5V using a voltage divider. The SS6550 also features high efficiency, low dropout voltage, and a 0.75V reference with ±1.2% accuracy. It is available in a space-saving 8-pin MSOP package. PWM/PFM Function When connecting the SYNC/MODE pin to VIN, the device is forced into the PWM (Pulse-Width-Modulated) mode with constant frequency. The advantage of constant frequency is that noise can be reduced easily without complex post-filtering. However, it has the disadvantage of low efficiency at light loading. Therefore, the SS6550 provides a function to solve this problem. When connecting the SYNC/MODE pin to GND, the device is able to get into PWM/PFM (PulseFrequency-Modulated) modes. Under a light load condition, the device shifts to PFM mode, which results in a higher efficiency. PWM mode is on under heavy loading and the noise is reduced. Frequency Synchronization Connecting an external clock signal to the SNYC/MODE pin can control the switching frequency. The acceptable range is from 500 kHz to 1 MHz. This mode exhibits low output ripple as well as low audio noise and reduces RF interference, while providing reasonable low current efficiency. Adjustable Switching Frequency Operation When powered on, the control logic block detects whether the SYNC/MODE pin is connected to VIN or GND to determine the operation function and gives a signal to the PWM/PFM control block to determine the proper comparator (ref. Block Diagram). The SS6550 works with an internal synchronous rectifier Q3, to increase efficiency. When the control logic block turns Q2 on, Q3 will turn off through the anti-shortRev.2.01 6/06/2003 The decrease of the switching frequency can also be controlled by connecting an external resistor from the RT pin to ground (ref. Fig. 15). In this mode, the PFM mode is disabled and the device operates with the adjusted frequency. This function is helpful in reducing high frequency harmonics and a post-filter can be easily designed for this function. However, there will be an increase in ripple voltage. www.SiliconStandard.com 9 of 13 SS6550 n APPLICATION INFORMATION (cont.) External Schottky Diode The SS6550 has an internal synchronous rectifier, instead of the Schottky diode usually found in a buck converter. However, a blank period occurs at each switching cycle when both the main switch, Q2, and the synchronous rectifier, Q3, are off. This results in a decrease in efficiency. Therefore, an external Schottky diode is needed to reinforce the efficiency. Since the diode conducts during the off time, the peak current and voltage of the converter must not exceed the diode ratings. The ratings of the diode can be calculated from the following formulae: 100% Duty Cycle Operation When the input voltage approaches the output voltage, the converter continuously turns Q1 on. In this mode, the output voltage is equal to the input voltage minus the voltage-drop across Q1. Components Selection Inductor The inductor selection depends on the operating frequency of the SS6550. The internal switching frequency is 500 kHz, and the external synchronized frequency ranges from 500 kHz to 1 MHz. A higher frequency allows the use of smaller inductor and capacitor values. However, higher frequency also results in lower efficiency due to the internal switching loss. The ripple current ∆ IL is related to the inductor value. A lower inductor value creates a higher ripple current. A higher VIN or VOUT can also create the same result. The inductor value can be calculated from the following formula:  VOUT  1 1 −  V = ...(1) (f )(∆IL ) OUT  VIN    Users can define the acceptable ripple current to obtain a suitable inductor value. VD,MAX (OFF ) = VIN ID,MAX( ON) = IOUT,MAX + ID,avg ( ON) = IOUT − IIN = IOUT ∆IL 2 − D × IOUT = (1 − D) × IOUT Adjustable Output Voltage The SS6550 presents a 0.75V reference voltage at the FB pin. The output voltage, ranging from 0.75V to VIN, can be set by connecting two external resistors, R1 and R2. VOUT can be calculated as: R1 VOUT = 0.75 V × (1 + ) R2 Applying a 15µF capacitor in parallel with R1 can prevent stray pickup. This should sit as close to the SS6550 as possible. However, the load transient response is degraded by this capacitor. Output Capacitor The selection of output capacitor depends on the acceptable ripple voltage. Lower ripple voltage corresponds to lower ESR (equivalent-series-resistance) of the output capacitor. Typically, once the ESR is determined from the ripple voltage, the value of the capacitor is adequate for filtering. The formula for ripple voltage is:  1  ∆VOUT = ∆IL  ESR +  8fCOUT    For more reduction in the ripple voltage, a 15pF ceramic capacitor can be used in parallel with the output capacitor. Rev.2.01 6/06/2003 www.SiliconStandard.com 10 of 13 SS6550 n APPLICATION INFORMATION (cont.) L= 1.8 V  1 .8 V  1 −  = 8.23µH 500kHz × 250mA  4.2V  Layout Consideration To ensure proper operation of the SS6550, the following points should be considered: 1. The input capacitor and VIN should be placed as close as possible to each other to avoid the AC current flow into the internal MOSFET. 2. The output loop, which consists of the inductor, Schottky diode and output capacitor, should be kept as small as possible. 3. The routes carrying large currents should be kept short and wide. 4. Logically the large current of the converter, when SS6550 is on or off, should flow in the same direction. 5. The FB pin should connect to the feedback resistors directly, and the route should be away from any noise source, such as the inductance of the LX line. 6. Grounding all components at the same point may effectively reduce the occurrence of loops. A stable ground plane is very important to obtain higher efficiency. When a ground plane is cut apart, it may cause disturbed signals and noise. If possible, two or three through-holes can ensure the stability of grounding. Fig.2 to 4 shows the layout diagrams of the SS6550. Therefore, 10µH is appropriate for the inductor. The inductor, series number SLF6025-100M1R0 from TDK, with 57.3mΩ series resistance is recommended for the best efficiency. For the output capacitor, the ESR is more important than its capacitance. Assuming ripple voltage o f 100mV, then the ESR can be calculated as: ∆V 100mV ESR= = = 0.4Ω ∆I 250mA Therefore, a 33µF/10V capacitor, MCM series from NIPPON, is recommended. Schottky selection is calculated as following. VD,MAX ( OFF ) = VIN = 4.2 V ID,MAX(ON) = IOUT,MAX + ∆IL 2 250mA = 800mA + 2 = 925m A ID,avg( ON) = (1 − D) × IOUT = (1 − 1 .8 ) × 800mA 4.2 = 457 .14mA Example Here is an example to illustrate the components selection guide lines above. Let’s assume the SS6550 is to be used for a mobile phone application, which uses a 1-cell Li-Ion battery with 2.7V to 4.2V input voltage for the power source. The required load current is 800mA, and the output voltage is 1.8V. Substituting VOUT=1.8V, VIN=4.2V, ri p p l e =250mA, and f=500 kHz to equation (1) According to the data above, the Schottky diode, SS12, from GS is recommended. For feedback resistors, choose R2=390kΩ, and then R1 can be calculated as follow:  1.8 V  R1 =  − 1 × 390kΩ = 546kΩ ; use 560kΩ 0.75   Fig. 22 shows this application circuit for the SS6550. Rev.2.01 6/06/2003 www.SiliconStandard.com 11 of 13 SS6550 n APPLICATION INFORMATION (cont.) L1 10µH SW D1 SS12 Optional C5 15pF R1 C4 560K 33µF VOUT + C3 4.7µF VIN 2.7V~5.5V 1 + C1 10µF C2 0.1µF SW1 2 3 4 VIN BP SHDN FB SS6550 LX GND SYNC RT 8 7 6 5 RT R2 390K Fig. 22 SS6550 Application Circuit Rev.2.01 6/06/2003 www.SiliconStandard.com 12 of 13 SS6550 n PHYSICAL DIMENSIONS l MSOP 8 (unit: mm) D SYMBOL A A1 H E MIN 0.76 -0.28 0.13 2.90 2.90 0.65 4.80 0.40 MAX 0.97 0.20 0.38 0.23 3.10 3.10 5.00 0.66 B C D E e A C A1 e H L L B Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. Rev.2.01 6/06/2003 www.SiliconStandard.com 13 of 13