SS7529

SS7529 Synchronous Buck PWM and Linear Power Controller FEATURE Controller operates from 5V and 12V Drives two N-channel MOSFETs for switching buck converter Drives an N-channel MOSFET on the linear output Fixed 600kHz constant switching frequency Full range 0~100% duty cycle Internal soft start Fast transient response UVP monitoring on both outputs Internal 0.8V reference voltage. GENERAL DESCRIPTION The SS7529 consists of a dual-output power controller and the protection circuits in a single SO-14 package for graphic cards and other applications. The dual-output power controller provides regulation by driving two N-MOSFETs in a synchronous rectified buck converter, and one N-MOSFET in a linear configuration. The synchronous rectified buck converter provides simple, single feedback loop, voltage mode control with fast transient response, from an internal 0.8V temperaturecompensated reference voltage. A fixed 600kHz frequency oscillator reduces design complexity, while balancing typical application cost and efficiency. The internal soft-start function and the 12V direct drive on the switching output help to save the bootstrap circuit. Furthermore, the internal POR (power on reset) helps to prevent the system from sequencing issues during the startup and turn-off. Reacting to fault conditions, the SS7529 will shutdown both outputs when the voltage on either FB or FB2 pins drops below 51% of their nominal value. APPLICATIONS Graphics-GPU and memory supplies ASIC power supplies Embedded processor and I/O supplies Cable Modem, Set Top Box, and DSL Modems DSP and Core Communications Processor supplies TYPICAL APPLICATIONS Vin (3.3V or 5V) 5V 12V Q3 5VCC 12VCC DRIVE2 FB2 Linear Controller Control Logic Shutdown Vout Vref UGATE Q1 Error Amp FB Comp Vout LGATE Q2 O SC PGND GND Rev.1.01 4/26/2004 www.SiliconStandard.com 1 of 8 SS7529 ORDERING INFORMATION SS7529CSXX Packing: TB: tubes TR: tape and reel Package type: S: small outline SO-14 For example: SS7529CSTR SS7529 in SO-14 shipped in tape and reel PINOUT INFORMATION LGATE PGND GND 5VCC DRIVER2 FB2 NC 1 2 3 4 5 6 7 14 UGATE 13 12VCC 12 NC SS7529 11 NC 10 COMP 9 8 FB NC BLOCK DIAGRAM 5VCC 12VCC UVLO/POR Vref Control Logic RESTART FB UV Detection FB2 51% Vref INHIBIT/SOFT START SHUTDOWN 161% Vref FB2 DRIVE2 FB2 UGATE 5V PWM Comparator Error Amp FB Comp Dead Time Control LGATE Oscillator PGND GND Rev.1.01 4/26/2004 www.SiliconStandard.com 2 of 8 SS7529 PIN DESCRIPTIONS PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 NAME LGATE PGND GND 5VCC DRIVE2 FB2 NC NC FB COMP NC NC 12VCC UGATE FUNCTION Connect LGATE pin to the PWM converter’s lower MOSFET gate. This pin provides the gate drive for the lower MOSFET. Power ground return Signal and power ground for the IC. All voltage levels are measured with respect to this pin. Connect this pin to 5V supply voltage. This pin provides the bias for the control circuitry. The voltage at this pin is monitored for Power-On Reset (POR) purposes. This pin is the output of the linear controller. Connect this pin to the gate of an external N-MOSFET to provide output power. This pin is the inverting input of the internal error amplifier for the linear regulator output. Connect this pin to the output of the converter via an external resistor divider. Not connected Not connected This pin is the inverting input of the internal error amplifier for the switching buck converter. Connect this pin to the output of the converter via an external resistor divider. Error amplifier output Not connected Not connected Connect this pin to the 12V supply voltage. This pin provides the bias for the driver circuitry. The voltage at this pin is monitored for Power-On Reset (POR) purposes. Connect the UGATE pin to the PWM converter’s upper MOSFET gate. This pin provides the gate drive for the upper MOSFET. ABSOLUTE MAXIMUM RATINGS Supply Voltage 5Vcc.………………………………………………………………..…. -0.3 ~ 7V Supply Voltage 12Vcc ………………………………………………………………… -0.3 ~ 14V UGATE, LGATE, DRIVE2 ………………………………………………………………… FB, FB2, COMP …………………………………………………………………………… -0.3 ~12Vcc -0.3 ~ 5Vcc+0.3 o o Operating Temperature Range………………………………………………..………… 0 C to 70 C o o Storage Temperature Range………………………………………………………..…… –65 C to 150 C o o Junction Temperature………………………………………………………….………… 0 C to 125 C o Package thermal resistance SO-14.…………………………………………………… 68 C/W o Lead temperature (Soldering, 10sec)………………………………………………….. 300 C Caution: Stresses beyond the ratings specified in “Absolute Maximum ratings” may cause permanent damage to the device. This is a stress-only rating and the device should not be operated at these, or any other conditions above those indicated in the operational sections of this specification. ELECTRICAL CHARACTERISTICS (TA = +25oC unless otherwise stated, Vcc=5.0V) CONDITIONS PARAMETER Vcc Supply Voltage 12Vcc 5Vcc MIN 10.8 4.5 TYP 12 5.0 1.3 1.0 MAX 13.2 5.5 UNITS V V mA mA Vcc Supply Current Nominal Supply Current 12Vcc Nominal Supply Current 5Vcc UGATE and LGATE open UGATE and LGATE open Rev.1.01 4/26/2004 www.SiliconStandard.com 3 of 8 SS7529 ELECTRICAL CHARACTERISTICS (cont.) Power On Reset 5Vcc Rising Threshold 5Vcc 5Vcc Falling Threshold 12Vcc Rising Threshold 12Vcc Falling Threshold 4.15 3.7 9.6 9.2 550 4.35 3.9 10.3 9.6 600 1.5 3.4 -2 0.8 70 10 6 20 5 -7.3 0.5 5.6 -1 1 12 5 3.1 51 70 10 6 20 12 -14 0 14 51 161 +2 4.55 4.1 10.8 10.2 650 V V V V kHz Vp-p ms % V dB MHz V/uS nA V mA V mA A A V V Ω % dB MHz V/uS nA V mA V mA % % Oscillator Frequency Ramp Amplitude Soft-Start Soft-Start Interval Reference Reference Voltage Tolerance Nominal Reference Voltage PWM Error Amplifier DC gain Gain Bandwidth Product Slew Rate FB Input Bias Current Comp High Output Voltage Comp High Output Current (Source) Comp Low Output Voltage Comp Low Output Current (Sink) 150 1 PWM Gate Drivers UGATE & LGATE Source Current UGATE & LGATE Sink Current UGATE Maximum Voltage LGATE Maximum Voltage UGATE & LGATE Output Impedance 11 4 4.3 PWM Protection Under-Voltage Level (VFB/VREF) Linear Regulator Error Amplifier DC gain Gain Bandwidth Product Slew Rate FB2 Input Bias Current DRIVE2 High Output Voltage DRIVE2 High Output Current DRIVE2 Low Output Voltage DRIVE2 Low Output Current 150 0.5 Linear Regulator Protection Under-voltage Level (VFB2/VREF) Over-voltage Level (VFB2/VREF) Rev.1.01 4/26/2004 www.SiliconStandard.com 4 of 8 SS7529 TYPICAL PERFORMANCE CHARACTERISTICS Figure 1. POWER ON Figure 2. POWER OFF Vin Vin Vout2 Vout2 Vout1 Vout1 Figure 3. Dead time Figure 4. Dead time Ugate Lgate Lgate Ugate Figure 5. Load Off Transient Response Figure 6. Load On Transient Response Vout2 Vout2 Vout1 Vout1 Iout1 Iout1 Rev.1.01 4/26/2004 www.SiliconStandard.com 5 of 8 SS7529 FUNCTIONAL DESCRIPTION Operation Overview A s graphic-card power design is getting more and more complicated, engineers need a smart solution to reduce not only the design effort, but to further reduce the development time. The SS7529 is targeted at providing application to provide an easy and cost effective solution. The SS7529 control circuit is supplied by 5v and the highside MOSFET driver is supplied by 12V to eliminate the bootstrap circuit. The SS7529 integrates a synchronous-rectified buck controller and a linear power controller to control the supply of both the high-current requirement of the GPU and the low current requirement of memory. To address fault conditions, UVP (Under-Voltage Protection) is implemented on both outputs and OVP (Over-Voltage Protection) on the linear controller. The high switching frequency (600kHz) helps to reduce component sizes and the output ripple. VOUT 1 × R4 = VRef = 0.8V R1 + R4 +12V +3.3V 12VCC UGATE 5VCC +5V Vout1 LGATE SS7529 FB R3 R1 C2 R2 C1 COMP C3 R4 Initialization There is a smart power-on-reset (POR) circuit to monitor both 5Vcc and 12Vcc to identify if controller has started operation or not. This is to prevent fault conditions from undesirable power sequencing. With this, users can easily implement circuits without worrying about the power sequencing. Figure 7. OUTPUT VOLTAGE SELECTION OF THE PWM OUTPUT For linear output (figure 8), Soft-Start VOUT 2 × The POR function initiates the soft-start function after the 5Vcc and 12Vcc reach their threshold voltage. The built-in soft-start function is to prevent inrush current and output voltage overshoot during power on. An internal digital counter controls the soft-start voltage. It clamps the ramping of reference voltage at the input of the error amplifier and increases the pulse width of the output driver slowly. The typical soft-start duration is 3.4mS. R6 R5 + R6 = 0.8V +3.3Vin DRIVER2 Vout2 SS7529 FB2 R5 Under-Voltage Protection The under-voltage protection (UVP) of the SS7529 is implemented by monitoring the feedback signal at FB and FB2 pins. Whenever one of these two signals drops below 51% of the internal reference, the UVP will be triggered and then both outputs will be quickly shut down. Unless the fault condition is removed, both outputs will keep in hiccup mode operation. Cout2 R6 Figure 8. OUTPUT VOLTAGE SELECTION OF THE LINEAR OUTPUT Output Voltage Setting Both SS7529 outputs achieve regulation by feedback from the voltage dividers. Therefore, the output voltage can be easily programmed by the resistor values in the following equation. For switching output (figure 7), Converter Shutdown Forcing the FB2 pin to be higher than a threshold of 1.28V will shutdown both regulators. When the applied voltage is removed, the regulators will return to the re-start cycle and begin the soft-start process. Rev.1.01 4/26/2004 www.SiliconStandard.com 6 of 8 SS7529 Layout Hints There are some principles which should be followed when designing with the SS7529: 1. Keep the bypass capacitors of 5VCC and 12VCC very close to IC. 2. Keep output voltage feed back network, FB pin and FB2 pin related components (small signal components) very close to IC. 3. Signal ground plane of FB and FB2 pin (small signal components) should be connected to the power 4. ground plane with a via or only one point to minimizes the effect of power ground currents. Switching node such as UGATE and LGATE should be kept as small as possible and routed away from FB, FB2, and other linear circuit. The PCB traces carrying discontinuous currents and any high current path should be made as short and wide as possible. If possible, a multi-layer PCB is recommended. Please refer to the EV kit of SS7529 for a PCB layout example. 5. 6. Typical Application Circuit J5 1 +3.3Vin C11 330uF C12 330uF +3.3V L1 1u C10 330uF C15 1u J2 5V 1 5V J1 12V 1 12V 13 C2 C1 1u J8 1 CON1 1u 4 12VCC 5VCC UGAT Q1 R1 14 Q2 L2 J4 1 C8 470uF C9 470uF C3 1uF SS7529 2uH 1.6Vout 5 C4 470p 3055 1k DRIVES2 LGAT 1 Q3 R6 6.8k COMP 10 J3 1 2.5Vout R4 4.64k PGND GND 6 7 8 11 12 R5 2.15k FB2 NC NC NC NC FB 9 R3 1k R8 C5 2.2n C6 C14 470uF C13 470uF C16 1uF 0 ohm J7 47n 3 2 1 GND J6 1 GND C7 1.2n R7 10.7k SW1 SW DPST R2 1k Rev.1.01 4/26/2004 www.SiliconStandard.com 7 of 8 SS7529 Packaging Information Package: SOP-14 In formation furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. Rev.1.01 4/26/2004 www.SiliconStandard.com 8 of 8