SSM28G45EM

SSM28G45EM N-CHANNEL INSULATED-GATE BIPOLAR TRANSISTOR High input impedance High peak current capability C C C C VCE ICP 450V 130A C 3.3V gate drive G SO-8 E E E G E Absolute Maximum Ratings Symbol VCE VGE VGEP ICP PD @ TC=25°C TSTG TJ 1 Parameter Collector-Emitter Voltage Gate-Emitter Voltage Pulsed Gate-Emitter Voltage Pulsed Collector Current Maximum Power Dissipation Storage Temperature Range Operating Junction Temperature Range Rating 450 ±6 ±8 130 2.5 -55 to 150 -55 to 150 Units V V V A W °C °C Electrical Characteristics @ Tj=25oC (unless otherwise specified) Symbol IGES ICES VCE(sat) VGE(th) Qg Qge Qgc td(on) tr td(off) tf Cies Coes Cres RthJA 1 Parameter Gate-Emitter Leakage Current Collector-Emitter Leakage Current (Tj=25°C) Test Conditions VGE=± 6V, VCE=0V VCE=450V, VGE=0V VGE=3.3V, ICP=130A (Pulsed) Min. - Typ. - Max. 10 10 Units µA µA Collector-Emitter Saturation Voltage - 3.8 74 8 34 20 100 400 3 3020 220 50 - 6 1 120 4830 50 V V nC nC nC ns ns ns µs pF pF pF °C/W Gate Threshold Voltage Total Gate Charge Gate-Emitter Charge Gate-Collector Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance VCE=VGE, IC=250µA IC=40A VCE=360V VGE=4.5V VCC=200V IC=15A RG=10Ω VGE=5V VGE=0V VCE=25V f=1.0MHz Thermal Resistance Junction-Ambient Notes: 1.Surface mounted on 1 in2 copper pad of FR4 board ; 125°C/W when mounted on min. copper pad. 9/21/2004 Rev.2.01 www.SiliconStandard.com 1 of 4 SSM28G45EM 240 140 200 T A =25 C o 5.0V 4.0V IC , Collector Current (A) 120 T A = 150 C o 5.0V 4.0V 3.3 V IC , Collector Current (A) 100 160 3.3V 120 80 60 2.0V 80 2.0V 40 40 V G =1.0V 20 V G =1.0V 0 0 0 2 4 6 8 10 12 0 1 2 3 4 5 6 7 V CE , Collector-Emitter Voltage (V) V CE , Collector-Emitter Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 240 9 200 V CE =6.0V 25 C o o V GE =4.0V VCE(sat) ,Saturation Voltage(V) 7 IC , Collector Current(A) I C =130A 160 70 C 125 o C T A =150 o C I C =120A 5 120 I C =100A 80 3 I C =50A 40 0 1 0 1 2 3 4 5 6 0 20 40 60 80 100 120 140 160 V GE , Gate-Emitter Voltage (V) Junction Temperature ( o C) Fig 3. Collector Current vs. Gate-Emitter Voltage 1.2 Fig 4. Collector- Emitter Saturation Voltage vs. Junction Temperature 10 VGE(th) ,Gate Threshold Voltage (V) 1.0 VCE ,Collector-Emitter Voltage(V) o T A =25 C 8 0.8 6 I C = 130 A 120A 100A 50A 0.6 4 0.4 2 0.2 0.0 -50 0 50 100 150 0 0 1 2 3 4 5 6 Junction Temperature ( C ) o V GE , Gate-Emitter Voltage(V) Fig 5. Gate Threshold Voltage vs. Junction Temperature 9/21/2004 Rev.2.01 Fig 6. Collector Current vs. Gate-Emitter Voltage www.SiliconStandard.com 2 of 4 SSM28G45EM f=1.0MHz 10000 160 T A =25 C ICP , Peak Collector Current (A) Cies 1000 120 o C (pF) 80 Coes 100 Cres 40 10 1 5 9 13 17 21 25 29 0 0 2 4 6 8 V CE , Collector-Emitter Voltage (V)) V GE , Gate-to-Emitter Voltage (V) Fig 7. Typical Capacitance Characterisitics Fig 8. Maximum Pulse Collector Current VCE RC TO THE OSCILLOSCOPE 90% C VCE RG G VCC=200 V E + 10% VGE VGE - 5V td(on) tr td(off) tf Fig 9. Switching Time Test Circuit Fig 10. Switching Time Waveform 12 TO THE C G OSCILLOSCOPE VGE , Gate -Emitter Voltage (V) VCE 10 I CP =40A V CE =360V 8 VCC=360V VGE + 6 E 4 1~3mA - IG IC 2 0 0 40 80 120 160 200 Q G , Gate Charge (nC) Fig 11. Gate Charge Test Circuit 9/21/2004 Rev.2.01 Fig 12. Gate Charge Waveform www.SiliconStandard.com 3 of 4 SSM28G45EM In formation furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 9/21/2004 Rev.2.01 www.SiliconStandard.com 4 of 4