SSM4500GM

SSM4500GM N AND P-CHANNEL ENHANCEMENT MODE POWER MOSFET PRODUCT SUMMARY D2 N-CH BVDSS RDS(ON) ID G2 S2 20V 30mΩ 6A -20V 50mΩ -5A Simple Drive Requirement Low On-resistance Fast Switching D2 D1 D1 P-CH BVDSS RDS(ON) ID SO-8 S1 G1 DESCRIPTION The advanced power MOSFETs from Silicon Standard Corp. provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SO-8 package is universally preferred for all commercialindustrial surface mount applications and suited for low voltage applications such as DC/DC converters. G1 D1 D2 G2 S1 S2 Pb-free; RoHS-compliant ABSOLUTE MAXIMUM RATINGS Symbol VDS VGS ID@TA=25℃ ID@TA=70℃ IDM PD@TA=25℃ TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current 1 3 3 Rating N-channel 20 ±12 6 4.8 20 2.0 0.016 -55 to 150 -55 to 150 P-channel -20 ±12 -5 -4 -20 Units V V A A A W W/ ℃ ℃ ℃ Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range THERMAL DATA Symbol Rthj-a Parameter Thermal Resistance Junction-ambient 3 Value Max. 62.5 Unit ℃/W 02/13/2008 Rev.1.00 www.SiliconStandard.com 1 SSM4500GM N-CH Electrical Characteristics@Tj=25oC(unless otherwise specified) Symbol BVDSS ΔBVDSS/ΔTj Parameter Drain-Source Breakdown Voltage 2 Test Conditions VGS=0V, ID=250uA Min. Typ. Max. Units 20 0.5 0.037 30 45 1.2 1 25 15 480 - V V/℃ mΩ mΩ V S uA uA nC nC nC ns ns ns ns pF pF pF Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=1mA RDS(ON) Static Drain-Source On-Resistance VGS=4.5V, ID=6A VGS=2.5V, ID=5.2A 18.5 9 1.8 4.2 29 65 60 50 300 255 115 VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70oC) o VDS=VGS, ID=250uA VDS=10V, ID=6A VDS=20V, VGS=0V VDS=16V, VGS=0V VGS=±12V ID=6A VDS=10V VGS=4.5V VDS=10V ID=1A RG=6Ω,VGS=4.5V RD=10Ω VGS=0V VDS=8V f=1.0MHz Gate-Source Leakage Total Gate Charge 2 ±100 nA Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance 2 SOURCE-DRAIN DIODE Symbol VSD trr Qrr Parameter Forward On Voltage 2 Test Conditions IS=1.7A, VGS=0V IS=6A, VGS=0V, dI/dt=100A/µs Min. Typ. Max. Units 26 17 1.2 V ns nC Reverse Recovery Time Reverse Recovery Charge 02/13/2008 Rev.1.00 www.SiliconStandard.com 2 SSM4500GM P-CH Electrical Characteristics@Tj=25 C(unless otherwise specified) Symbol BVDSS ΔBVDSS/ΔTj o Parameter Drain-Source Breakdown Voltage Static Drain-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (T j=25 C) Drain-Source Leakage Current (T j=70 C) o o Test Conditions VGS=0V, ID=250uA 2 Min. Typ. Max. Units -20 -0.5 -0.037 50 90 -1 -1 -25 20 - V V/℃ mΩ mΩ V S uA uA nC nC nC ns ns ns ns pF pF Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=-1mA RDS(ON) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss VGS=-4.5V, ID=-2.2A VGS=-2.5V, ID=-1.8A VDS=VGS, ID=-250uA VDS=-10V, ID=-2.2A VDS=-20V, VGS=0V VDS=-16V, VGS=0V VGS= ± 12V ID=-5A VDS=-16V VGS=-4.5V VDS=-10V ID=-2.2A RG=6Ω,VGS=-10V RD=4.5Ω VGS=0V VDS=-20V f=1.0MHz 2.5 14 2 5.6 10 11 58 38 400 160 Gate-Source Leakage Total Gate Charge 2 ±100 nA Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance 2 940 1500 pF SOURCE-DRAIN DIODE Symbol VSD trr Qrr Parameter Forward On Voltage 2 Test Conditions IS=-1.8A, VGS=0V IS=-2.2A, VGS=0V, dI/dt=100A/µs Min. Typ. Max. Units 25 21 -1.2 V ns nC Reverse Recovery Time Reverse Recovery Charge Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width