SSM4513M

SSM4513M/GM N AND P-CHANNEL ENHANCEMENT-MODE POWER MOSFETS Simple drive requirement Low on-resistance D1 D2 D1 D2 N-CH BV DSS R DS(ON) ID 35V 36mΩ 5.8A -35V 68mΩ -4.3A Fast switching performance SO-8 S1 G1 G2 S2 P-CH BVDSS RDS(ON) Description Advanced Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. G1 ID D1 D2 G2 S1 S2 The SSM4513M is in the SO-8 package, which is widely preferred for commercial and industrial surface mount applications, and is well-suited for most low voltage applications. This device is available with Pb-free lead finish (second-level interconnect) as SSM4513GM. Absolute Maximum Ratings Symbol VDS VGS ID @ TA=25°C ID @ TA=70°C IDM PD @ TA=25°C TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current 1 3 3 Rating N-channel 35 ±20 5.8 4.7 20 2.0 0.016 -55 to 150 -55 to 150 P-channel -35 ±20 -4.3 -3.4 -20 Units V V A A A W W/°C °C °C Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range Thermal Data Symbol Rthj-a Parameter Thermal Resistance Junction-ambient 3 Value Max. 62.5 Unit °C/W 10/12/2004 Rev.2.01 www.SiliconStandard.com 1 of 8 SSM4513M/GM N-ch Electrical Characteristics @ T j=25 C (unless otherwise specified) Symbol BVDSS Parameter Drain-Source Breakdown Voltage 2 o Test Conditions VGS=0V, ID=250uA Min. 35 1 - Typ. 0.03 7 6 2 3 8 7 16 3 470 90 60 Max. Units 36 60 3 1 25 ±100 10 750 V V/°C mΩ mΩ V S uA uA nA nC nC nC ns ns ns ns pF pF pF ∆ BV DSS/∆ T j RDS(ON) Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA Static Drain-Source On-Resistance VGS=10V, ID=5A VGS=4.5V, ID=3A VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (Tj=25 C) Drain-Source Leakage Current (Tj=70 C) o o VDS=VGS, ID=250uA VDS=10V, ID=5A VDS=30V, VGS=0V VDS=24V, VGS=0V VGS=±20V ID=5A VDS=28V VGS=4.5V VDS=15V ID=1A RG=3.3Ω ,VGS=10V RD=15Ω VGS=0V VDS=25V f=1.0MHz Gate-Source Leakage Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance 2 Source-Drain Diode Symbol VSD trr Qrr Parameter Forward On Voltage 2 Test Conditions IS=1.7A, VGS=0V IS=5A, VGS=0V dI/dt=100A/µs Min. - Typ. 17 11 Max. Units 1.2 V ns nC Reverse Recovery Time Reverse Recovery Charge 10/12/2004 Rev.2.01 www.SiliconStandard.com 2 of 8 SSM4513M/GM P-ch Electrical Characteristics @ Tj=25oC (unless otherwise specified) Symbol BVDSS Parameter Drain-Source Breakdown Voltage Static Drain-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (T j=25 C) Drain-Source Leakage Current (T j=70 C) o o Test Conditions VGS=0V, ID=-250uA 2 Min. -35 -1 - Typ. -0.03 6 6 1 4 8 7 20 4 410 95 70 Max. Units 68 100 -3 -1 -25 ±100 10 660 V V/°C mΩ mΩ V S uA uA nA nC nC nC ns ns ns ns pF pF pF ∆ BVDSS/∆ Tj RDS(ON) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Breakdown Voltage Temperature Coefficient Reference to 25°C,ID=-1mA VGS=-10V, ID=-4A VGS=-4.5V, ID=-2A VDS=VGS, ID=-250uA VDS=-10V, ID=-4A VDS=-30V, VGS=0V VDS=-24V, VGS=0V VGS=±20V ID=-4A VDS=-28V VGS=-4.5V VDS=-15V ID=-1A RG=3.3Ω , VGS=-10V RD=15Ω VGS=0V VDS=-25V f=1.0MHz Gate-Source Leakage Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance 2 Source-Drain Diode Symbol VSD trr Qrr Parameter Forward On Voltage 2 Test Conditions IS=-1.7A, VGS=0V IS=-4A, VGS=0V dI/dt=-100A/µs Min. - Typ. 21 16 Max. Units -1.2 V ns nC Reverse Recovery Time Reverse Recovery Charge Notes: 1.Pulse width limited by max. junction temperature. 2.Pulse width