SSM4565M

SSM4565M/GM COMPLEMENTARY N- AND P-CHANNEL ENHANCEMENT-MODE POWER MOSFETS Simple drive requirement Lower gate charge Fast switching characteristic D2 D1 D2 D1 D1 D1 D2 N-CH BV DSS R DS(ON) ID G2 G2 S2 G1 S2 S1 G1 S1 40V 25mΩ 7.6A -40V 33mΩ -6.5A D1 D2 P-CH BVDSS RDS(ON) ID SO-8 Description Advanced Power MOSFETs from Silicon Standard provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. The SSM4565M is in the SO-8 package, which is widely preferred for commercial and industrial surface mount applications, and is well suited for low voltage applications such as DC/DC converters. G1 G2 S1 S2 This device is available with Pb-free lead finish (second-level interconnect) as SSM4565GM. Absolute Maximum Ratings Symbol VDS VGS ID @ TA=25°C ID @ TA=70°C IDM PD @ TA=25°C TSTG TJ Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current Continuous Drain Current Pulsed Drain Current 1 3 3 Rating N-channel 40 ±20 7.6 6 30 2.0 0.016 -55 to 150 -55 to 150 P-channel -40 ±20 -6.5 -5.2 -30 Units V V A A A W W/°C °C °C Total Power Dissipation Linear Derating Factor Storage Temperature Range Operating Junction Temperature Range Thermal Data Symbol Rthj-a Parameter Thermal Resistance Junction-ambient 3 Value Max. 62.5 Unit °C/W 12/10/2004 Rev.2.01 www.SiliconStandard.com 1 of 5 SSM4565M/GM N-channel Electrical Characteristics @ T j=25oC (unless otherwise specified) Symbol BVDSS Parameter Drain-Source Breakdown Voltage 2 Test Conditions VGS=0V, ID=250uA Min. 40 1 - Typ. Max. Units 0.03 12 17 4 10 11 8 30 11 250 170 25 32 3 1 25 ±100 27 V V/°C mΩ mΩ V S uA uA nA nC nC nC ns ns ns ns pF pF pF ∆ BV DSS/∆ Tj RDS(ON) Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=1mA Static Drain-Source On-Resistance VGS=10V, ID=7A VGS=4.5V, ID=5A VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (Tj=25oC) Drain-Source Leakage Current (Tj=70 C) o VDS=VGS, ID=250uA VDS=10V, ID=7A VDS=40V, VGS=0V VDS=32V, VGS=0V VGS=±20V ID=7A VDS=32V VGS=4.5V VDS=20V ID=1A RG=3.3Ω , VGS=10V RD=20Ω VGS=0V VDS=25V f=1.0MHz Gate-Source Leakage Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance 2 1400 2240 Source-Drain Diode Symbol VSD trr Qrr Parameter Forward On Voltage 2 2 Test Conditions IS=1.7A, VGS=0V IS=7A, VGS=0V dI/dt=100A/µs Min. - Typ. Max. Units 26 21 1.2 V ns nC Reverse Recovery Time Reverse Recovery Charge 12/10/2004 Rev.2.01 www.SiliconStandard.com 2 of 5 SSM4565M/GM P-channel Electrical Characteristics @ Tj=25oC (unless otherwise specified) Symbol BVDSS Parameter Drain-Source Breakdown Voltage Static Drain-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-Source Leakage Current (T j=25 C) Drain-Source Leakage Current (T j=70 C) o o Test Conditions VGS=0V, ID=-250uA 2 Min. -40 -1 - Typ. -0.03 10 20 4 10 11 7 67 43 250 190 Max. Units 33 42 -3 -1 -25 ±100 32 V V/°C mΩ mΩ V S uA uA nA nC nC nC ns ns ns ns pF pF pF ∆ BVDSS/∆ T j RDS(ON) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Breakdown Voltage Temperature Coefficient Reference to 25°C, ID=-1mA VGS=-10V, ID=-6A VGS=-4.5V, ID=-4A VDS=VGS, ID=-250uA VDS=-10V, ID=-6A VDS=-40V, VGS=0V VDS=-32V, VGS=0V VGS=±20V ID=-6A VDS=-32V VGS=-4.5V VDS=-20V ID=-1A RG=3.3Ω, VGS=-10V RD=20Ω VGS=0V VDS=-25V f=1.0MHz Gate-Source Leakage Total Gate Charge 2 Gate-Source Charge Gate-Drain ("Miller") Charge Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance 2 1440 2300 Source-Drain Diode Symbol VSD trr Qrr Parameter Forward On Voltage2 Reverse Recovery Time 2 Test Conditions IS=-1.7A, VGS=0V IS=-6A, VGS=0V dI/dt=-100A/µs Min. - Typ. 27 23 Max. Units -1.2 V ns nC Reverse Recovery Charge Notes: 1.Pulse width limited by max. junction temperature. 2.Pulse width