ST1002

ST1002 N Channel Enhancement Mode MOSFET 3.0A DESCRIPTION The ST1002 is the N-Channel logic enhancement mode power field effect transistor is produce using high cell density, DMOS trench technology. This high-density process is especially tailored to minimize on-state resistance. These device are particularly suited for low voltage application such as cellular phone and notebook computer power management and other battery powered circuits where high side switching. FEATURE PIN CONFIGURATION SOT-23-3L 100V/3.0A, RDS(ON) = 135mΩ @VGS = 10V 100V/2.5A, RDS(ON) = 140mΩ @VGS = 4.5V Super high density cell design for extremely low RDS(ON) Exceptional on-resistance and maximum DC current capability SOT-23-3L package design 3 D G S 1 2 1.Gate 2.Source 3.Drain PART MARKING SOT-23-3L 3 102YA 1 Y: Year Code 2 A: Produce Code 1 120 Bentley Square, Mountain View, Ca 94040 USA http://www.stnasontech.com ST1002 2013 . V1 ST1002 N Channel Enhancement Mode MOSFET 3.0A ABSOULTE MAXIMUM RATINGS (Ta = 25℃ Unless otherwise noted ) Parameter Symbol Typical Unit Drain-Source Voltage VDSS 100 V Gate-Source Voltage VGSS ±20 V ID 5.0 3.0 A IDM 15 A Continuous Source Current (Diode Conduction) IS 1.9 A TA=25℃ TA=70℃ PD 2.0 1.2 W TJ -55/150 ℃ Storgae Temperature Range TSTG -55/150 ℃ Thermal Resistance-Junction to Ambient RθJA 75 Continuous Drain Current TJ=150℃ TA=25℃ TA=70℃ Pulsed Drain Current Power Dissipation Operation Junction Temperature ℃/W 2 120 Bentley Square, Mountain View, Ca 94040 USA http://www.stnasontech.com ST1002 2013 . V1 ST1002 N Channel Enhancement Mode MOSFET 3.0A ELECTRICAL CHARACTERISTICS ( Ta = 25℃ Unless otherwise noted ) Parameter Symbol Condition Min Typ Max V(BR)DSS VGS=0V,ID=250uA 100 VGS(th) VDS=VGS,ID=250uA 1 IGSS Unit Static Drain-Source Breakdown Voltage Gate Threshold Voltage Gate Leakage Current Zero Gate Voltage Drain Current Drain-source On-Resistance Diode Forward Voltage IDSS V 2.5 V VDS=0V,VGS=±20V ±100 nA VDS=80V,VGS=0V 1 VDS=80V,VGS=0V TJ=55℃ 10 uA 135 140 mΩ 1.0 V RDS(on) VGS=10V,ID=3.0A VGS=4.5V,ID=2.0A VSD IS=1.7A,VGS=0V 128 133 Dynamic Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Qgd Input Capacitance Output Capacitance Ciss Coss Reverse Transfer Capacitance Crss Turn-On Time Turn-Off Time 45 VDS=50V VGS=10V ID≡2.0A td(on) tr td(off) tf 7.2 nC 22 VDS=30V VGS=0V F=1MHz 640 160 VDD=30V RL=30Ω ID=1.0A VGEN=10V RG=6Ω 11 21 10 19 24 44 21 39 pF 88 nS 3 120 Bentley Square, Mountain View, Ca 94040 USA http://www.stnasontech.com ST1002 2013 . V1 ST1002 N Channel Enhancement Mode MOSFET 3.0A TYPICAL CHARACTERICTICS (25℃ Unless noted) 4 120 Bentley Square, Mountain View, Ca 94040 USA http://www.stnasontech.com ST1002 2013 . V1 ST1002 N Channel Enhancement Mode MOSFET 3.0A TYPICAL CHARACTERICTICS (25℃ Unless noted) 5 120 Bentley Square, Mountain View, Ca 94040 USA http://www.stnasontech.com ST1002 2013 . V1 ST1002 N Channel Enhancement Mode MOSFET 3.0A TYPICAL CHARACTERICTICS (25℃ Unless noted) 6 120 Bentley Square, Mountain View, Ca 94040 USA http://www.stnasontech.com ST1002 2013 . V1 ST1002 N Channel Enhancement Mode MOSFET 3.0A SOT-23-3L PACKAGE OUTLINE 7 120 Bentley Square, Mountain View, Ca 94040 USA http://www.stnasontech.com ST1002 2013 . V1