4066

HCF4066B QUAD BILATERAL SWITCH FOR TRANSMISSION OR MULTIPLEXING OF ANALOG OR DIGITAL SIGNALS s s s s s s s s s s s s s 15V DIGITAL OR ± 7.5V PEAK TO PEAK SWITCHING 125Ω TYPICAL ON RESISTANCE FOR 15V OPERATION SWITCH ON RESISTANCE MATCHED TO WITHIN 5Ω TYP. OVER 15V SIGNAL INPUT RANGE ON RESISTANCE FLAT OVER FULL PEAK TO PEAK SIGNAL RANGE HIGH ON/OFF OUTPUT VOLTAGE RATIO : 65dB TYP. at fIS = 10KHz, RL = 10KΩ HIGH DEGREE OF LINEARITY : < 0.5% DISTORTION TYP. at fIS = 1KHz, VIS = 5 Vpp, VDD - VSS > 10V, RL = 10KΩ EXTREMELY LOW OFF SWITCH LEAKAGE RESULTING IN VERY LOW OFFSET CURRENT AND HIGH EFFECTIVE OFF RESISTANCE : 10pA TYP. at VDD - VSS = 10V, Tamb = 25°C EXTREMELY HIGH CONTROL INPUT IMPEDANCE (control circuit isolated from signal circuit 1012Ω typ.) LOW CROSSTALK BETWEEN SWITCHES : 50dB Typ. at fIS = 0.9MHz, RL = 1KΩ MATCHED CONTROL - INPUT TO SIGNAL OUTPUT CAPACITANCE : REDUCES OUTPUT SIGNAL TRANSIENTS FREQUENCY RESPONSE SWITCH ON : 40MHz (Typ.) QUIESCENT CURRENT SPECIF. UP TO 20V 5V, 10V AND 15V PARAMETRIC RATINGS DIP SOP ORDER CODES PACKAGE DIP SOP s TUBE HCF4066BEY HCF4066BM1 T&R HCF4066M013TR s s INPUT LEAKAGE CURRENT II = 100nA (MAX) AT VDD = 18V TA = 25°C 100% TESTED FOR QUIESCENT CURRENT MEETS ALL REQUIREMENTS OF JEDEC JESD13B ” STANDARD SPECIFICATIONS FOR DESCRIPTION OF B SERIES CMOS DEVICES” DESCRIPTION The HCF4066B is a monolithic integrated circuit fabricated in Metal Oxide Semiconductor technology available in DIP and SOP packages. The HCF4066B is a QUAD BILATERAL SWITCH intended for the transmission or multiplexing of analog or digital signals. It is pin for pin compatible with HCF4016B, but exhibits a much lower ON resistance. In addition, PIN CONNECTION September 2001 1/9 H CF4066B the ON resistance is relatively constant over the full input signal range. The HCF4066B consists of four independent bilateral switches. A single control signal is required per switch. Both the p and n device in a given switch are biased ON or OFF simultaneously by the control signal. As shown in schematic diagram , the well of the n-channel device on each switch is either tied to the input when the switch is ON or to VSS when the switch is OFF. This configuration eliminates INPUT EQUIVALENT CIRCUIT the variation of the switch-transistor threshold voltage with input signal, and thus keeps the ON resistance low over the full operating signal range. The advantages over single channel switches include peak input signal voltage swings equal to the full supply voltage, and more constant ON impedance over the input signal range. For sample and hold applications, however, the HCF4016B is recommended. PIN DESCRIPTION PIN No 1, 4, 8, 11 2, 3, 9, 10 13, 5, 6, 12 7 14 SYMBOL A to D I/O A to D O/I CONTROL A to D VSS VDD NAME AND FUNCTION Independent Inputs/Outputs Independent Outputs/ Inputs Enable Inputs Negative Supply Voltage Positive Supply Voltage TRUTH TABLE CONTROL H L SWITCH FUNCTION ON OFF SCHEMATIC DIAGRAM (1 OF 4 IDENTICAL SWITCHES AND ITS ASSOCIATED CONTROL CIRCUITY) 2/9 HCF4066B ABSOLUTE MAXIMUM RATINGS Symbol V DD VI II PD Top Tstg Supply Voltage DC Input Voltage DC Input Current Power Dissipation per Package Power Dissipation per Output Transistor Operating Temperature Storage Temperature Parameter Value -0.5 to +22 -0.5 to VDD + 0.5 ± 10 200 100 -55 to +125 -65 to +150 Unit V V mA mW mW °C °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. All voltage values are referred to VSS pin voltage. RECOMMENDED OPERATING CONDITIONS Symbol V DD VI Top Supply Voltage Input Voltage Operating Temperature Parameter Value 3 to 20 0 to VDD -55 to 125 Unit V V °C ELECTRICAL CHARACTERISTICS (Tamb = 25°C,Typical temperature coefficient for all VDD value is 0.3 %/° C) Test Condition Symbol Parameter VI (V) 0/5 0/10 0/15 0/20 VC=V DD RL = 10KΩ Return to (VDD-VSS)/2 VIS = VSS to VDD VDD (V) 5 10 15 20 TA = 25°C Min. Typ. 0.01 0.01 0.01 0.02 470 180 125 5 10 15 0.4 Max. 0.25 0.5 1 5 1050 400 240 Value -40 to 85°C -55 to 125°C Min. Max. 7.5 15 30 150 1200 500 300 Min. Max. 7.5 15 30 150 1200 500 300 Unit IL Quiescent Device Current (all switches ON or all switches OFF) µA SIGNAL INPUTS (V IS) and OUTPUTS (VOS) R ON Resistance 5 10 15 5 RL = 10KΩ, VC = VDD 10 15 VC = VDD = 5V, VSS = -5V VIS (p-p) = 5V, R L = 10KΩ (sine wave centered in 0V) fIS = 1KHz sine wave VC = VDD = 5V, VSS = -5V VIS (p-p) = 5V, R L = 1K Ω (sine wave centered in 0V) VC = VSS = -5V VIS (p-p) = 5V, R L = 1K Ω (sine wave centered in 0V) Ω ∆ON Resistance ∆RON (between any 2 of 4 switches) Total Harmonic Distortion Ω % TDH -3dB Cutoff Frequency (Switch on) -50dB Feedthrough Frequency (switch off) 40 MHz 1 MHz 3/9 H CF4066B Test Condition Symbol Parameter VI (V) VDD (V) TA = 25°C Min. Typ. 8 Max. Value -40 to 85°C -55 to 125°C Min. Max. Min. Max. MHz Unit -50dB Crosstalk Frequency VC(A) = VDD = +5V VC(B) = VSS = - 5V VIS(A) = 5V (p-p) 50Ω source, RL = 1KΩ RL = 200KΩ, VC = VDD VSS = GND, CL = 50pF VIS= 10V square wave centered on 5V tr, tf = 20ns tpd Propagation Delay Time (signal input to output) 20 10 7 40 20 15 ns CIS COS C IOS Input Capacitance Output Capacitance Feedthrough Input/Output Leakage Current Switch OFF VC = 0V VIS = 18V, V OS = 0V VIS = 0V, VOS = 18V 18 VC = VSS = -5 +5 8 8 0.5 ±10 -3 ± 0.1 ±1 ±1 µA pF CONTROL (VC) VILC Control Input Low Voltage Control Input High Voltage Input Leakage Current Crosstalk (control input to signal output) Turn - On Propagation Delay Time Control Input Repetition Rate IIS< 10 µA V IS = VSS, VOS = V DD and V IS = VDD, VOS = VSS VIS < VDD VDD - VSS = 18V VC = 10V (sq. wave) tr, tf = 20ns R L = 10KΩ VIN = V DD, tr, tf = 20ns CL = 50pF, R L = 1K Ω VIS=V DD, VSS=GND R L = 1KΩ to GND C L = 50pF, V C = 10V sq. wave center on 5V tr, tf = 20ns VOS=1/2VOS at 1KHz Any Input 5 10 15 5 10 15 18 1 2 2 3.5 7 11 ±10 -5 ± 0.1 3.5 7 11 ±1 1 2 2 3.5 7 11 ±1 1 2 2 V VIHC V µA II 10 5 10 15 5 10 15 50 35 20 15 6 9 9.5 70 40 30 mV ns MHz CI Input Capacitance 5 7.5 pF 4/9 HCF4066B TYPICAL APPLICATIONS (BIDIRECTIONAL SIGNAL TRANSMISSION VIA DIGITAL CONTROL LOGIC) TYPICAL APPLICATIONS (4-CHANNEL PAM MULTIPLEXER SYSTEM DIAGRAM) 5/9 H CF4066B TEST CIRCUIT C L = 50pF or equivalent (includes jig and probe capacitance) R L = 200KΩ R T = ZOUT of pulse generator (typically 50Ω) WAVEFORM : PROPAGATION DELAY TIMES (f=1MHz; 50% duty cycle) 6/9 HCF4066B Plastic DIP-14 MECHANICAL DATA mm. DIM. MIN. a1 B b b1 D E e e3 F I L Z 1.27 3.3 2.54 0.050 8.5 2.54 15.24 7.1 5.1 0.130 0.100 0.51 1.39 0.5 0.25 20 0.335 0.100 0.600 0.280 0.201 1.65 TYP MAX. MIN. 0.020 0.055 0.020 0.010 0.787 0.065 TYP. MAX. inch P001A 7/9 H CF4066B SO-14 MECHANICAL DATA DIM. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 8.55 5.8 1.27 7.62 4.0 5.3 1.27 0.68 8° (max.) 0.149 0.181 0.019 8.75 6.2 0.35 0.19 0.5 45° (typ.) 0.336 0.228 0.050 0.300 0.157 0.208 0.050 0.026 0.344 0.244 0.1 mm. MIN. TYP MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.003 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010 PO13G 8/9 HCF4066B Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringe ment of patents or other righ ts of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this pub lication are subject to change without notice. Thi s pub lication supersedes and replaces all information previously supplied. STMicroelectronics prod ucts are not authori zed for use as critical components in life suppo rt devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Swit zerland - United Kingdom © http://w ww.st.com 9/9