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74AC10MTR

74AC10MTR

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    SO-14_8.65X3.9MM

  • 描述:

    IC GATE NAND 3CH 3-INP 14SO

  • 数据手册
  • 价格&库存
74AC10MTR 数据手册
74AC10 TRIPLE 3-INPUT NAND GATE ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 4ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 2µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) 50Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 10 IMPROVED LATCH-UP IMMUNITY DIP TSSOP ORDER CODES DESCRIPTION The 74AC10 is an advanced high-speed CMOS TRIPLE 3-INPUT NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. ) s ( ct SOP PACKAGE TUBE DIP SOP TSSOP 74AC10B 74AC10M ) s t( T&R o r P c u d 74AC10MTR 74AC10TTR The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. e t le o s b O - u d o r P e PIN CONNECTION AND IEC LOGIC SYMBOLS t e l o s b O April 2001 1/8 74AC10 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 1, 3, 9 2, 4, 10 13, 5, 11 12, 6, 8 7 1A to 3A 1B to 3B 1C to 3C 1Y to 3Y GND VCC 14 NAME AND FUNCTION Data Inputs Data Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage TRUTH TABLE A B C Y L X X H X L X H X X L H H H H L X= Don’t care c u d ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Supply Voltage VI DC Input Voltage VO DC Output Voltage IIK DC Input Diode Current IOK DC Output Diode Current IO DC Output Current e t le ICC or IGND DC VCC or Ground Current ) s ( ct Tstg Storage Temperature TL Lead Temperature (10 sec) o r P Value o s b O - ) s t( Unit -0.5 to +7 V -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 V ± 20 mA ± 20 mA ± 50 mA V ± 200 mA -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. u d o RECOMMENDED OPERATING CONDITIONS r P e Symbol VI Supply Voltage Value Unit 2 to 6 V V Input Voltage 0 to VCC VO Output Voltage 0 to VCC V Top Operating Temperature -55 to 125 °C 8 ns/V s b O dt/dv Input Rise and Fall Time VCC = 3.0, 4.5 or 5.5V (note 1) 1) VIN from 30% to 70% of V CC 2/8 Parameter t e l o VCC 74AC10 DC SPECIFICATIONS Test Condition Symbol VIH Parameter High Level Input Voltage Low Level Input Voltage VIL High Level Output Voltage VOH VOL Low Level Output Voltage II Input Leakage Current Quiescent Supply Current ICC IOLD IOHD Dynamic Output Current (note 1, 2) Value TA = 25°C VCC (V) 3.0 4.5 5.5 3.0 4.5 5.5 VO = 0.1 V or VCC-0.1V Min. Typ. 2.1 3.15 3.85 1.5 2.25 2.75 1.5 2.25 2.75 VO = 0.1 V or VCC-0.1V Max. -40 to 85°C -55 to 125°C Min. Min. Max. 2.1 3.15 3.85 0.9 1.35 1.65 Unit Max. 2.1 3.15 3.85 0.9 1.35 1.65 V 0.9 1.35 1.65 3.0 IO=-50 µA 2.9 2.99 2.9 2.9 4.5 IO=-50 µA 4.4 4.49 4.4 4.4 5.49 5.5 IO=-50 µA 5.4 5.4 5.4 3.0 IO=-12 mA 2.56 2.46 2.4 4.5 IO=-24 mA 3.86 3.76 3.7 5.5 IO=-24 mA 4.86 4.76 4.7 uc V V ) s t( 3.0 IO=50 µA 0.002 0.1 0.1 4.5 IO=50 µA 0.001 0.1 5.5 IO=50 µA 0.001 0.1 3.0 IO=12 mA 0.36 od 0.44 0.5 4.5 IO=24 mA 0.5 5.5 0.36 0.44 0.5 5.5 VI = VCC or GND e t le 0.44 IO=24 mA ± 0.1 ±1 ±1 µA 5.5 VI = VCC or GND 2 20 40 µA VOLD = 1.65 V max 75 50 mA VOHD = 3.85 V min -75 -50 mA (s) 5.5 0.36 so b O - 0.1 Pr 0.1 0.1 0.1 0.1 V t c u 1) Maximum test duration 2ms, one output loaded at time 2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50Ω AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf = 3ns) Symbol d o r P e Parameter t e l o tPLH tPHL Propagation Delay Time bs Test Condition Value TA = 25°C -40 to 85°C -55 to 125°C Max. Min. Max. Min. Max. 5.5 8.5 1.0 10.5 1.0 11.0 4.0 6.0 1.0 6.5 1.0 7.0 VCC (V) Min. Typ. 3.3(*) 1.5 (**) 1.5 5.0 Unit ns O (*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5.0V ± 0.5V 3/8 74AC10 CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter Value TA = 25°C VCC (V) CIN Input Capacitance 5.0 CPD Power Dissipation Capacitance (note 1) 5.0 Min. fIN = 10MHz Typ. Max. -40 to 85°C -55 to 125°C Min. Min. Max. Unit Max. 4.5 pF 33 pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/3 (per gate) TEST CIRCUIT c u d e t le ) s ( ct CL = 50pF or equivalent (includes jig and probe capacitance) RL = R1 = 500Ω or equivalent RT = ZOUT of pulse generator (typically 50Ω) u d o o s b O - WAVEFORM: PROPAGATION DELAYS (f=1MHz; 50% duty cycle) r P e t e l o s b O 4/8 o r P ) s t( 74AC10 Plastic DIP-14 MECHANICAL DATA mm DIM. MIN. a1 0.51 B 1.39 TYP. inch MAX. MIN. TYP. 0.020 1.65 0.055 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 15.24 0.600 F 7.1 I 5.1 L c u d e t le 3.3 Z MAX. 1.27 2.54 ) s ( ct o s b O - 0.050 o r P ) s t( 0.280 0.201 0.130 0.100 u d o r P e t e l o s b O P001A 5/8 74AC10 SO-14 MECHANICAL DATA mm DIM. MIN. TYP. A inch MAX. MIN. TYP. MAX. a1 1.75 0.1 0.068 0.2 a2 0.003 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45 (typ.) D 8.55 8.75 0.336 0.344 E 5.8 6.2 0.228 ) s t( 0.244 e 1.27 0.050 e3 7.62 0.300 F 3.8 4.0 0.149 G 4.6 5.3 0.181 L 0.5 1.27 0.019 M e t le 0.68 S 8 (max.) ) s ( ct o r P c u d 0.157 0.208 0.050 0.026 o s b O - u d o r P e t e l o s b O P013G 6/8 74AC10 TSSOP14 MECHANICAL DATA mm DIM. MIN. inch TYP. A MAX. MIN. TYP. MAX. 1.1 0.433 A1 0.05 0.10 0.15 0.002 0.004 0.006 A2 0.85 0.9 0.95 0.335 0.354 0.374 b 0.19 0.30 0.0075 0.0118 c 0.09 0.20 0.0035 0.0079 D 4.9 5 5.1 0.193 0.197 E 6.25 6.4 6.5 0.246 0.252 E1 4.3 4.4 4.48 0.169 0.173 e c u d 0.65 BSC o K 0 L 0.50 o A1 b o r P e du t e l o s b O o 4 8 0.60 0.70 e o r P 0.256 0.176 0.0256 BSC o ) s ( ct A2 A ) s t( 0.201 e t le 0 o s b O - 0.020 K c 4o 8o 0.024 0.028 L E D E1 PIN 1 IDENTIFICATION 1 7/8 74AC10 c u d e t le ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom © http://www.st.com 8/8
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