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74AC273B

74AC273B

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

  • 描述:

    74AC273B - OCTAL D-TYPE FLIP FLOP WITH CLEAR - STMicroelectronics

  • 数据手册
  • 价格&库存
74AC273B 数据手册
74AC273 OCTAL D-TYPE FLIP FLOP WITH CLEAR s s s s s s s s s s HIGH SPEED: fMAX = 250MHz (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 8µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = V NIL = 28 % VCC (MIN.) 50Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 273 IMPROVED LATCH-UP IMMUNITY DIP SOP TSSOP ORDER CODES PACKAGE DIP SOP TSSOP TUBE 74AC273B 74AC273M T&R 74AC273MTR 74AC273TTR DESCRIPTION The 74AC273 is an advanced high-speed CMOS OCTAL D-TYPE FLIP FLOP WITH CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. Information signals applied to D inputs are transfered to the Q output on the positive going edge of the clock pulse. When the CLEAR input is held low, the Q outputs are held low independentely of the other inputs. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS April 2001 1/11 7 4AC273 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2, 5, 6, 9, 12, 15, 16,19 3, 4, 7, 8, 13, 14, 17, 18 11 10 20 SYMBOL CLEAR Q0 to Q7 D0 to D7 CLOCK GND VCC NAME AND FUNCTION Asyncronous Master Reset (Active LOW) Flip-Flop Outputs Data Inputs Clock Input (LOW-to-HIGH Edge Triggered) Ground (0V) Positive Supply Voltage TRUTH TABLE INPUTS CLEAR L H H H X : Don’t Care OUTPUT FUNCTION CLOCK X Q L L H Qn NO CHANGE CLEAR D X L H X LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays 2/11 7 4AC273 ABSOLUTE MAXIMUM RATINGS Symbol V CC VI VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 50 ± 400 -65 to +150 300 Unit V V V mA mA mA mA °C °C ICC or IGND DC VCC or Ground Current Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. RECOMMENDED OPERATING CONDITIONS Symbol V CC VI VO Top dt/dv Supply Voltage Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time VCC = 3.0, 4.5 or 5.5V (note 1) Parameter Value 2 to 6 0 to VCC 0 to VCC -55 to 125 8 Unit V V V °C ns/V 1) VIN from 30% to 70% of VCC 3/11 7 4AC273 DC SPECIFICATIONS Test Condition Symbol Parameter VCC (V) 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 3.0 4.5 5.5 VOL Low Level Output Voltage 3.0 4.5 5.5 3.0 4.5 5.5 II ICC IOLD IOHD Input Leakage Current Quiescent Supply Current Dynamic Output Current (note 1, 2) 5.5 5.5 5.5 VO = 0.1 V or VCC-0.1V VO = 0.1 V or VCC-0.1V IO=-50 µA IO=-50 µA IO=-50 µA IO =-12 mA IO =-24 mA IO =-24 mA IO=50 µA IO=50 µA IO=50 µA IO =12 mA IO =24 mA IO =24 mA VI = VCC or GND VI = VCC or GND VOLD = 1.65 V max VOHD = 3.85 V min 2.9 4.4 5.4 2.56 3.86 4.86 0.002 0.001 0.001 0.1 0.1 0.1 0.36 0.36 0.36 ± 0.1 8 TA = 25°C Min. 2.1 3.15 3.85 Typ. 1.5 2.25 2.75 1.5 2.25 2.75 2.99 4.49 5.49 Max. Value -40 to 85°C Min. 2.1 3.15 3.85 0.9 1.35 1.65 2.9 4.4 5.4 2.46 3.76 4.76 0.1 0.1 0.1 0.44 0.44 0.44 ±1 80 75 -75 0.9 1.35 1.65 2.9 4.4 5.4 2.4 3.7 4.7 0.1 0.1 0.1 0.5 0.5 0.5 ±1 160 50 -50 µA µA mA mA V V Max. -55 to 125° C Min. 2.1 3.15 3.85 0.9 1.35 1.65 Max. V Unit VIH High Level Input Voltage Low Level Input Voltage High Level Output Voltage V IL V VOH 1) Maximum test duration 2ms, one output loaded at time 2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50Ω 4/11 7 4AC273 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf = 3ns) Test Condition Symbol Parameter VCC (V) 3.3 (*) Value TA = 25°C Min. 4.0 3.0 4.0 3.0 5.5 4.0 5.5 4.0 5.5 4.0 1.5 1.5 4.0 3.0 90 140 250 Typ. 7.5 5.0 8.5 6.5 Max. 12.5 9.0 13.0 10.0 -40 to 85°C Min. 3.0 2.5 3.0 2.5 6.0 4.5 6.0 4.5 6.0 4.5 1.5 1.5 4.5 3.0 75 125 Max. 14.0 10.0 14.0 11.0 -55 to 125° C Min. 3.0 2.5 3.0 2.5 6.0 4.5 6.0 4.5 6.0 4.5 1.5 1.5 4.5 3.0 75 125 ns ns Max. 16.0 11.0 16.0 12.0 ns ns Unit tPLH tPHL Propagation Delay Time CLOCK to Q tPHL Propagation Delay Time CLEAR to Q tW CLEAR Pulse Width, LOW tW ts CLOCK Pulse Width Setup Time D to CLOCK, HIGH or LOW Hold Time D to CLOCK, HIGH or LOW Recovery Time CLEAR to CLOCK Maximum Clock Frequency 5.0(**) 3.3 (*) 5.0 (**) 3.3 (*) 5.0(**) 3.3 (*) 5.0 (**) ns ns 3.3 (*) 5.0 (**) th 3.3 (*) 5.0(**) 3.3 (*) 5.0(**) 3.3 (*) 5.0 (**) tREM fMAX ns MHz (*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5.0V ± 0.5V CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter VCC (V) 5.0 5.0 fIN = 10MHz TA = 25°C Min. Typ. 4 32 Max. Value -40 to 85°C Min. Max. -55 to 125° C Min. Max. pF pF Unit CIN C PD Input Capacitance Power Dissipation Capacitance (note 1) 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/8 (per circuit) 5/11 7 4AC273 TEST CIRCUIT C L = 50pF or equivalent (includes jig and probe capacitance) R L = R1 = 500Ω or equivalent R T = ZOUT of pulse generator (typically 50Ω) WAVEFORM 1: PROPAGATION DELAYS, SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle) 6/11 7 4AC273 WAVEFORM 2: PROPAGATION DELAYS (f=1MHz; 50% duty cycle) WAVEFORM 3: RECOVERY TIME (f=1MHz; 50% duty cycle) 7/11 7 4AC273 Plastic DIP-20 (0.25) MECHANICAL DATA mm MIN. a1 B b b1 D E e e3 F I L Z 3.3 1.34 8.5 2.54 22.86 7.1 3.93 0.130 0.053 0.254 1.39 0.45 0.25 25.4 0.335 0.100 0.900 0.280 0.155 1.65 TYP. MAX. MIN. 0.010 0.055 0.018 0.010 1.000 0.065 inch TYP. MAX. DIM. P001J 8/11 7 4AC273 SO-20 MECHANICAL DATA DIM. MIN. A a1 a2 b b1 C c1 D E e e3 F L M S 7.40 0.50 12.60 10.00 1.27 11.43 7.60 1.27 0.75 8 (max.) 0.291 0.19 13.00 10.65 0.35 0.23 0.50 45 (typ.) 0.496 0.393 0.050 0.450 0.299 0.050 0.029 0.512 0.419 0.10 mm TYP. MAX. 2.65 0.20 2.45 0.49 0.32 0.013 0.009 0.020 0.004 MIN. inch TYP. MAX. 0.104 0.007 0.096 0.019 0.012 P013L 9/11 7 4AC273 TSSOP20 MECHANICAL DATA mm MIN. A A1 A2 b c D E E1 e K L 0o 0.50 0.05 0.85 0.19 0.09 6.4 6.25 4.3 6.5 6.4 4.4 0.65 BSC 4o 0.60 8o 0.70 0o 0.020 0.10 0.9 TYP. MAX. 1.1 0.15 0.95 0.30 0.2 6.6 6.5 4.48 0.002 0.335 0.0075 0.0035 0.252 0.246 0.169 0.256 0.252 0.173 0.0256 BSC 4o 0.024 8o 0.028 0.004 0.354 MIN. inch TYP. MAX. 0.433 0.006 0.374 0.0118 0.0079 0.260 0.256 0.176 DIM. A A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 10/11 7 4AC273 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringe ment of patents or other righ ts of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this pub lication are subject to change without notice. Thi s pub lication supersedes and replaces all information previously supplied. STMicroelectronics prod ucts are not authori zed for use as critical components in life suppo rt devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Swit zerland - United Kingdom © http://w ww.st.com 11/11
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