74ACT257TTR

74ACT257TTR

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    TSSOP-16

  • 描述:

    IC MULTIPLEXER 4 X 2:1 16TSSOP

  • 数据手册
  • 价格&库存
74ACT257TTR 数据手册
74ACT257 QUAD 2 CHANNEL MULTIPLEXER (3-STATE) ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 4 µA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN.), V IL = 0.8V (MAX.) 50Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 257 IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74ACT257 is an advanced high-speed CMOS QUAD 2-CHANNEL MULTIPLEXER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. It is composed of an independent 2-channel multiplexer with common SELECT and ENABLE (OE)inputs. It is a non-inverting multiplexer. When the ENABLE input is held HIGH, the outputs are forced to a high impedance state. When the DIP SOP TSSOP ORDER CODES PACKAGE TUBE DIP SOP TSSOP 74ACT257B 74ACT257M T&R 74ACT257MTR 74ACT257TTR SELECT input is held LOW, "A" data is selected; when SELECT input is held HIGH, "B" data is selected. The device is designed to interface directly High Speed CMOS systems with TTL, NMOS and CMOS output voltage levels. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS April 2001 1/11 74ACT257 INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 1 SELECT 2, 5, 11, 14 1A to 4A 3, 6, 10, 13 1B to 4B 4, 7, 9, 12 15 1Y to 4Y OE 8 16 GND VCC Common Data Select Inputs Data Inputs From Source A Data Inputs From Source B Multiplexer Outputs 3 State Output Enable Inputs (Active LOW) Ground (0V) Positive Supply Voltage TRUTH TABLE INPUTS OE SELECT A B Y H L L L L X L L H H X L H X X X X X L H Z L H L H X : Don’t Care Z : High Impedance LOGIC DIAGRAM This logic diagram has not be used to estimate propagation delays 2/11 OUTPUT 74ACT257 ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Supply Voltage Value Unit -0.5 to +7 V -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 V DC Input Diode Current ± 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 50 mA ± 200 mA VI DC Input Voltage VO DC Output Voltage IIK ICC or IGND DC VCC or Ground Current Tstg Storage Temperature TL Lead Temperature (10 sec) V -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Value Unit Supply Voltage 4.5 to 5.5 V VI Input Voltage 0 to VCC V VO Output Voltage 0 to VCC V Top Operating Temperature -55 to 125 °C 8 ns/V dt/dv Input Rise and Fall Time VCC = 4.5 to 5.5V (note 1) 1) VIN from 0.8V to 2.0V 3/11 74ACT257 DC SPECIFICATIONS Test Condition Symbol Parameter Value TA = 25°C VCC (V) Min. Typ. 2.0 2.0 1.5 1.5 Max. -40 to 85°C -55 to 125°C Min. Min. Max. VIH High Level Input Voltage 4.5 5.5 VO = 0.1 V or VCC-0.1V VIL Low Level Input Voltage 4.5 5.5 VO = 0.1 V or VCC-0.1V VOH High Level Output Voltage 4.5 IO=-50 µA 4.4 4.49 4.4 4.4 5.5 IO=-50 µA 5.4 5.49 5.4 5.4 4.5 IO=-24 mA 3.86 3.76 3.7 4.86 VOL II IOZ ICCT Low Level Output Voltage Input Leakage Current High Impedance Output Leakege Current Max ICC/Input 1.5 1.5 0.8 0.8 Max. 2.0 2.0 0.8 0.8 V 0.8 0.8 V 5.5 IO=-24 mA 4.5 IO=50 µA 0.001 0.1 0.1 0.1 5.5 IO=50 µA 0.001 0.1 0.1 0.1 4.5 IO=24 mA 0.36 0.44 0.5 5.5 IO=24 mA 0.36 0.44 0.5 5.5 VI = VCC or GND ± 0.1 ±1 ±1 µA 5.5 VI = VIH or VIL VO = VCC or GND ± 0.5 ±5 ±5 mA 1.5 1.6 mA 40 80 µA VOLD = 1.65 V max 75 50 mA VOHD = 3.85 V min -75 -50 mA 5.5 VI = VCC - 2.1V ICC Quiescent Supply Current 5.5 VI = VCC or GND IOLD Dynamic Output Current (note 1, 2) 5.5 IOHD 2.0 2.0 Unit 4.76 0.6 4 4.7 V 1) Maximum test duration 2ms, one output loaded at time 2) Incident wave switching is guaranteed on trasmission lines with impedances as low as 50Ω AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf = 3ns) Test Condition Symbol Parameter tPLH tPHL Propagation Delay Time A, B to Y tPLH tPHL Propagation Delay Time SELECT to Y tPZL tPZH Output Enable Time tPLZ tPHZ Output Disable Time (*) Voltage range is 5.0V ± 0.5V 4/11 VCC (V) Value TA = 25°C Min. -40 to 85°C -55 to 125°C Min. Min. Max. Unit Typ. Max. Max. 5.0(*) 5.0 8.0 9.0 9.0 ns 5.0(*) 6.0 9.0 10.0 10.0 ns 5.0(*) 5.0 8.0 9.0 9.0 ns 5.0(*) 6.0 9.0 10.0 10.0 ns 74ACT257 CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter CIN Input Capacitance COUT Output Capacitance Power Dissipation Capacitance (note 1) CPD Value TA = 25°C VCC (V) Min. Typ. Max. -40 to 85°C -55 to 125°C Min. Min. Max. Unit Max. 5.0 5 pF 5.0 8 pF 25 pF 5.0 fIN = 10MHz 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/n (per circuit) TEST CIRCUIT TEST SWITCH tPLH, tPHL Open tPZL, tPLZ 2VCC tPZH, tPHZ Open CL = 50pF or equivalent (includes jig and probe capacitance) RL = R1 = 500Ω or equivalent RT = ZOUT of pulse generator (typically 50Ω) 5/11 74ACT257 WAVEFORM 1: PROPAGATION DELAYS FOR INVERTING CONDITIONS (f=1MHz; 50% duty cycle) WAVEFORM 2: PROPAGATION DELAYS FOR NON-INVERTING CONDITIONS (f=1MHz; 50% duty cycle) 6/11 74ACT257 WAVEFORM 3: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle) 7/11 74ACT257 Plastic DIP-16 (0.25) MECHANICAL DATA mm DIM. MIN. a1 0.51 B 0.77 TYP. inch MAX. MIN. TYP. MAX. 0.020 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L Z 3.3 0.130 1.27 0.050 P001C 8/11 74ACT257 SO-16 MECHANICAL DATA mm DIM. MIN. TYP. A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.2 a2 MAX. 0.004 0.007 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45 (typ.) D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 0.024 8 (max.) P013H 9/11 74ACT257 TSSOP16 MECHANICAL DATA mm DIM. MIN. inch TYP. A MAX. MIN. MAX. 1.1 0.433 A1 0.05 0.10 0.15 0.002 0.004 0.006 A2 0.85 0.9 0.95 0.335 0.354 0.374 b 0.19 0.30 0.0075 0.0118 c 0.09 0.20 0.0035 0.0079 D 4.9 5 5.1 0.193 0.197 0.201 E 6.25 6.4 6.5 0.246 0.252 0.256 E1 4.3 4.4 4.48 0.169 0.173 0.176 e 0.65 BSC 0.0256 BSC K 0o 4o 8o 0o 4o 8o L 0.50 0.60 0.70 0.020 0.024 0.028 A A2 A1 b e K c E1 PIN 1 IDENTIFICATION 1 L E D 10/11 TYP. 74ACT257 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom © http://www.st.com 11/11
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