74ACT280
9 BIT PARITY GENERATOR/CHECKER
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HIGH SPEED: tPD = 7ns (TYP.) at VCC = 5V
LOW POWER DISSIPATION:
ICC = 4µA(MAX.) at TA=25°C
COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN.), V IL = 0.8V (MAX.)
50Ω TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24mA (MIN)
BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 280
IMPROVED LATCH-UP IMMUNITY
DIP
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TSSOP
ORDER CODES
DESCRIPTION
The 74ACT280 is an advanced high-speed CMOS
9 BIT PARITY GENERATOR CHECKER
fabricated with sub-micron silicon gate and
double-layer metal wiring C2MOS tecnology.
It is composed of nine data inputs (A to I) and odd/
even parity outputs (ΣODD and ΣEVEN). The nine
data inputs control the output conditions. When
the number of high level input is odd, ΣODD
output is kept high and ΣEVEN output low.
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TUBE
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TSSOP
74ACT280B
74ACT280M
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74ACT280MTR
74ACT280TTR
Conservely, when the output is even, ΣEVEN
output is kept high and ΣODD low.
The IC generates either odd or even parity making
it flexible application. The word-length capability is
easly expanded by cascading.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
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PIN CONNECTION AND IEC LOGIC SYMBOLS
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April 2001
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74ACT280
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL
NAME AND FUNCTION
ΣEVEN
5, 6
8, 9, 10, 11,
12, 13, 1, 2,
4
3
7
14
Parity Outputs
ΣODD
A to I
Data Inputs
NC
GND
VCC
No Connection
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
OUTPUT
NUMBER OF INPUTS A - I THAT ARE HIGH
ΣEVEN
0, 2, 4, 6, 8
1, 3, 5, 7, 9
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LOGIC DIAGRAM
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ΣODD
L
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74ACT280
ABSOLUTE MAXIMUM RATINGS
Symbol
VCC
Parameter
Value
Supply Voltage
Unit
-0.5 to +7
V
-0.5 to VCC + 0.5
-0.5 to VCC + 0.5
V
DC Input Diode Current
± 20
mA
IOK
DC Output Diode Current
± 20
mA
IO
DC Output Current
± 50
mA
± 200
mA
VI
DC Input Voltage
VO
DC Output Voltage
IIK
ICC or IGND DC VCC or Ground Current
Tstg
Storage Temperature
TL
Lead Temperature (10 sec)
V
-65 to +150
°C
300
°C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Parameter
Value
Unit
uc
Supply Voltage
4.5 to 5.5
VI
Input Voltage
0 to VCC
VO
Output Voltage
Top
Operating Temperature
dt/dv
1) VIN from 0.8V to 2.0V
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Input Rise and Fall Time VCC = 4.5 to 5.5V (note 1)
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V
V
0 to VCC
V
-55 to 125
°C
8
ns/V
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74ACT280
DC SPECIFICATIONS
Test Condition
Symbol
VIH
Parameter
Value
TA = 25°C
VCC
(V)
Max.
-40 to 85°C
-55 to 125°C
Min.
Min.
Min.
Typ.
2.0
1.5
2.0
2.0
1.5
2.0
Max.
Max.
High Level Input
Voltage
4.5
5.5
VO = 0.1 V or
VCC-0.1V
VIL
Low Level Input
Voltage
4.5
5.5
VO = 0.1 V or
VCC-0.1V
VOH
High Level Output
Voltage
4.5
IO=-50 µA
4.4
4.49
4.4
4.4
5.5
IO=-50 µA
5.4
5.49
5.4
5.4
4.5
IO=-24 mA
3.86
3.76
3.7
5.5
IO=-24 mA
4.86
4.76
4.7
4.5
IO=50 µA
0.001
0.1
0.1
0.1
5.5
IO=50 µA
0.001
0.1
0.1
0.1
4.5
IO=24 mA
0.36
0.44
5.5
IO=24 mA
0.36
0.44
5.5
VI = VCC or GND
± 0.1
±1
5.5
VI = VCC - 2.1V
VI = VCC or GND
VOL
Low Level Output
Voltage
II
ICCT
Input Leakage Current
Max ICC/Input
ICC
Quiescent Supply
Current
5.5
IOLD
Dynamic Output
Current (note 1, 2)
5.5
IOHD
1.5
1.5
0.8
0.8
2.0
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VOLD = 1.65 V max
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0.8
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1.5
4
VOHD = 3.85 V min
2.0
0.8
0.8
0.6
Unit
40
0.5
±1
µA
1.6
mA
80
µA
75
50
mA
-75
-50
mA
1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50Ω
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf = 3ns)
(s)
Test Condition
Symbol
Parameter
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tPLH tPHL Propagation Delay
Time (Input ΣODD, ΣEVEN)
VCC
(V)
ct
du
5.0(*)
Value
TA = 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
3.0
7.0
13.0
2.0
14.5
2.0
14.5
Unit
ns
(*) Voltage range is 5.0V ± 0.5V
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CAPACITIVE CHARACTERISTICS
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Symbol
Parameter
Test Condition
TA = 25°C
VCC
(V)
CIN
Input Capacitance
5.0
CPD
Power Dissipation
Capacitance (note
1)
5.0
Value
Min.
fIN = 10MHz
Typ.
Max.
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
Unit
Max.
4
pF
67
pF
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x f IN + ICC/n (per circuit)
4/9
74ACT280
TEST CIRCUIT
CL = 50pF or equivalent (includes jig and probe capacitance)
RL = R1 = 500Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
WAVEFORM: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
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74ACT280
Plastic DIP-14 MECHANICAL DATA
mm
DIM.
MIN.
a1
0.51
B
1.39
TYP.
inch
MAX.
MIN.
TYP.
0.020
1.65
0.055
0.065
b
0.5
0.020
b1
0.25
0.010
D
20
0.787
E
8.5
0.335
e
2.54
0.100
e3
15.24
0.600
F
7.1
I
5.1
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3.3
Z
MAX.
1.27
2.54
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0.280
0.201
0.130
0.100
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P001A
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74ACT280
SO-14 MECHANICAL DATA
mm
DIM.
MIN.
TYP.
A
inch
MAX.
MIN.
TYP.
MAX.
a1
1.75
0.1
0.068
0.2
a2
0.003
0.007
1.65
0.064
b
0.35
0.46
0.013
0.018
b1
0.19
0.25
0.007
0.010
C
0.5
0.019
c1
45 (typ.)
D
8.55
8.75
0.336
0.344
E
5.8
6.2
0.228
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0.244
e
1.27
0.050
e3
7.62
0.300
F
3.8
4.0
0.149
G
4.6
5.3
0.181
L
0.5
1.27
0.019
M
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0.68
S
8 (max.)
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0.157
0.208
0.050
0.026
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P013G
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74ACT280
TSSOP14 MECHANICAL DATA
mm
DIM.
MIN.
inch
TYP.
A
MIN.
TYP.
MAX.
1.1
0.433
A1
0.05
0.10
0.15
0.002
0.004
0.006
A2
0.85
0.9
0.95
0.335
0.354
0.374
b
0.19
0.30
0.0075
0.0118
c
0.09
0.20
0.0035
0.0079
D
4.9
5
5.1
0.193
0.197
E
6.25
6.4
6.5
0.246
0.252
E1
4.3
4.4
4.48
0.169
0.173
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0.50
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A1
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4
8
0.60
0.70
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1
0.020
K
c
0.176
4o
8o
0.024
0.028
L
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D
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PIN 1 IDENTIFICATION
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0.256
0.0256 BSC
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0.201
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0.65 BSC
A
8/9
MAX.
74ACT280
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
© The ST logo is a registered trademark of STMicroelectronics
© 2001 STMicroelectronics - Printed in Italy - All Rights Reserved
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