74LCX257MTR

74LCX257 LOW VOLTAGE CMOS QUAD 2 CHANNEL MULTIPLEXER WITH 5V TOLERANT INPUTS AND OUTPUTS (3-STATE) ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ 5V TOLERANT INPUTS AND OUTPUTS HIGH SPEED: tPD = 6.0 ns (MAX.) at VCC = 3V POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24mA (MIN) at VCC = 3V PCI BUS LEVELS GUARANTEED AT 24 mA BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2.0V to 3.6V (1.5V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 257 LATCH-UP PERFORMANCE EXCEEDS 500mA (JESD 17) ESD PERFORMANCE: HBM > 2000V (MIL STD 883 method 3015); MM > 200V DESCRIPTION The 74LCX257 is a low voltage CMOS QUAD 2 CHANNEL MULTIPLEXER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for both inputs and outputs. Figure 1: Pin Connection And IEC Logic Symbols September 2004 SOP TSSOP Table 1: Order Codes PACKAGE T&R SOP TSSOP 74LCX257MTR 74LCX257TTR It is composed of four independent 2 channel multiplexers with common SELECT and ENABLE (OE) INPUT. The 74LCX257 is a non-inverting multiplexer. When the ENABLE INPUT is held "High", all outputs become in high impedance state. If SELECT INPUT is held "Low", "A" data is selected, when SELECT INPUT is "High", "B" data is chosen. It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. Rev. 4 1/13 74LCX257 Figure 2: Input And Output Equivalent Circuit Table 2: Pin Description PIN N° SYMBOL 1 2, 5, 11, 14 3, 6, 10, 13 4, 7, 9, 12 15 8 16 SELECT 1A to 4A 1B to 4B 1Y to 4Y OE GND VCC NAME AND FUNCTION Common Data Select Inputs Data Inputs From Source A Data Inputs From Source B 3 State Multiplexer Outputs 3 State Output Enable Inputs (Active LOW) Ground (0V) Positive Supply Voltage Table 3: Truth Table INPUTS OE SELECT A B Y H L L L L X L L H H X L H X X X X X L H Z L H L H X : Don’t Care Z : High Impedance 2/13 OUTPUT 74LCX257 Figure 3: Logic Diagram This logic diagram has not be used to estimate propagation delays Table 4: Absolute Maximum Ratings Symbol Value Unit Supply Voltage -0.5 to +7.0 V VI DC Input Voltage -0.5 to +7.0 V VO DC Output Voltage (OFF State) VO DC Output Voltage (High or Low State) (note 1) VCC Parameter IIK DC Input Diode Current IOK DC Output Diode Current (note 2) -0.5 to +7.0 V -0.5 to VCC + 0.5 - 50 V mA - 50 mA IO DC Output Current ± 50 mA ICC DC Supply Current per Supply Pin ± 100 mA IGND DC Ground Current per Supply Pin Tstg Storage Temperature TL Lead Temperature (10 sec) ± 100 mA -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied 1) IO absolute maximum rating must be observed 2) VO < GND 3/13 74LCX257 Table 5: Recommended Operating Conditions Symbol VCC Parameter Supply Voltage (note 1) Value Unit 2.0 to 3.6 V VI Input Voltage 0 to 5.5 V VO Output Voltage (OFF State) 0 to 5.5 V VO Output Voltage (High or Low State) 0 to VCC V ± 24 mA IOH, IOL High or Low Level Output Current (VCC = 3.0 to 3.6V) IOH, IOL High or Low Level Output Current (VCC = 2.7V) Top dt/dv Operating Temperature Input Rise and Fall Time (note 2) ± 12 mA -55 to 125 °C 0 to 10 ns/V 1) Truth Table guaranteed: 1.5V to 3.6V 2) VIN from 0.8V to 2V at VCC = 3.0V Table 6: DC Specifications Test Condition Symbol VIH VIL VOH Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Ioff IOZ ICC ∆ICC 4/13 Input Leakage Current Power Off Leakage Current High Impedance Output Leakage Current Quiescent Supply Current ICC incr. per Input Min. Max. 2.0 -55 to 125 °C Min. Unit Max. 2.0 V 2.7 to 3.6 0.8 0.8 2.7 to 3.6 IO=-100 µA VCC-0.2 VCC-0.2 2.7 IO=-12 mA 2.2 2.2 IO=-18 mA 2.4 2.4 IO=-24 mA 2.2 2.7 to 3.6 V V 2.2 IO=100 µA 0.2 0.2 IO=12 mA 0.4 0.4 IO=16 mA 0.4 0.4 IO=24 mA 0.55 0.55 2.7 to 3.6 VI = 0 to 5.5V ±5 ±5 µA 0 VI or VO = 5.5V 10 10 µA 2.7 to 3.6 VI = VIH or VIL VO = 0 to VCC ±5 ±5 µA 2.7 3.0 II -40 to 85 °C VCC (V) 3.0 VOL Value 2.7 to 3.6 VI = VCC or GND VI or VO= 3.6 to 5.5V VIH = VCC - 0.6V 2.7 to 3.6 10 10 ± 10 ± 10 500 500 V µA µA 74LCX257 Table 7: Dynamic Switching Characteristics Test Condition Symbol VOLP VOLV Parameter Value TA = 25 °C VCC (V) Dynamic Low Level Quiet Output (note 1) Min. Typ. Max. 0.8 CL = 50pF VIL = 0V, VIH = 3.3V 3.3 Unit V -0.8 1) Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is measured in the LOW state. Table 8: AC Electrical Characteristics Test Condition Symbol Parameter tPLH tPHL Propagation Delay Time (A, B to Y) tPLH tPHL Propagation Delay Time (SELECT to Y) tPZL tPZH Output Enable Time tPLZ tPHZ Output Disable Time tOSLH tOSHL Output To Output Skew Time (note1, 2) VCC (V) 2.7 3.0 to 3.6 2.7 3.0 to 3.6 2.7 3.0 to 3.6 2.7 3.0 to 3.6 3.0 to 3.6 Value CL (pF) RL (Ω) ts = tr (ns) 50 500 2.5 50 500 2.5 50 500 2.5 50 500 2.5 50 500 2.5 -40 to 85 °C -55 to 125 °C Min. Max. Min. Max. 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 6.5 6.0 8.5 7.0 8.5 7.0 6.0 5.5 1.0 1.5 1.5 1.5 1.5 1.5 1.5 1.5 1.5 6.5 6.0 8.5 7.0 8.5 7.0 6.0 5.5 1.0 Unit ns ns ns ns ns 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|, tOSHL = | tPHLm - tPHLn|) 2) Parameter guaranteed by design Table 9: Capacitive Characteristics Test Condition Symbol CIN COUT CPD Parameter Value TA = 25 °C VCC (V) Min. Typ. Unit Max. Input Capacitance 3.3 VIN = 0 to VCC 7 pF Output Capacitance 3.3 VIN = 0 to VCC 8 pF Power Dissipation Capacitance (note 1) 3.3 fIN = 10MHz VIN = 0 or VCC 25 pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per channel) 5/13 74LCX257 Figure 4: Test Circuit TEST SWITCH tPLH, tPHL Open tPZL, tPLZ 6V tPZH, tPHZ GND CL = 50 pF or equivalent (includes jig and probe capacitance) RL = R1 = 500Ω or equivalent RT = ZOUT of pulse generator (typically 50Ω) Figure 5: Waveform - Propagation Delays (f=1MHz; 50% duty cycle) 6/13 74LCX257 Figure 6: Waveform - Output Enable And Disable Time (f=1MHz; 50% duty cycle) 7/13 74LCX257 SO-16 MECHANICAL DATA DIM. mm. MIN. TYP A a1 inch MAX. MIN. TYP. 1.75 0.1 0.068 0.25 a2 MAX. 0.004 0.010 1.64 0.063 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45° (typ.) D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 e3 0.050 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M S 0.62 0.024 8° (max.) 0016020D 8/13 74LCX257 TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0079 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0˚ L 0.45 A 0.60 0.0256 BSC 8˚ 0˚ 0.75 0.018 8˚ 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080338D 9/13 74LCX257 Tape & Reel SO-16 MECHANICAL DATA mm. inch DIM. MIN. A MAX. MIN. 330 13.2 TYP. MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 10/13 TYP 0.504 22.4 0.519 0.882 Ao 6.45 6.65 0.254 0.262 Bo 10.3 10.5 0.406 0.414 Ko 2.1 2.3 0.082 0.090 Po 3.9 4.1 0.153 0.161 P 7.9 8.1 0.311 0.319 74LCX257 Tape & Reel TSSOP16 MECHANICAL DATA mm. inch DIM. MIN. A TYP MAX. MIN. 330 MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 13.2 TYP. 0.504 22.4 0.519 0.882 Ao 6.7 6.9 0.264 0.272 Bo 5.3 5.5 0.209 0.217 Ko 1.6 1.8 0.063 0.071 Po 3.9 4.1 0.153 0.161 P 7.9 8.1 0.311 0.319 11/13 74LCX257 Table 10: Revision History Date Revision 15-Sep-2004 4 12/13 Description of Changes Ordering Codes Revision - pag. 1. 74LCX257 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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