74LVQ4066M

® 74LVQ4066 QUAD BILATERAL SWITCH s s s s s s s HIGH SPEED: tPD = 0.4 ns (TYP.) at VCC = 3.3V tPD = 0.1 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA = 25 oC LOW ”ON” RESISTANCE: RON = 20Ω at VCC = 3.3V, II/O ≤ 1mA RON = 12Ω at VCC = 5V, II/O ≤ 1mA SINE WAVE DISTORTION: 0.04% at VCC = 3.3V, f = 1KHz OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 4066 IMPROVED LATCH-UP IMMUNITY M (Micro Package) T (TSSOP Package) ORDER CODES : 74LVQ4066M 74LVQ4066T technology. It is ideal for low power and low noise 3.3V applications. It has an ON-resistance which is greatly reduced in comparison with 74HC4066. The C input is provided to control the switch; the switch is ON when the C input is held high and OFF when C is held low. DESCRIPTION The LVQ4066 is a low voltage CMOS QUAD BILATERAL SWITCH fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS PIN CONNECTION AND IEC LOGIC SYMBOLS October 1999 1/9 74LVQ4066 LOGIC DIAGRAM PIN DESCRIPTION PIN No 1, 4, 8, 11 2, 3, 9, 10 13, 5, 6, 12 7 14 SYMBOL 1 to 4 I/O 1 to 4 O/I 1C to 4C GND VCC NAME AND FUNCT ION Independent Input/Output Independent Output/Input Enable Input (Active HIGH) Ground (0V) Positive Supply Voltage TRUTH TABLE CONTROL H L SWITCH F UNCTIO N ON OFF ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7 -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 ± 20 ± 20 ± 50 ± 200 -65 to +150 300 Unit V V V mA mA mA mA o o ICC or IGND DC VCC or Ground Current C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO Top dt/dv Input Voltage Output Voltage Operating Temperature: Input Rise and Fall Time (note 2) Parameter Supply Voltage (note 1) Valu e 2 to 5.5 0 to VCC 0 to VCC -40 to +85 0 to 10 Unit V V V o C ns/V 1) Truth Table guaranteed: 1.2V to 5.5V 2) VIN from 30% to70%VCC 2/9 74LVQ4066 DC SPECIFICATIONS Symb ol Parameter V CC (V) VIH VIL R ON High Level Input Voltage Low Level Input Voltage ON Resistance 2.7 to 5.5 3.3 (**) T est Cond ition s Min. 0.7VCC Typ . Value T A = 25 o C Max. 0.3VCC -40 to 85 o C Min . 0.7VCC 0.3VCC 40 24 20 12 10 9.5 2 30 18 15 14 Max. Un it V V 5.0 (*) 3.3(**) 5.0 (*) ∆RON Difference of ON Resistance Between Switches Input/Output Leakage Current (SWITCH OFF) Switch Input Leakage Current (SWITCH ON, OUTPUT OPEN) Control Input Leakage Current Quiescent Supply Current V I = VI H V I/O = V CC to G ND II/ O ≤ 1mA V I = VI H V I/ O = VCC or GND II/ O ≤ 1mA Ω 20 19 V I = VI H 3.0 V I/O = V CC to G ND to 5.5 II/ O ≤ 1mA 5.5 V OS = V CC to GND V IS = V CC to G ND V I = V IL V OS = V CC to GND V I = VI H V I = VCC or GND V I = VCC or GND Ω ±0.1 ±1.0 IOFF µA IIZ 5.5 ±0.1 ±1.0 µA µA µA IIN ICC 5.5 5.5 ±0.1 2 ±1.0 20 (*) Voltage range is 5V ± 0.5V (**) Voltagerange is 3.3V ± 0.3V 3/9 74LVQ4066 AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input t r = tf =3 ns) Symb ol Parameter V CC (V) tPD tPZL tPZH tPLZ tPHZ C IN CI/O CPD Delay Time Output Enable Time Output Disable Time Input Capacitance Switch Terminal Capacitance Power Dissipation Capacitance (note 1) 3.3 5.0 3.3(*) 5.0(**) 3.3(*) 5.0(**) 3.3(*) 5.0(**) R L = 1k Ω R L = 1k Ω Test Co ndition Value T A = 25 o C Min. Typ . Max. 0.4 0.8 0.1 0.2 2.5 2.0 5.0 5.0 5 10 2.5 3 4.0 4.0 7.5 7.5 Un it -40 to 85 o C Min . Max. 1.2 1.0 5.0 5.0 9.0 9.0 ns ns ns pF pF pF 1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operating current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC/4 (switch). (*) Voltage range is 3.3V ± 0.3V (**) Voltagerange is 5V ± 0.5V ANALOG SWITCH CHARACTERISTICS (GND = 0 V, TA = 25oC) Symb ol Parameter V CC (V) 3.3 5.0(*) 3.3 5.0(*) 3.3 5.0(*) 3.3 5.0(*) 3.3 5.0(*) V IN (Vp-p) 2.75 4 Adjust fI N voltage to Obtain 0dBm at V OS . Increase fIN Frequency until dB Meter reads -3dB R L = 50Ω, C L = 10pF VIN is centered at VCC/2. Adjust input for 0dBm RL = 600Ω, CL = 50pF, fIN = 1MHz sine wave R L = 600Ω, CL = 50pF, fIN = 1MHz square wave RL = 600Ω, CL = 50pF, fIN = 1MHz sine wave Test Co nditi on Value Un it Sine Wave Distortion (THD) fMAX Frequency Response (Switch ON) Feedthrough Attenuation (Switch OFF) Crosstalk (Control Input to Signal Output) Crosstalk (Between Any Switches) (*) Voltage range is 5V ± 0.5V fIN = 1 KHz RL = 10KΩ CL = 50 pF 0.04 0.04 150 180 -60 -60 60 60 -60 -60 % MHz dB mV dB 4/9 74LVQ4066 SWITCHING CHARACTERISTICS TEST CIRCUIT tPLZ, tPHZ, tPZL, tPZH. CROSSTALK (control to output) BANDWIDTH AND FEEDTHROUGH ATTENUATION GND (VSS) CI–O CI/O MAXIMUM CONTROL FREQUENCY GND (VSS) 5/9 74LVQ4066 CHANNEL RESISTANCE (RON) ICC (Opr.) 6/9 74LVQ4066 SO-14 MECHANICAL DATA DIM. MIN. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 8.55 5.8 1.27 7.62 4.0 5.3 1.27 0.68 8 (max.) 0.149 0.181 0.019 8.75 6.2 0.35 0.19 0.5 45 (typ.) 0.336 0.228 0.050 0.300 0.157 0.208 0.050 0.026 0.344 0.244 0.1 mm TYP. MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.003 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010 P013G 7/9 74LVQ4066 TSSOP14 MECHANICAL DATA mm MIN. A A1 A2 b c D E E1 e K L 0o 0.50 0.05 0.85 0.19 0.09 4.9 6.25 4.3 5 6.4 4.4 0.65 BSC 4o 0.60 8o 0.70 0o 0.020 0.10 0.9 TYP. MAX. 1.1 0.15 0.95 0.30 0.20 5.1 6.5 4.48 0.002 0.335 0.0075 0.0035 0.193 0.246 0.169 0.197 0.252 0.173 0.0256 BSC 4o 0.024 8o 0.028 0.004 0.354 MIN. inch TYP. MAX. 0.433 0.006 0.374 0.0118 0.0079 0.201 0.256 0.176 DIM. A A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 8/9 74LVQ4066 Information furnished is believed to be accurate and reliable. However, STMicroelectronic s assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems withoutexpress written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 1999 STMicroelectronics – Printed in Italy – All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com . 9/9