74LVQ4066MTR

74LVQ4066 QUAD BILATERAL SWITCH ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 0.4 ns (TYP.) at VCC = 3.3 V tPD = 0.1 ns (TYP.) at VCC = 5 V LOW POWER DISSIPATION: ICC = 2µA (MAX.) at TA=25°C LOW "ON " LOW RESISTANCE RON = 14Ω at VCC = 3.3V, II/O < 1 mA RON = 12Ω at VCC = 5.0V, II/O < 1 mA SINE WAVE DISTORTION: 0.04% at VCC = 3.3V, f = 1KHz OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 4066 IMPROVED LATCH-UP IMMUNITY DESCRIPTION The 74LVQ4066 is a low voltage CMOS QUAD BILATERAL SWITCH fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and low noise 3.3V applications and each switch is designed to handle both analog and digital signals. The switches permit signals with amplitudes up to VCC (peak) to be transmitted in either direction SOP TSSOP Table 1: Order Codes PACKAGE T&R SOP TSSOP 74LVQ4066MTR 74LVQ4066TTR without relevant propagation delay and without generating additional ground bounce noise. It has an ON-Resistance which is greatly reduced in comparison with 74HC4066. It is provided of four individual enable inputs to control the switches; the switch is ON when the C input is held high and OFF (High Impedance) when C is held low. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage. Figure 1: Pin Connection And IEC Logic Symbols July 2004 Rev. 8 1/12 74LVQ4066 Figure 2: Logic Diagram Table 2: Pin Description PIN N° SYMBOL NAME AND FUNCTION 1, 4, 8, 11 2, 3, 9, 10 1 to 4 I/O 1 to 4 O/I 13, 5, 6, 12 1C to 4C 7 GND VCC Independent Input/Output Independent Output/Input Enable Input (Active HIGH) Ground (0V) 14 Positive Supply Voltage Table 3: Truth Table A B H L ON OFF* (*) High Impedance Table 4: Absolute Maximum Ratings Symbol VCC Parameter Supply Voltage Value Unit -0.5 to +7 V -0.5 to VCC + 0.5 -0.5 to VCC + 0.5 V DC Input Diode Current ± 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 50 mA VI DC Input Voltage VO DC Output Voltage IIK ICC or IGND DC VCC or Ground Current Tstg Storage Temperature TL Lead Temperature (10 sec) V ± 200 mA -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied Table 5: Recommended Operating Conditions Symbol VCC Parameter Unit Supply Voltage (note 1) 2 to 5.5 V VI Input Voltage 0 to VCC V VO Output Voltage 0 to VCC V Top Operating Temperature dt/dv Input Rise and Fall Time on control pin VCC = 3.0V (note 2) 1) Truth Table guaranteed: 1.2V to 5.5V 2) VIN from 30% to 70%VCC 2/12 Value -55 to 125 °C 0 to 10 ns/V 74LVQ4066 Table 6: DC Specifications Test Condition Symbol VIH Parameter High Level Input Voltage VIL Low Level Input Voltage RON ON Resistance TA = 25°C VCC (V) Min. 3.3 (**) VI = VIH VI/O =VCC to GND II/O < 1mA 5.0(*) VI = VIH VI/O =VCC or GND II/O < 1mA 5.0(*) IOFF IIZ IIN ICC Difference of ON Resistance Between Switches Input/Output Leakage Current (SWITCH OFF) Switch Input Leakage Current (SWITCH ON, OUTPUT OFF) Control Input Leakage Current Quiescent Supply Current Typ. Max. VI = VIH 3.0 to V =V to GND I/O CC 5.5 II/O < 1mA -40 to 85°C -55 to 125°C Min. Min. Max. 0.7 VCC 0.7 VCC 2.7 to 5.5 3.3 (**) RON Value Unit Max. 0.7 VCC V 0.3 VCC 0.3 VCC 0.3 VCC 16.5 23 32 40 12 17 22 26 12 17 24 30 9.5 13 17 20 V Ω Ω 2 5.5 VOS = VCC to GND VIS = VCC to GND VI = VIL ± 0.1 ± 1.0 ± 1.0 µA 5.5 VOS = VCC to GND VI = VIH ± 0.1 ± 1.0 ± 1.0 µA 5.5 VI = VCC or GND ± 0.1 ± 1.0 ± 1.0 µA 5.5 VI = VCC or GND 2 20 20 µA (*)Voltage range is 5V ±0.5V (**)Voltage range is 3.3V ±0.3V 3/12 74LVQ4066 Table 7: AC Electrical Characteristics (CL = 50 pF, Input tr = tf = 3ns) Test Condition Symbol tPD Parameter Delay Time Value TA = 25°C VCC (V) Min. 3.3(*) 5.0 (**) 3.3(*) 5.0 (**) 3.3(*) 5.0 (**) -55 to 125°C Min. Min. Max. 0.4 0.8 1.2 2.0 0.1 0.2 1.0 1.8 RL = 1 kΩ 2.5 2.0 4.0 4.0 5.0 5.0 7.0 7.0 ns RL = 1 kΩ 5.0 5.0 7.5 7.5 9.0 9.0 11.0 11.0 ns Output Enable Time tPLZ tPHZ Output Disable Time CIN Input Capacitance 5 CI/O Switch Terminal Capacitance Power Dissipation Capacitance (note 1) 10 3.3 Max. Unit Typ. tPZL tPZH CPD -40 to 85°C Max. pF pF 2.5 3 5.0 ns pF 1) CPD is defined as the value of the IC‘s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPDxVCCxfIN+ICC/4 (Switch). (*) Voltage range is 3.3V ± 0.3V (*) Voltage range is 5V ± 0.5V Table 8: Analog Switch Characteristics (GND = 0 V, TA = 25°C) Test Condition Symbol Parameter Sine Wave Distortion (THD) fMAX Frequency Response (Switch ON) VIN (Vp-p) 3.3 5.0(*) 3.3 2.75 4 5.0(*) Value fIN = 1 KHz RL = 10KΩ CL = 50 pF Adjust fIN voltage to Obtain 0dBm at VOS. Increase fIN Frequency until dB Meter reads -3dB RL = 50Ω , CL = 10pF 0.04 0.04 150 180 Feed through 3.3 Attenuation (Switch OFF) 5.0(*) VIN is centered at VCC/2. Adjust input for 0dBm RL = 600Ω, CL = 50pF, FIN = 1 MHz sine wave -60 -60 Crosstalk (Control Input to Signal Output) RL = 600Ω, CL = 50pF, fIN = 1MHz square wave 60 60 -60 -60 Crosstalk (Between Any Switches) (*) Voltage range is 5V ± 0.5V 4/12 VCC (V) 3.3 5.0(*) 3.3 5.0(*) RL = 600Ω, CL = 50pF, fIN = 1MHz sine wave Unit % MHz dB mV dB 74LVQ4066 Figure 3: Switching Characteristics Test Circuit CROSSTALK (control to output) BANDWIDTH AND FEEDTHROUGH ATTENUATION MAXIMUM CONTROL FREQUENCY 5/12 74LVQ4066 Figure 4: Channel Resistance (RON) 6/12 Figure 5: ICC (Opr.) 74LVQ4066 SO-14 MECHANICAL DATA DIM. mm. MIN. TYP inch MAX. MIN. TYP. MAX. A 1.35 1.75 0.053 0.069 A1 0.1 0.25 0.004 0.010 A2 1.10 1.65 0.043 0.065 B 0.33 0.51 0.013 0.020 C 0.19 0.25 0.007 0.010 D 8.55 8.75 0.337 0.344 E 3.8 4.0 0.150 0.157 e 1.27 0.050 H 5.8 6.2 0.228 0.244 h 0.25 0.50 0.010 0.020 L 0.4 1.27 0.016 0.050 k 0° 8° 0° 8° ddd 0.100 0.004 0016019D 7/12 74LVQ4066 TSSOP14 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 D 4.9 5 5.1 0.193 0.197 0.201 E 6.2 6.4 6.6 0.244 0.252 0.260 E1 4.3 4.4 4.48 0.169 0.173 0.176 1 e 0.65 BSC K 0˚ L 0.45 A 0.60 0.0256 BSC 8˚ 0˚ 0.75 0.018 8˚ 0.024 0.030 A2 A1 b e K c L E D E1 PIN 1 IDENTIFICATION 1 0080337D 8/12 74LVQ4066 Tape & Reel SO-14 MECHANICAL DATA mm. inch DIM. MIN. A TYP MAX. MIN. 330 MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 13.2 TYP. 0.504 22.4 0.519 0.882 Ao 6.4 6.6 0.252 0.260 Bo 9 9.2 0.354 0.362 Ko 2.1 2.3 0.082 0.090 Po 3.9 4.1 0.153 0.161 P 7.9 8.1 0.311 0.319 9/12 74LVQ4066 Tape & Reel TSSOP14 MECHANICAL DATA mm. inch DIM. MIN. A MAX. MIN. 330 13.2 TYP. MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 10/12 TYP 0.504 22.4 0.519 0.882 Ao 6.7 6.9 0.264 0.272 Bo 5.3 5.5 0.209 0.217 Ko 1.6 1.8 0.063 0.071 Po 3.9 4.1 0.153 0.161 P 7.9 8.1 0.311 0.319 74LVQ4066 Table 9: Revision History Date Revision 29-Jul-2004 8 Description of Changes Ordering Codes Revision - pag. 1. 11/12 74LVQ4066 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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