74LVX16240TTR

74LVX16240 16-BIT BUS BUFFER WITH 3-STATE OUTPUTS (INVERTED), 5V TOLERANT INPUT ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 5.3 ns (TYP.) at VCC = 3V 5V TOLERANT INPUT LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C INPUT VOLTAGE LEVEL : VIL= 0.8, VIH=2V AT VCC=3V POWER DOWN PROTECTION ON INPUTS & OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention) IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.3V (TYP.) AT VCC=3V TSSOP ORDER CODES PACKAGE TSSOP TUBE T&R 74LVX16240TTR PIN CONNECTION DESCRIPTION The 74LVX16240 is an advanced high-speed CMOS 16-BIT BUS BUFFER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. Any nG output control governs four BUS BUFFERS. Output Enable inputs (nG) tied together give full 16 bit operation. When nG is LOW, the outputs are on. When nG is HIGH, the output are in high impedance state. This device is designed to be used with 3 state memory address drivers, etc. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. February 2003 1/10 74LVX16240 INPUT EQUIVALENT CIRCUIT IEC LOGIC SYMBOLS PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION 1 2, 3, 5, 6 8, 9, 11, 12 13, 14, 16, 17 19, 20, 22, 23 24 25 30, 29, 27, 26 36, 35, 33, 32 41, 40, 38, 37 47, 46, 44, 43 48 4, 10, 15, 21, 28, 34, 39, 45 1G 1Y1 to 1Y4 2Y1 to 2Y4 3Y1 to 3Y4 4Y1 to 4Y4 4G 3G 4A1 to 4A4 3A1 to 3A4 2A1 to 2A4 1A1 to 1A4 2G GND Ground (0V) 7, 18, 31, 42 VCC Positive Supply Voltage Output Enable Input Data Outputs Data Outputs Data Outputs Data Outputs Output Enable Input Output Enable Input Data Input Data Input Data Input Data Input Output Enable Input TRUTH TABLE INPUTS G An Yn L L H L H X H L Z X : Don‘t Care Z : High Impedance 2/10 OUTPUT 74LVX16240 ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Value Unit Supply Voltage -0.5 to +7.0 V VI DC Input Voltage -0.5 to +7.0 V VO DC Output Voltage -0.5 to VCC + 0.5 V IIK DC Input Diode Current - 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ± 75 mA -65 to +150 °C 300 °C ICC or IGND DC VCC or Ground Current Tstg Storage Temperature TL Lead Temperature (10 sec) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied RECOMMENDED OPERATING CONDITIONS Symbol Value Unit Supply Voltage (note 1) 2 to 3.6 V VI Input Voltage 0 to 5.5 V VO Output Voltage 0 to VCC V Top Operating Temperature -55 to 125 °C 0 to 100 ns/V VCC dt/dv Parameter Input Rise and Fall Time (note 2) (VCC = 3.0) 1) Truth Table guaranteed: 1.2 to 3.6V 2) VIN from 0.8 to 2.0V 3/10 74LVX16240 DC SPECIFICATIONS Test Condition Symbol VIH VIL VOH VOL Ioz II ICC 4/10 Parameter High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage High Impedance Output Leakage Current Input Leakage Current Quiescent Supply Current Value TA = 25°C VCC (V) Min. 2.0 3.0 3.6 2.0 3.0 3.6 Typ. Max. 1.5 2.0 2.4 -40 to 85°C -55 to 125°C Min. Min. Max. 1.5 2.0 2.4 0.5 0.8 0.8 Max. 1.5 2.0 2.4 0.5 0.8 0.8 Unit V 0.5 0.8 0.8 V 2.0 IO=-50 µA 1.9 2.0 1.9 1.9 3.0 IO=-50 µA 2.9 3.0 2.9 2.9 3.0 IO=-4 mA 2.58 2.0 IO=50 µA 0.0 3.0 IO=50 µA 0.0 0.1 0.1 0.1 3.0 IO=4 mΑ 0.36 0.44 0.55 3.6 VI = VIH or VIL VO = VCC or GND ±0.25 ± 2.5 ± 2.5 µA 3.6 VI = 5V or GND ± 0.1 ±1 ±1 µA 3.6 VI = VCC or GND 4 40 40 µA 4.5 2.48 0.1 V 2.4 0.1 0.1 V 74LVX16240 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns) Test Condition Symbol tPLH tPHL tPZL tPZH Parameter Propagation Delay Time Output Enable Time tPLZ tPHZ Output Disable Time tOSLH tOSHL Output to Output Skew time (note 1) VCC (V) CL (pF) 2.7 2.7 Value TA = 25°C Min. -40 to 85°C -55 to 125°C Typ. Max. Min. Max. Min. Max. 15 50 5.7 8.0 9.0 12.3 1.0 1.0 10.5 14.0 1.0 1.0 10.5 14.0 3.3(*) 15 5.3 8.4 1.0 10.0 1.0 10.0 3.3(*) 50 7.8 11.9 1.0 13.5 1.0 13.5 2.7 15 RL = 1KΩ 7.0 11.0 1.0 13.5 1.0 13.5 2.7 50 RL = 1KΩ 9.6 15.1 1.0 16.5 1.0 16.5 (*) 3.3 15 RL = 1KΩ 6.6 10.6 1.0 12.5 1.0 12.5 3.3(*) 50 RL = 1KΩ 9.1 14.1 1.0 16.0 1.0 16.0 2.7 50 RL = 1KΩ 10.8 15.0 1.0 16.5 1.0 16.5 3.3(*) 50 RL = 1KΩ 10.3 14.0 1.0 16.0 1.0 16.0 3.3(*) 50 1.5 1.5 1.5 3.3(*) 50 1.0 1.0 1.0 Unit ns ns ns ns (*) Voltage range is 3.3V ± 0.3V Note 1 : Parameter guaranteed by design. tsoLH = |tpLHm - tpLHn|, tsoHL = |tpHLm - tpHLn| CAPACITIVE CHARACTERISTICS Test Condition Symbol Value TA = 25°C Parameter Min. CIN COUT CPD Input Capacitance Output Capacitance Power Dissipation Capacitance (note 1) Typ. Max. 6 10 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF 8 pF 20 pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/8 (per circuit) 5/10 74LVX16240 DYNAMIC SWITCHING CHARACTERISTICS Test Condition Symbol VOLP VOLV VIHD VILD Parameter Dynamic Low Voltage Quiet Output (note 1, 2) Dynamic High Voltage Input (note 1, 3) Dynamic Low Voltage Input (note 1, 3) TA = 25°C VCC (V) Min. 3.3 3.3 Value -0.8 CL = 50 pF 3.3 Typ. Max. 0.3 0.8 -40 to 85°C -55 to 125°C Min. Min. Max. Unit Max. V -0.3 2.0 V 0.8 V 1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (V ILD), 0V to threshold (VIHD), f=1MHz. TEST CIRCUIT TEST SWITCH tPLH, tPHL Open tPZL, tPLZ tPZH, tPHZ VCC CL =15/ 50pF or equivalent (includes jig and probe capacitance) RL = R1 = 1KΩ or equivalent RT = ZOUT of pulse generator (typically 50Ω 6/10 GND 74LVX16240 WAVEFORM 1 : PROPAGATION DELAYS (f=1MHz; 50% duty cycle) WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle) 7/10 74LVX16240 TSSOP48 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. A MIN. TYP. 1.2 A1 0.05 0.047 0.15 A2 MAX. 0.002 0.006 0.9 0.035 b 0.17 0.27 0.0067 0.011 c 0.09 0.20 0.0035 0.0079 D 12.4 12.6 0.488 0.496 E 8.1 BSC E1 6.0 0.318 BSC 6.2 e 0.236 0.5 BSC 0.244 0.0197 BSC K 0˚ 8˚ 0˚ 8˚ L 0.50 0.75 0.020 0.030 A A2 A1 b K e L E c D E1 PIN 1 IDENTIFICATION 1 7065588C 8/10 74LVX16240 Tape & Reel TSSOP48 MECHANICAL DATA mm. inch DIM. MIN. A TYP MAX. MIN. 330 MAX. 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 13.2 TYP. 0.504 30.4 0.519 1.197 Ao 8.7 8.9 0.343 0.350 Bo 13.1 13.3 0.516 0.524 Ko 1.5 1.7 0.059 0.067 Po 3.9 4.1 0.153 0.161 P 11.9 12.1 0.468 0.476 9/10 74LVX16240 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. © http://www.st.com 10/10