74LVX273TTR

74LVX273 LOW VOLTAGE CMOS OCTAL D-TYPE FLIP-FLOP WITH CLEAR (5V TOLERANT INPUTS) ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: fMAX = 150 MHz (TYP.) at VCC = 3.3V 5V TOLERANT INPUTS POWER-DOWN PROTECTION ON INPUTS INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC =3V LOW POWER DISSIPATION: ICC = 4 µA (MAX.) at TA=25°C LOW NOISE: VOLP = 0.3V (TYP.) at VCC =3.3V SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4 mA (MIN) at VCC =3V BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 273 IMPROVED LATCH-UP IMMUNITY SOP Table 1: Order Codes t c u d o r P e t e l o t e l o T&R 74LVX273MTR 74LVX273TTR s b O transferred to the Q outputs on the positive going edge of the clock pulse. When the CLEAR input is held low, the Q outputs are held low independently of the other inputs. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. It combines high speed performance with the true CMOS low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. ) (s DESCRIPTION The 74LVX273 is a low voltage CMOS OCTAL D-TYPE FLIP-FLOP WITH CLEAR fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications. Information signals applied to D inputs are u d o r P e PACKAGE SOP TSSOP ) s ( ct TSSOP s b O Figure 1: Pin Connection And IEC Logic Symbols August 2004 Rev. 3 1/12 74LVX273 Figure 2: Input Equivalent Circuit Table 2: Pin Description PIN N° SYMBOL NAME AND FUNCTION 1 CLEAR 2, 5, 6, 9, 12, 15, 16,19 3, 4, 7, 8, 13, 14, 17, 18 11 Q0 to Q7 Asynchronous Master Reset (Active LOW) Flip-Flop Outputs D0 to D7 Data Inputs CLOCK 10 20 GND VCC Clock Input (LOW-to-HIGH Edge Triggered) Ground (0V) Positive Supply Voltage ) s ( ct Table 3: Truth Table INPUTS CLEAR D B Q L X X L H L H H H X bs O ) Figure 3: Logic Diagram s ( t c u d o r P e t e l o s b O This logic diagram has not be used to estimate propagation delays r P e t e l o L X : Don’t Care 2/12 u d o OUTPUT FUNCTION CLEAR H Qn NO CHANGE 74LVX273 Table 4: Absolute Maximum Ratings Symbol VCC Parameter Supply Voltage VI DC Input Voltage VO DC Output Voltage IIK DC Input Diode Current IOK DC Output Diode Current IO DC Output Current Unit -0.5 to +7.0 V -0.5 to +7.0 V -0.5 to VCC + 0.5 - 20 V mA ± 20 mA ICC or IGND DC VCC or Ground Current Storage Temperature Tstg TL Value ± 25 mA ± 50 mA ) s ( ct -65 to +150 Lead Temperature (10 sec) °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied Table 5: Recommended Operating Conditions Symbol VCC Value let Supply Voltage (note 1) Input Voltage VO Output Voltage Top Operating Temperature dt/dv so Input Rise and Fall Time (note 2) (VCC = 3V) ) (s 1) Truth Table guaranteed: 1.2V to 3.6V 2) VIN from 0.8V to 2.0V b O t c u Table 6: DC Specifications od Test Condition Symbol VIH Parameter e t e ol High Level Input Voltage s b O VIL VOH VOL II ICC r P e Parameter VI Low Level Input Voltage High Level Output Voltage Low Level Output Voltage Input Leakage Current Quiescent Supply Current Pr VCC (V) u d o 2 to 3.6 V 0 to 5.5 V 0 to VCC V -55 to 125 °C 0 to 100 ns/V Value TA = 25°C Min. 2.0 3.0 3.6 2.0 3.0 3.6 Unit Typ. Max. 1.5 2.0 2.4 -40 to 85°C -55 to 125°C Min. Min. Max. 1.5 2.0 2.4 0.5 0.8 0.8 Max. 1.5 2.0 2.4 0.5 0.8 0.8 Unit V 0.5 0.8 0.8 V 2.0 IO=-50 µA 3.0 3.0 2.0 IO=50 µA 0.0 0.1 0.1 0.1 3.0 IO=50 µA 0.0 0.1 0.1 0.1 3.0 IO=4 mA 0.36 0.44 0.55 3.6 VI = 5V or GND ± 0.1 ±1 ±1 µA 3.6 VI = VCC or GND 4 40 40 µA 1.9 2.0 IO=-50 µA 2.9 3.0 IO=-4 mA 2.58 1.9 1.9 2.9 2.9 2.48 2.4 V V 3/12 74LVX273 Table 7: Dynamic Switching Characteristics Test Condition Symbol VOLP Parameter VOLV VILD Min. 3.3 Dynamic High Voltage Input (note 1, 3) Dynamic Low Voltage Input (note 1, 3) VIHD TA = 25°C VCC (V) Dynamic Low Voltage Quiet Output (note 1, 2) Value -0.8 CL = 50 pF 3.3 Typ. Max. 0.3 0.8 -40 to 85°C -55 to 125°C Min. Min. Max. Unit Max. -0.3 V 2.0 3.3 0.8 ) s ( ct 1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD), f=1MHz. Table 8: AC Electrical Characteristics (Input tr = tf = 3ns) Test Condition Symbol tPLH tPHL Parameter tPHL Propagation Delay Time CK to Q Propagation Delay Time CLEAR to Q CLEAR pulse Width, HIGH tW CLOCK pulse Width, HIGH t e l o bs O th 2.7 2.7 15 50 3.3(*) 15 3.3(*) 50 (*) 15 3.3(*) 50 3.3 Recovery Time CLEAR to Q fMAX Maximum Clock Frequency Output to Output Skew Time (note 1,2) let TA = 25°C Min. (s) r P e Value o s b d o r -55 to 125°C Min. Max. Min. Max. 1.0 1.0 20.5 24.0 1.0 1.0 22.0 25.5 Typ. Max. 9.0 11.5 16.9 20.4 7.1 11.0 1.0 13.0 1.0 14.5 9.6 14.5 1.0 16.5 1.0 18.0 -O t c u -40 to 85°C 9.3 17.6 1.0 20.5 1.0 22.0 11.8 21.1 1.0 24.0 1.0 25.5 5.0(**) 15 7.3 11.5 1.0 13.5 1.0 15.5 5.0(**) 2.7 50 9.8 15.0 1.0 17.0 1.0 18.0 (*) 3.3 2.7 (*) 3.3 2.7 Setup Time Q to CLOCK HIGH or LOW 3.3(*) 2.7 Hold Time Q to CLOCK HIGH or LOW 3.3(*) tREM tOSLH tOSHL CL (pF) P e tW(L) tS VCC (V) u d o 2.7 (*) 3.3 2.7 2.7 50 50 50 50 50 5.0 6.0 6.0 5.0 5.0 5.0 5.5 6.5 6.5 5.0 5.0 5.0 5.5 6.5 6.5 4.5 4.5 4.5 1.0 1.0 1.0 1.0 1.0 1.0 2.5 2.5 2.5 2.0 2.0 2.0 15 50 55 45 110 60 55 40 50 35 3.3(*) 15 95 150 80 75 3.3(*) 2.7 50 60 50 0.5 1.0 1.5 1.5 3.3(*) 50 0.5 1.0 1.5 1.5 90 55 Unit ns ns ns ns ns ns ns MHz 50 ns 1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW 2) Parameter guaranteed by design (*) Voltage range is 3.3V ± 0.3V 4/12 74LVX273 Table 4: CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter TA = 25°C VCC (V) CIN Input Capacitance 3.3 CPD Power Dissipation Capacitance (note 1) 3.3 Value Min. fIN = 10MHz Typ. Max. 5 10 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 40 pF pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without ad. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/8 (per circuit) ) s ( ct Figure 5: Test Circuit u d o r P e t e l o ) (s s b O t c u d o r CL =15/50pF or equivalent (includes jig and probe capacitance) RT = ZOUT of pulse generator (typically 50Ω) Figure 6: Waveform - Propagation Delays (f=1MHz; 50% duty cycle) P e t e l o s b O 5/12 74LVX273 Figure 7: Waveform - Propagation Delays, Setup And Hold Times (f=1MHz; 50% duty cycle) ) s ( ct u d o r P e t e l o ) (s t c u s b O Figure 8: Waveform - Recovery Time (f=1MHz; 50% duty cycle) d o r P e t e l o s b O 6/12 74LVX273 SO-20 MECHANICAL DATA mm. DIM. MIN. inch TYP MAX. MIN. TYP. MAX. A 2.35 2.65 0.093 0.104 A1 0.1 0.30 0.004 0.012 B 0.33 0.51 0.013 0.020 C 0.23 0.32 0.009 0.013 D 12.60 13.00 0.496 0.512 E 7.4 7.6 0.291 e 1.27 ) s ( ct 0.299 o r P 0.050 e t e ol H 10.00 10.65 0.394 h 0.25 0.75 0.010 L 0.4 1.27 k 0° 8° (s) ddd 0.100 -O bs du 0.419 0.030 0.016 0.050 0° 8° 0.004 t c u d o r P e t e l o s b O 0016022D 7/12 74LVX273 TSSOP20 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. A MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 c 0.09 0.20 0.004 D 6.4 6.5 6.6 0.252 E 6.2 6.4 6.6 0.244 E1 4.3 4.4 4.48 0.169 1 e K 0˚ L 0.45 r P e let o s b 0.60 0.75 s ( t c r P e 0.256 t e l o 0.260 0.252 0.260 0.173 0.176 0.0256 BSC 0˚ 8˚ 0.018 0.024 0.030 u d o A2 A O ) 8˚ u d o 0.0079 bs 0.65 BSC ) s ( ct 0.012 A1 b O K e L E c D E1 PIN 1 IDENTIFICATION 1 0087225C 8/12 74LVX273 Tape & Reel SO-20 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. A MIN. TYP. MAX. 330 13.2 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 0.504 0.519 ) s ( ct 30.4 1.197 Ao 10.8 11 0.425 Bo 13.2 13.4 0.520 Ko 3.1 3.3 0.122 Po 3.9 4.1 0.153 P 11.9 12.1 0.468 ) (s 0.433 ro P e let so b O du 0.528 0.130 0.161 0.476 t c u d o r P e t e l o s b O 9/12 74LVX273 Tape & Reel TSSOP20 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. A TYP. MAX. 330 13.2 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 0.504 0.519 ) s ( ct 22.4 0.882 Ao 6.8 7 0.268 Bo 6.9 7.1 0.272 Ko 1.7 1.9 0.067 Po 3.9 4.1 0.153 P 11.9 12.1 0.468 ) (s t c u d o r P e t e l o s b O 10/12 MIN. 0.276 ro P e let so b O du 0.280 0.075 0.161 0.476 74LVX273 Table 9: Revision History Date Revision 27-Aug-2004 3 Description of Changes Ordering Codes Revision - pag. 1. ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 11/12 74LVX273 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Information furnished is believed to be accurate and reliable. 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