74V2G03STR

74V2G03 DUAL 2-INPUT OPEN DRAIN NAND GATE s s s s s s HIGH SPEED: tPD = 3.9ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V IMPROVED LATCH-UP IMMUNITY ORDER CODES PACKAGE SOT23-8L SOT23-8L DESCRIPTION The 74V2G03 is an advanced high-speed CMOS DUAL 2-INPUT OPEN DRAIN NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provide high noise immunity and stable output. The device can, with an external pull-up resistor, be used in wired AND configuration. This device T&R 74V2G03STR can also be used as a led driver in any other application requiring current sink. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. PIN CONNECTION AND IEC LOGIC SYMBOLS June 2003 1/7 74V2G03 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN N° 1, 5 2, 6 7, 3 4 8 SYMBOL 1A, 2A 1B, 2B 1Y, 2Y GND VCC NAME QND FUNCTION Data Input Data Input Data Output Ground (0V) Positive Supply Voltage TRUTH TABLE A L L H H Z: High Impedance B L H L H Y Z Z Z L ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 20 ± 20 ± 25 ± 50 -65 to +150 260 Unit V V V mA mA mA mA °C °C ICC or IGND DC VCC or Ground Current Storage Temperature Tstg TL Lead Temperature (10 sec) Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO Top dt/dv Supply Voltage Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time (note 1) (VCC = 3.3 ± 0.3V) (VCC = 5.0 ± 0.5V) Parameter Value 2 to 5.5 0 to 5.5 0 to VCC -55 to 125 0 to 100 0 to 20 Unit V V V °C ns/V ns/V 1) VIN from 30% to 70% of VCC 2/7 74V2G03 DC SPECIFICATIONS Test Condition Symbol Parameter VCC (V) 2.0 3.0 to 5.5 2.0 3.0 to 5.5 2.0 3.0 4.5 3.0 4.5 IOZ High Impedance Output Leakage Current Input Leakage Current Quiescent Supply Current 5.5 0 to 5.5 5.5 IO=50 µA IO=50 µA IO=50 µA IO=4 mA IO=8 mA VI = VIH or VIL VO = VCC or GND VI = 5.5V or GND VI = VCC or GND TA = 25°C Min. 1.5 0.7VCC 0.5 0.3VCC 0.0 0.0 0.0 0.1 0.1 0.1 0.36 0.36 ± 0.25 ± 0.1 1 Typ. Max. Value -40 to 85°C Min. 1.5 0.7VCC 0.5 0.3VCC 0.1 0.1 0.1 0.44 0.44 ± 2.5 ±1 10 Max. -55 to 125°C Min. 1.5 0.7VCC 0.5 0.3VCC 0.1 0.1 0.1 0.55 0.55 ±5 ±1 20 µA µA µA V V V Max. Unit VIH High Level Input Voltage Low Level Input Voltage Low Level Output Voltage VIL VOL II ICC AC ELECTRICAL CHARACTERISTICS Test Condition Symbol Parameter VCC (V) 3.3(*) 3.3 (*) Value TA = 25°C Min. Typ. 4.8 5.3 3.9 4.3 6.8 4.8 Max. 6.5 7.5 5.5 6.0 9.5 6.5 -40 to 85°C Min. 1.0 1.0 1.0 1.0 1.0 1.0 Max. 8.0 9.0 6.5 7.5 10.0 7.0 -55 to 125°C Min. 1.0 1.0 1.0 1.0 1.0 1.0 Max. 9.0 10.0 7.5 8.5 11.0 8.0 ns ns Unit CL (pF) 15 50 15 50 50 50 tPZL Propagation Delay Time 5.0(**) 5.0(**) tPLZ Propagation Delay Time 3.3 5.0 (*) (**) (*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5.0V ± 0.5V 3/7 74V2G03 CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter Min. CIN COUT CPD Input Capacitance Output Capacitance Power Dissipation Capacitance (note 1) TA = 25°C Typ. 4 5 3 Max. 10 10 Value -40 to 85°C Min. Max. 10 10 -55 to 125°C Min. Max. 10 10 pF pF pF Unit 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2 TEST CIRCUIT CL = 15/50pF or equivalent (includes jig and probe capacitance) R1 = 1KΩ or equivalent RT = ZOUT of pulse generator (typically 50Ω) WAVEFORM: PROPAGATION DELAY (f=1MHz; 50% duty cycle) 4/7 74V2G03 SOT23-8L MECHANICAL DATA mm. DIM. MIN. A A1 A2 b C D E E1 e e1 L 0.35 0.90 0.00 0.90 0.22 0.09 2.80 2.60 1.50 0 .65 1.95 0.55 13.7 TYP MAX. 1.45 0.15 1.30 0.38 0.20 3.00 3.00 1.75 MIN. 35.4 0.0 35.4 8.6 3.5 110.2 102.3 59.0 25.6 76.7 21.6 TYP. MAX. 57.1 5.9 51.2 14.9 7.8 118.1 118.1 68.8 mils 5/7 74V2G03 Tape & Reel SOT23-xL MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 3.13 3.07 1.27 3.9 3.9 3.23 3.17 1.37 4.0 4.0 12.8 20.2 60 14.4 3.33 3.27 1.47 4.1 4.1 0.123 0.120 0.050 0.153 0.153 0.127 0.124 0.054 0.157 0.157 13.0 TYP MAX. 180 13.2 0.504 0.795 2.362 0.567 0.131 0.128 0.0.58 0.161 0.161 0.512 MIN. TYP. MAX. 7.086 0.519 inch 6/7 74V2G03 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. © http://www.st.com 7/7