74V2G07STR

74V2G07 TRIPLE BUFFER (OPEN DRAIN) ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD =3.7ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUT OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V IMPROVED LATCH-UP IMMUNITY SOT23-8L ORDER CODES DESCRIPTION The 74V2G07 is an advanced high-speed CMOS TRIPLE BUFFER (OPEN DRAIN) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 2 stages including buffer output, which provide high noise immunity and stable output. ) s ( ct PACKAGE ) s t( T&R c u d SOT23-8L 74V2G07STR Power down protection is provided on input and 0 to 7V can be accepted on input with no regard to the supply voltage. This device can be used to interface 5V to 3V. e t le o r P o s b O - u d o r P e PIN CONNECTION AND IEC LOGIC SYMBOLS t e l o s b O June 2003 1/7 74V2G07 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL 1, 3, 6 7, 5, 2 4 1A, 2A, 3A 1Y, 2Y, 3Y GND VCC 8 NAME QND FUNCTION Data Inputs Data Outputs Ground (0V) Positive Supply Voltage TRUTH TABLE A Y L H L Z Z: High Impedance ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter Value uc Supply Voltage -0.5 to +7.0 VI DC Input Voltage -0.5 to +7.0 VO DC Output Voltage IIK DC Input Diode Current IOK DC Output Diode Current IO DC Output Current e t le ICC or IGND DC VCC or Ground Current Tstg Storage Temperature TL Lead Temperature (10 sec) o s b O - ) s t( Unit V od -0.5 to VCC + 0.5 V - 20 mA ± 20 mA Pr V ± 25 mA ± 50 mA -65 to +150 °C 260 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. ) s ( ct RECOMMENDED OPERATING CONDITIONS Symbol VCC o r P e Supply Voltage VI Input Voltage VO Output Voltage Top Operating Temperature t e l o dt/dv s b O Parameter Input Rise and Fall Time (note 1) (VCC = 3.3 ± 0.3V) (VCC = 5.0 ± 0.5V) 1) VIN from 30% to 70% of VCC 2/7 du Value Unit 2 to 5.5 V 0 to 5.5 V 0 to VCC V -55 to 125 °C 0 to 100 0 to 20 ns/V ns/V 74V2G07 DC SPECIFICATIONS Test Condition Symbol VIH Parameter Low Level Output Voltage High Impedance Output Leakage Current Input Leakage Current Quiescent Supply Current IOZ II ICC Min. 2.0 3.0 to 5.5 2.0 3.0 to 5.5 Low Level Input Voltage VOL TA = 25°C VCC (V) High Level Input Voltage VIL Value Typ. tPZL Propagation Delay Time r P e Propagation Delay Time t e l o Min. Max. 1.5 1.5 0.7VCC 0.7VCC 0.7VCC V 0.5 0.5 0.5 0.3VCC 0.3VCC 0.3VCC 0.0 0.1 0.1 0.1 3.0 IO=50 µA 0.0 0.1 0.1 0.1 4.5 IO=50 µA 0.0 0.1 0.1 0.1 3.0 IO=4 mA 0.36 0.44 0.55 4.5 IO=8 mA 0.36 0.44 5.5 VI = VIH or VIL VO = VCC or GND ± 0.25 ± 2.5 0 to 5.5 VI = 5.5V or GND ± 0.1 ±1 5.5 VI = VCC or GND 1 VCC (V) CL (pF) 3.3(*) 15 (*) 5.0(**) o s b O - ) s t( c u d o r P ±5 µA ±1 µA 20 µA -40 to 85°C -55 to 125°C Typ. Max. Min. Max. Min. Max. 4.8 7.7 1.0 9.0 1.0 10.0 50 5.3 8.5 1.0 10.0 1.0 11.0 15 3.7 5.5 1.0 6.5 1.0 7.5 5.0(**) 50 4.2 7.5 1.0 8.5 1.0 9.5 (*) 50 7.5 10.5 1.0 11.5 1.0 12.5 (**) 50 4.7 7.5 1.0 8.5 1.0 9.5 uc 3.3 3.3 5.0 (t s) V Value TA = 25°C Min. V 0.55 10 e t le Unit Max. IO=50 µA od tPLZ Min. 2.0 Test Condition Parameter -55 to 125°C 1.5 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns) Symbol Max. -40 to 85°C Unit ns ns (*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5.0V ± 0.5V s b O 3/7 74V2G07 CAPACITIVE CHARACTERISTICS Test Condition Symbol Value TA = 25°C Parameter Min. Typ. Max. -40 to 85°C -55 to 125°C Min. Min. Max. Unit Max. CIN Input Capacitance 4 10 10 10 pF COUT Output Capacitance Power Dissipation Capacitance (note 1) 5 10 10 10 pF CPD 3 pF 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/3 TEST CIRCUIT c u d e t le ) s ( ct o s b O - CL = 15/50pF or equivalent (includes jig and probe capacitance) R1 = 1KΩ or equivalent RT = ZOUT of pulse generator (typically 50Ω) u d o WAVEFORM: PROPAGATION DELAY (f=1MHz; 50% duty cycle) r P e t e l o s b O 4/7 o r P ) s t( 74V2G07 SOT23-8L MECHANICAL DATA mm. mils DIM. MIN. TYP MAX. MIN. TYP. MAX. A 0.90 1.45 35.4 57.1 A1 0.00 0.15 0.0 5.9 A2 0.90 1.30 35.4 51.2 b 0.22 0.38 8.6 14.9 C 0.09 0.20 3.5 7.8 D 2.80 3.00 110.2 E 2.60 3.00 102.3 ) s t( E1 1.50 1.75 59.0 e 0 e1 .65 0.35 0.55 ) s ( ct c u d 118.1 68.8 o r P 25.6 e t le 1.95 L 118.1 o s b O - 13.7 76.7 21.6 u d o r P e t e l o s b O 5/7 74V2G07 Tape & Reel SOT23-xL MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. 180 13.0 MAX. 13.2 7.086 C 12.8 D 20.2 0.795 N 60 2.362 T 0.504 0.512 14.4 0.519 0.567 Ao 3.13 3.23 3.33 0.123 0.127 0.131 Bo 3.07 3.17 3.27 0.120 0.124 Ko 1.27 1.37 1.47 0.050 0.054 Po 3.9 4.0 4.1 0.153 0.157 ) s t( P 3.9 4.0 4.1 0.153 e t le ) s ( ct u d o r P e t e l o s b O 6/7 TYP. o s b O - o r P c u d 0.157 0.128 0.0.58 0.161 0.161 74V2G07 c u d e t le ) s ( ct ) s t( o r P o s b O - u d o r P e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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