74V2G125

74V2G125 DUAL BUS BUFFER (3-STATE) s s s s s s s s HIGH SPEED: tPD = 3.8ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1µA(MAX.) at TA = 25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS AND OUTPUTS SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8mA (MIN) at VCC = 4.5V BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V IMPROVED LATCH-UP IMMUNITY SOT23-8L ORDER CODES PACKAGE SOT23-8L T&R 74V2G125STR DESCRIPTION The 74V2G125 is an advanced high-speed CMOS DUAL BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. 3-STATE control input nG has to be set HIGH to place the output into the high impedance state. Power down protection is provided on all inputs and outputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V systems and it is ideal for portable applications like personal digital assistant, camcorder and all battery-powered equipment. All inputs and outputs are equipped with protection circuits against static discharge, giving them ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS June 2003 1/9 74V2G125 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1, 7 2, 5 3, 6 4 8 SYMBOL 1G, 2G 1A, 2A 2Y, 1Y GND VCC NAME AND FUNCTION Output Enable Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage TRUTH TABLE A X L H X: "H" or "L" Z: High Impedance G H L L Y Z L H ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage (see note 1) DC Output Voltage (see note 2) DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 − 20 − 20 ± 25 ± 50 -65 to +150 260 Unit V V V V mA mA mA mA °C °C ICC or IGND DC VCC or Ground Current Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied. 1) VCC=0V or nG=VCC(Output in High Impedance state) 2) High or Low State RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO VO Top dt/dv Supply Voltage Input Voltage Output Voltage (see note 1) Output Voltage (see note 2) Operating Temperature Input Rise and Fall Time (note 3) (VCC = 3.3 ± 0.3V) (VCC = 5.0 ± 0.5V) Parameter Value 2 to 5.5 0 to 5.5 0 to 5.5 0 to VCC -55 to 125 0 to 100 0 to 20 Unit V V V V °C ns/V ns/V 1) VCC=0V or nG=VCC (Output in High Impedance state) 2) High or Low State 3) VIN from 30% to 70% of VCC 2/9 74V2G125 DC SPECIFICATION Test Condition Symbol Parameter VCC (V) 2.0 3.0 to 5.5 2.0 3.0 to 5.5 2.0 3.0 4.5 3.0 4.5 VOL Low Level Output Voltage 2.0 3.0 4.5 3.0 4.5 IOZ High Impedance Output Leakage Current Input Leakage Current Quiescent Supply Current Power down Output Leakage Current 5.5 0 to 5.5 5.5 0 IO=-50 µA IO=-50 µA IO=-50 µA IO=-4 mA IO=-8 mA IO=50 µA IO=50 µA IO=50 µA IO=4 mA IO=8 mA VI = VIH or VIL VO = 5.5 or GND VI = 5.5V or GND VI = VCC or GND VO = 5.5 TA = 25°C Min. 1.5 0.7VCC 0.5 0.3VCC 1.9 2.9 4.4 2.58 3.94 0.0 0.0 0.0 0.1 0.1 0.1 0.36 0.36 ±0.25 ± 0.1 1 0.5 2.0 3.0 4.5 1.9 2.9 4.4 2.48 3.8 0.1 0.1 0.1 0.44 0.44 ± 2.5 ±1 10 5 Typ. Max. Value -40 to 85°C Min. 1.5 0.7VCC 0.5 0.3VCC 1.9 2.9 4.4 2.4 3.7 0.1 0.1 0.1 0.55 0.55 ±5 ±1 20 10 µA µA µA µA V V Max. -55 to 125°C Min. 1.5 0.7VCC 0.5 0.3VCC V V Max. Unit VIH High Level Input Voltage Low Level Input Voltage High Level Output Voltage VIL VOH II ICC IOPD 3/9 74V2G125 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns) Test Condition Symbol Parameter VCC (V) 3.3(*) 3.3(*) 5.0 tPLZ tPHZ Output Disable Time (**) Value TA = 25°C Min. Typ. 5.1 5.6 3.8 4.3 Max. 7.5 8.0 5.5 6.5 8.0 11.5 5.0 7.0 7.6 8.5 5.9 6.5 -40 to 85°C Min. 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max. 8.5 9.5 6.5 7.5 9.0 12.5 6.0 8.0 9.5 10.0 7.0 7.5 -55 to 125°C Min. 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 Max. 9.5 10.5 7.5 8.5 10.0 13.5 7.0 9.0 10.5 11.0 8.0 8.5 ns ns ns Unit CL (pF) 15 50 15 50 15 50 15 50 15 50 15 50 RL = 1 KΩ RL = 1 KΩ RL = 1 KΩ RL = 1 KΩ RL = 1 KΩ RL = 1 KΩ RL = 1 KΩ RL = 1 KΩ tPLH tPHL Propagation Delay Time 5.0(**) 3.3 (*) 5.4 7.9 3.6 5.1 5.4 5.9 3.7 4.1 3.3(*) 5.0(**) 5.0(**) 3.3 (*) (*) tPZL tPZH Output Enable Time 3.3 5.0(**) 5.0(**) (*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5.0V ± 0.5V CAPACITIVE CHARACTERISTICS Test Condition Symbol Parameter Min. CIN COUT CPD Input Capacitance Output Capacitance Power Dissipation Capacitance (note 1) TA = 25°C Typ. 4 6 14 Max. 10 Value -40 to 85°C Min. Max. 10 -55 to 125°C Min. Max. 10 pF pF pF Unit 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/2 4/9 74V2G125 TEST CIRCUIT TEST CIRCUIT TEST tPLH, tPHL tPZL, tPLZ tPZH, tPHZ CL =15/50pF or equivalent (includes jig and probe capacitance) R1 = 1KΩ or equivalent RT = ZOUT of pulse generator (typically 50Ω) SWITCH Open VCC GND WAVEFORM 1 : PROPAGATION DELAYS (f=1MHz; 50% duty cycle) 5/9 74V2G125 WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle) 6/9 74V2G125 SOT23-8L MECHANICAL DATA mm. DIM. MIN. A A1 A2 b C D E E1 e e1 L 0.35 0.90 0.00 0.90 0.22 0.09 2.80 2.60 1.50 0 .65 1.95 0.55 13.7 TYP MAX. 1.45 0.15 1.30 0.38 0.20 3.00 3.00 1.75 MIN. 35.4 0.0 35.4 8.6 3.5 110.2 102.3 59.0 25.6 76.7 21.6 TYP. MAX. 57.1 5.9 51.2 14.9 7.8 118.1 118.1 68.8 mils 7/9 74V2G125 Tape & Reel SOT23-xL MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 3.13 3.07 1.27 3.9 3.9 3.23 3.17 1.37 4.0 4.0 12.8 20.2 60 14.4 3.33 3.27 1.47 4.1 4.1 0.123 0.120 0.050 0.153 0.153 0.127 0.124 0.054 0.157 0.157 13.0 TYP MAX. 180 13.2 0.504 0.795 2.362 0.567 0.131 0.128 0.0.58 0.161 0.161 0.512 MIN. TYP. MAX. 7.086 0.519 inch 8/9 74V2G125 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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