74VHC03TTR

74VHC03 QUAD 2-INPUT OPEN DRAIN NAND GATE ■ ■ ■ ■ ■ ■ ■ ■ HIGH SPEED: tPD = 3.7ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 2 µA (MAX.) at TA=25°C HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) POWER DOWN PROTECTION ON INPUTS OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 03 IMPROVED LATCH-UP IMMUNITY LOW NOISE: VOLP = 0.8V (MAX.) DESCRIPTION The 74VHC03 is an advanced high-speed CMOS QUAD 2-INPUT OPEN DRAIN NAND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which provides high noise immunity and stable output. This device can, with an external pull-up resistor, be used in wired AND configuration. This device can also be used as a led driver and in any other application requiring a current sink. SOP Table 1: Order Codes d o r t e l o T&R 74VHC03MTR 74VHC03TTR s b O Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. ) (s t c u u d o r P e PACKAGE SOP TSSOP ) s ( ct TSSOP P e t e l o s b O Figure 1: Pin Connection And IEC Logic Symbols November 2004 Rev. 4 1/11 74VHC03 Figure 2: Input Equivalent Circuit Table 2: Pin Description PIN N° SYMBOL 1, 4, 9, 12 2, 5, 10, 13 3, 6, 8, 11 7 1A to 4A 1B to 4B 1Y to 4Y GND VCC 14 NAME AND FUNCTION Data Inputs Data Inputs Data Outputs Ground (0V) Positive Supply Voltage Table 3: Truth Table A B Y L L H H L H L H Z Z Z L Value Unit -0.5 to +7.0 V -0.5 to +7.0 V -0.5 to VCC + 0.5 V - 20 mA ± 20 mA Table 4: Absolute Maximum Ratings VCC t e l o Parameter Supply Voltage bs VI DC Input Voltage VO DC Output Voltage IIK DC Input Diode Current IOK DC Output Diode Current IO DC Output Current ICC or IGND DC VCC or Ground Current O ) s ( t c u d o Tstg Storage Temperature TL Lead Temperature (10 sec) Pr u d o r P e Z: High Impedance Symbol ) s ( ct ± 25 mA ± 50 mA -65 to +150 °C 300 °C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied e t e ol Table 5: Recommended Operating Conditions bs Symbol VCC Value Unit 2 to 5.5 V O Supply Voltage Input Voltage 0 to 5.5 V VO Output Voltage 0 to VCC V Top Operating Temperature -55 to 125 °C 0 to 100 0 to 20 ns/V VI dt/dv Input Rise and Fall Time (note 1) (VCC = 3.3 ± 0.3V) (VCC = 5.0 ± 0.5V) 1) VIN from 30% to 70% of VCC 2/11 Parameter 74VHC03 Table 6: DC Specifications Test Condition Symbol VIH Parameter VIL High Level Input Voltage VOL Low Level Input Voltage IOZ Low Level Output Voltage II High Impedance Output Leakage Current Input Leakage Current Quiescent Supply Current ICC Value TA = 25°C VCC (V) Min. 2.0 3.0 to 5.5 2.0 3.0 to 5.5 Typ. Max. -40 to 85°C -55 to 125°C Min. Min. Max. 1.5 1.5 1.5 0.7VCC 0.7VCC 0.7VCC Max. V 0.5 0.5 0.5 0.3VCC 0.3VCC 0.3VCC 2.0 IO=50 µA 0.0 0.1 0.1 0.1 3.0 IO=50 µA 0.0 0.1 0.1 0.1 4.5 IO=50 µA 0.0 0.1 0.1 3.0 IO=4 mA 0.36 0.44 4.5 IO=8 mA 0.36 0.44 5.5 VI = VIH or VIL VO = VCC or GND ±0.25 0 to 5.5 VI = 5.5V or GND ± 0.1 5.5 VI = VCC or GND s b O 2 0.1 V ) s ( ct u d o V ± 2.5 ± 2.5 µA ±1 ±1 µA 20 20 µA e t e ol ) (s Unit 0.55 Pr 0.55 Table 7: AC Electrical Characteristics (Input tr = tf = 3ns) Test Condition Symbol tPZL Parameter Output Enable Time ol bs tPLZ O ete Output Disable Time VCC (V) CL (pF) od t c u Pr Value TA = 25°C Min. Typ. -40 to 85°C -55 to 125°C Max. Min. Max. Min. Unit Max. 3.3(*) 15 RL = 1 KΩ 5.5 7.9 1.0 9.5 1.0 9.5 3.3(*) 50 RL = 1 KΩ 8.0 11.4 1.0 13.0 1.0 13.0 5.0(**) 15 RL = 1 KΩ 3.7 5.5 1.0 6.5 1.0 6.5 5.0(**) 50 RL = 1 KΩ 5.2 7.5 1.0 8.5 1.0 8.5 (*) 3.3 50 RL = 1 KΩ 8.0 11.4 1.0 13.0 1.0 13.0 5.0(**) 50 RL = 1 KΩ 5.2 7.5 1.0 8.5 1.0 8.5 ns ns (*) Voltage range is 3.3V ± 0.3V (**) Voltage range is 5.0V ± 0.5V 3/11 74VHC03 Table 8: Capacitive Characteristics Test Condition Symbol Value TA = 25°C Parameter Min. CIN Input Capacitance COUT Output Capacitance Power Dissipation Capacitance (note 1) CPD Typ. Max. 4 10 -40 to 85°C -55 to 125°C Min. Min. Max. 10 Unit Max. 10 pF 5 pF 6 pF ) s ( ct 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per gate) Table 9: Dynamic Switching Characteristics Test Condition Symbol VOLP VOLV VIHD VILD Parameter Dynamic Low Voltage Quiet Output (note 1, 2) Dynamic High Voltage Input (note 1, 3) Dynamic Low Voltage Input (note 1, 3) TA = 25°C VCC (V) Min. 5.0 5.0 Value -0.8 CL = 50 pF 5.0 3.5 ) (s t c u Max. 0.3 0.8 -0.3 r P e -40 to 85°C Typ. so let b O Min. u d o Max. -55 to 125°C Min. Unit Max. V V 1.5 V 1) Worst case package. 2) Max number of outputs defined as (n). Data inputs are driven 0V to 5.0V, (n-1) outputs switching and one output at GND. 3) Max number of data inputs (n) switching. (n-1) switching 0V to 5.0V. Inputs under test switching: 5.0V to threshold (VILD), 0V to threshold (VIHD), f=1MHz. d o r P e Figure 3: Test Circuit t e l o s b O CL = 15/50pF or equivalent (includes jig and probe capacitance) RL = R1 = 1KΩ or equivalent RT = ZOUT of pulse generator (typically 50Ω) 4/11 74VHC03 Figure 4: Waveform - Propagation Delays (f=1MHz; 50% duty cycle) ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O 5/11 74VHC03 SO-14 MECHANICAL DATA mm. DIM. MIN. inch TYP MAX. MIN. TYP. MAX. A 1.35 1.75 0.053 0.069 A1 0.1 0.25 0.004 0.010 A2 1.10 1.65 0.043 0.065 B 0.33 0.51 0.013 0.020 C 0.19 0.25 0.007 0.010 D 8.55 8.75 0.337 0.344 E 3.8 4.0 0.150 e ) s ( ct 1.27 r P e 0.050 H 5.8 6.2 0.228 h 0.25 0.50 0.010 L 0.4 1.27 k 0° 8° (s) ddd 0.100 let o s b 0.016 -O 0° u d o 0.157 0.244 0.020 0.050 8° 0.004 t c u d o r P e t e l o s b O 0016019D 6/11 74VHC03 TSSOP14 MECHANICAL DATA mm. inch DIM. MIN. TYP A MAX. MIN. TYP. MAX. 1.2 A1 0.05 A2 0.8 b 0.047 0.15 0.002 0.004 0.006 1.05 0.031 0.039 0.041 0.19 0.30 0.007 c 0.09 0.20 0.004 D 4.9 5 5.1 0.193 E 6.2 6.4 6.6 0.244 E1 4.3 4.4 4.48 0.169 1 e K 0˚ L 0.45 O ) 0.75 s ( t c 0.201 r P e 0.252 0.260 0.173 0.176 0.0256 BSC 0˚ 8˚ 0.018 0.024 0.030 u d o r P e A2 A 0.60 0.197 bs 8˚ u d o 0.0089 t e l o 0.65 BSC ) s ( ct 0.012 let A1 o s b b O e K c L E D E1 PIN 1 IDENTIFICATION 1 0080337D 7/11 74VHC03 Tape & Reel SO-14 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. A TYP. MAX. 330 13.2 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 0.504 0.519 ) s ( ct 22.4 0.882 Ao 6.4 6.6 0.252 Bo 9 9.2 0.354 Ko 2.1 2.3 0.082 Po 3.9 4.1 0.153 P 7.9 8.1 0.311 ) (s t c u d o r P e t e l o s b O 8/11 MIN. 0.260 ro P e let so b O du 0.362 0.090 0.161 0.319 74VHC03 Tape & Reel TSSOP14 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. A MIN. TYP. MAX. 330 13.2 12.992 C 12.8 D 20.2 0.795 N 60 2.362 T 0.504 0.519 ) s ( ct 22.4 0.882 Ao 6.7 6.9 0.264 Bo 5.3 5.5 0.209 Ko 1.6 1.8 0.063 Po 3.9 4.1 0.153 P 7.9 8.1 0.311 ) (s 0.272 ro P e let so b O du 0.217 0.071 0.161 0.319 t c u d o r P e t e l o s b O 9/11 74VHC03 Table 10: Revision History Date Revision 12-Nov-2004 4 Description of Changes Order Codes Revision - pag. 1. ) s ( ct u d o r P e t e l o ) (s t c u d o r P e t e l o s b O 10/11 s b O 74VHC03 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. 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