ACST310-8BTR

ACST310-8B Overvoltage protected AC switch Datasheet  production data Description 287 The ACST310-8B belongs to the ACS™ / ACST power switch family built with A.S.D.® (application specific discrete) technology. This high performance device is suited to home appliances or industrial systems and drives loads up to 3 A. &20 * '3$. Features  AC switch with self over voltage protection  Microcontroller direct driven (low gate current max. 10 mA) This ACST310-8B switch embeds a Triac structure with a high voltage clamping device able to absorb the inductive turn-off energy and withstand line transients such as those described in the IEC 61000-4-5 standard.The component needs a low gate current to be activated (IGT max. 10 mA) and still shows a high electrical noise immunity complying with IEC standards such as IEC 61000-4-4 (fast transient burst test).  Three quadrants (Q1, Q2 and Q3) Figure 1. Functional diagram  UL94-V0 certified resin (flammability)  ECOPACK®2 compliant component 287 Benefits  Enables equipment to meet IEC61000-4-5  High immunity against fast transients described in IEC61000-4-4 standard *$7( &20  Needs no external overvoltage protection  High off-state reliability device  Interfaces directly with the microcontroller – Reduces component count Table 1. Device summary Applications  AC static switching in appliances and industrial control systems  Driving low power highly inductive loads or resistive AC loads, such as motor control circuits, small home appliances, lighting, fan speed controllers, water valves, pumps, solid state relays, vacuum cleaners, heaters February 2017 This is information on a product in full production. Symbol Value Unit IT(RMS) 3 A IGT(Q1, Q2, Q3) 10 mA VDRM/VRRM 800 V ACS™, is a trademark of STMicroelectronics. ® : A.S.D., ECOPACK are registered trademarks of STMicroelectronics DocID030200 Rev 1 1/14 www.st.com Characteristics 1 ACST310-8B Characteristics Table 2. Absolute ratings (limiting values) Symbol IT(RMS) ITSM Parameter Test conditions Value Unit Tc = 112 °C 3 A f = 50 Hz tp = 20 ms 20 f = 60 Hz tp = 16.7 ms 21 tp = 10 ms 2.6 A²s Tj = 125 °C 50 A/µs On-state RMS current (full sine wave) Non repetitive surge peak on-state current (Tj initial = 25 °C) A I2t I2t value for fusing (Tj initial = 25 °C) dI/dt Critical rate of rise of on-state current IG = 2 x IGT, tr 100 ns VPP(1) Non repetitive line peak mains voltage Tj = 25 °C 2 kV PG(AV) Average gate power dissipation Tj = 125 °C 0.1 W f = 120 Hz PGM Peak gate power tp = 20 µs Tj = 125 °C 10 W IGM Peak gate current tp = 20 µs Tj = 125°C 1.6 A Tstg Storage junction temperature range -40 to +150 °C Tj Operating junction temperature range -40 to +125 °C TL Maximum lead temperature for soldering during 10 s 260 °C 1. according to test described by IEC 61000-4-5 standard (see Figure 18). Table 3. Electrical characteristics Symbol IGT(1) Test conditions Quadrant Tj VOUT = 12 V, RL = 33  I - II - III 25 °C VOUT = VDRM, RL = 3.3 k I - II - III Value Unit Max. 10 mA Max. 1.1 V 125 °C Min. 0.2 V 25 °C Max. 20 mA 25 °C Max. VOUT = 67% VDRM, gate open 125 °C Min. 1000 V/µs (dV/dt)c = 0.1V/µs 125 °C Min. 5 A/ms (dI/dt)c(2) (dV/dt)c = 10 V/µs 125 °C Min. 1 A/ms 25 °C Min. 850 V VGT VGD IH (2) IOUT = 100 mA IL dV/dt(2) (2) (dI/dt)c VCL I - III IG = 1.2 x IGT (2) II ICL = 0.1 mA, tp = 1 ms 1. Minimum IGT is guaranteed at 5% of IGT max. 2. For both polarities of OUT pin referenced to COM pin 2/14 DocID030200 Rev 1 25 35 mA ACST310-8B Characteristics Table 4. Static characteristics Symbol Test conditions Value Unit VTM(1) ITM = 4.2 A, tp = 380 µs Tj = 25 °C Max. 1.8 V VTO(1) Threshold voltage Tj = 125 °C Max. 0.9 V RD(1) Dynamic resistance Tj = 125 °C Max. 200 m IDRM IRRM VOUT = VDRM / VRRM Tj = 25 °C 10 Max. Tj = 125 °C µA 500 1. For both polarities of OUT pin referenced to COM pin Table 5. Thermal resistances Symbol Rth(j-c) Rth(j-a) Parameter Junction to case (AC) Junction to ambient SCu (1)= 0.5 cm² Value Unit 3 °C/W 70 °C/W 1. Scu = copper surface under tab Figure 2. Maximum power dissipation versus RMS on-state current (full cycle)  3: Figure 3. On-state RMS current versus case temperature  ,7506 $ Į ƒ D ƒ        ƒ ,7506$         7Fƒ&   DocID030200 Rev 1      3/14 14 Characteristics ACST310-8B Figure 4. On-state RMS current versus ambient temperature (free air convection)  ,7506$ Figure 5. Relative variation of thermal impedance versus pulse duration . >=WK5WK@  Į ƒ =WKMF  =WKMD    W3V 7Dƒ&        Figure 6. Non repetitive surge peak on-state current for a sinusoidal pulse with width: tp < 10ms ( (  ( ( ( ( ( ( Figure 7. Surge peak on-state current versus number of cycles ,760$ ,760$ 7-LQLWLDO ƒ& GOGWOLPLWDWLRQ $—V  1RQUHSHWLWLYH7- ƒ& , 760 ( W PV  2QHF\FOH (  (  WSPV (  4/14    5HSHWLWLYH7F ƒ&   DocID030200 Rev 1  1XPEHURIF\FOHV   ACST310-8B Characteristics Figure 8. Relative variation of holding current Figure 9. Relative variation of gate trigger and latching current versus junction current and gate trigger voltage versus junction temperature (typical values) temperature (typical values)  ,+,/ >7-@,+,/ >7- ƒ&@   ,/    ,*7 9*7>7-@,*7 9*7>7- ƒ&@ ,*744  ,+ ,*74      9*7 444 7 ƒ& 7 ƒ& -            Figure 10. On-state characteristics (maximum values)    -          Figure 11. Relative variation of critical rate of decrease of main current versus junction temperature (typical values) ,70$  GOGWF>7-@GOGWF>7- ƒ&@    7- ƒ&  7- ƒ&  7-PD[ 972 9 5' Pȍ  9709               7-ƒ&  DocID030200 Rev 1          5/14 14 Characteristics ACST310-8B Figure 12. Relative variation of static dV/dt immunity versus junction temperature G9GW>7-@G9GW>7- ƒ&@  Figure 13. Relative variation of leakage current versus junction temperature (typical values) ( ,'50,550>7-@,'50,550>7- ƒ&@ 9'50 9550 9 9'50 9550 9  (  (  7-ƒ&       Figure 14. Relative variation of critical rate of decrease of main current versus reapplied (dV/dt) (typical value)     9&/>7M@9&/>7M ƒ&@  7- ƒ&           G9GWF9—V 6/14  Figure 15. Relative variation of the maximal clamping voltage versus junction temperature (min. value) GOGWF>G9GWF@VSHFLILHGGOGWF   7-ƒ& (   7 M ƒ&     DocID030200 Rev 1        ACST310-8B Application information 2 Application information 2.1 Typical application description The ACST310-8B device has been designed to switch on and off, or by phase angle control, highly inductive or resistive loads such as pump, valve, fan, or bulb lamps. Thanks to its high sensitivity (IGT max = 10 mA), this device can be driven directly by logic level circuits through a resistor as shown on the typical application diagram (Figure 16). Figure 16. Typical application schematic . $&0DLQV 065 9VV 5J .$6 ("5& $0. 9GG DocID030200 Rev 1 7/14 14 Application information ACST310-8B Figure 17. Phase angle control typical diagram (inductive or resistive load) ,QGXFWLYHRUUHVLVWLYHORDG 9DULDEOH UHVLVWRU 065 'LDF $&PDLQV ("5& &DSDFLWRU 8/14 DocID030200 Rev 1 $0. ACST310-8B AC line transient voltage ruggedness In comparison with standard Triacs, which are not robust against surge voltage, the ACST310-8B is self-protected against over-voltage, specified by the parameter VCL. In addition, the ACST310-8B is a sensitive device (IGT max. 10 mA), but provides a high noise immunity level against fast transients. The ACST310-8B switch can safely withstand AC line transient voltages either by clamping the low energy spikes, such as inductive spikes at switch off, or by switching to the on state (for less than 10 ms) to dissipate higher energy shocks through the load. This safety feature works even with high turn-on current ramp up. The test circuit of Figure 18 represents the ACST310-8B application, and is used to stress the ACST310-8B switch according to the IEC 61000-4-5 standard conditions. With the additional effect of the load which is limiting the current, the ACST310-8B switch withstands the voltage spikes up to 2 kV on top of the peak line voltage. The protection is based on an overvoltage crowbar technology. The ACST310-8B folds back safely to the on state as shown in Figure 19. The ACST310-8B recovers its blocking voltage capability after the surge and the next zero current crossing. Such a non-repetitive test can be done at least 10 times on each AC line voltage polarity. Figure 18. Overvoltage ruggedness test circuit for resistive and inductive loads for IEC 61000-4-5 standards 6XUJHJHQHUDWRU 5JHQHUDWRU )LOWHULQJXQLW &F 0RGHORIWKHORDG 5 / 287 $&PDLQV 2.2 Application information *$7( &20 5J 1. R = 30 Ω, L = 10 µH, Vpp = 2 kV (Surge Generator), Rg = 220 Ω, AC mains = 230 VRMS 50 Hz DocID030200 Rev 1 9/14 14 Application information ACST310-8B Figure 19. Typical voltage and current waveforms across the ACST310-8B during IEC 61000-4-5 standard test 9 SHDN —VYROWDJHVXUJH 9  ,SHDN $ —VFXUUHQWVXUJH , G,GW%2 $—V  %2 %UHDNRYHU 2.3 Electrical noise immunity The ACST310-8B is a sensitive device (IGT max. 10 mA) and can be controlled directly through a simple resistor by a logic level circuit, and still provides a high electrical noise immunity. The intrinsic immunity of the ACST310-8B is shown by the specified dV/dt equal to 1000 V/μs at 125 °C. This immunity level is 5 to 10 times higher than the immunity provided by an equivalent standard technology Triac with the same sensitivity. In other words, the ACST310-8B with IGT = 10 mA has immunity comparable only for higher gate current device (IGT higher than 35 mA). 10/14 DocID030200 Rev 1 ACST310-8B 3 Package information Package information  Epoxy meets UL94-V0  Lead-free package  Halogen free molding compound In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 3.1 DPAK package information Figure 20. DPAK package outline DocID030200 Rev 1 11/14 14 Package information ACST310-8B Table 6. DPAK package mechanical data Dimensions Ref. Inches(1) Millimeters Typ. Min. Max. A 2.18 A1 Min. Max. 2.40 0.0858 0.0945 0.90 1.10 0.0354 0.0433 A2 0.03 0.23 0.0012 0.0091 b 0.64 0.90 0.0252 0.0354 b4 4.95 5.46 0.1949 0.2150 c 0.46 0.61 0.0181 0.0240 c2 0.46 0.60 0.0181 0.0236 D 5.97 6.22 0.2350 0.2449 D1 4.95 5.60 0.1949 0.2205 E 6.35 6.73 0.2500 0.2650 E1 4.32 5.50 0.1701 0.2165 e Typ. 2.286 0.09 e1 4.40 4.70 0.1732 0.1850 H 9.35 10.40 0.3681 0.4094 L 1.00 1.78 0.0394 0.0701 L2 1.27 0.0500 L4 0.60 1.02 0.0236 0.0402 V2 -8 ° +8 ° -8 ° +8 ° 1. Inches only for reference Figure 21. DPAK recommended footprint      % 7KHGHYLFHPXVWEHSRVLWLRQHGZLWKLQ 12/14 DocID030200 Rev 1   $ % $ ACST310-8B 4 Ordering information Ordering information Figure 22. Ordering information scheme $&67%75 6HULHV $&VZLWFK 7RSRORJ\ 7 7ULDF 2QVWDWHUPVFXUUHQW  $ 6HQVLWLYLW\  P$ 9ROWDJH  9 3DFNDJH % '3$. 3DFNLQJPRGH 75 7DSHDQGUHHO %ODQN %ODQN 7XEH Table 7. Ordering information Order code ACST310-8B ACST310-8BTR 5 Marking Package Weight ACST 3108 DPAK 0.32 g per pc. Base qty. Packing mode 75 Tube 2500 Tape and reel Revision history Table 8. Document revision history Date Revision 24-Feb-2017 1 Changes Initial release. DocID030200 Rev 1 13/14 14 ACST310-8B IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2017 STMicroelectronics – All rights reserved 14/14 DocID030200 Rev 1