B5S162862TTR

B5S162862 20-BIT TWO PORT BUS SWITCH WITH FOUR ENABLE CONTROL AND 25Ω SERIES RESISTOR IN OUTPUT PRELIMINARY DATA ■ ■ HIGH SPEED: tPD = 1.25ns (MAX.) at VCC = 4.5V TA=85°C ON RESISTANCE BETWEEN TWO PORT: 25Ω (TYP) at VCC = 5.0V TA=25°C LOW POWER DISSIPATION: ICC = 1uA(MAX.) at TA=25°C COMPATIBLE WITH TTL OUTPUTS: VIH=2V(MIN), VIL=0.8V(MAX) POWER DOWN PROTECTION ON INPUTS AND OUTPUTS OPERATING VOLTAGE RANGE: VCC(OPR) = 4V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 16862 IMPROVED LATCH-UP IMMUNITY ESD PERFORMANCE: HBM > 2000V (MIL STD 883 method 3015); MM > 200V ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O ■ ■ ■ ■ ■ ■ ■ TSSOP ORDER CODES PACKAGE T&R TSSOP48 B5S162861TTR PIN CONNECTION DESCRIPTION The B5S162862 is an advanced high-speed CMOS 20-BIT TWO PORT BUS SWITCH fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS tecnology. It is ideal for 4V to 5.5V VCC operations and ultra-low power and low noise applications, typically notebook and docking station. Any nG output control governs four 5-bit BUS SWITCHES. Output Enable inputs (nG) tied together gives full 20-bit operations. When nG is LOW, the switches are on. When nG is HIGH, the switches are in high impedance state. It has ultra high-speed performance at 5V near zero delay with low ON resistance and include 25Ω series resistor to reduce noise resulting from reflections, thus eliminating the need for an external terminating resistor. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. February 2003 1/9 This is preliminary information on a new product now in development are or undergoing evaluation. Details subject to change without notice. B5S162862 INPUT EQUIVALENT CIRCUIT ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O SCHEMATIC DIAGRAM PIN DESCRIPTION PIN No SYMBOL 1, 13 2G, 4G 2, 3, 4, 5, 6, 7, 8, 9, 10, 11 14, 15, 16, 17, 18, 19, 20, 21, 22, 23 34, 33, 32, 31, 30, 29, 28, 27, 26, 25 46, 45, 44, 43, 42, 41, 40, 39, 38, 37 NAME QND FUNCTION Bus Enable Input (Active Low) 1A0 to 1A9 Data Inputs 2A0 to 2A9 Data Inputs 2B0 to 2B9 Data Outputs 1B0 to 1B9 Data Outputs 47, 35 1G, 3G 12, 24 GND VCC 36, 48 Bus Enable Input (Active Low) Ground (0V) Positive Supply Voltage TRUTH TABLE INPUT yG 1An, 2An 1Bn, 2Bn L H X X Bus ON Z y: 1 to 4 y: 1, active on 1An, y: 2, active on 1An, y: 3, active on 2An, y: 4, active on 2An, X: "H" or "L" Z: High Impedance 2/9 OUTPUT 1Bn port only with n:0 to 1Bn port only with n:5 to 2Bn port only with n:0 to 2Bn port only with n:5 to 4 9 4 9 B5S162862 ABSOLUTE MAXIMUM RATINGS Symbol VCC Parameter² Value Unit Supply Voltage -0.5 to +7.0 V VI DC Switch and Control Pin Voltage -0.5 to +7.0 V VO DC Output Voltage (VCC = 0V) (note 1) -0.5 to +7.0 V VO DC Output Voltage (VI/O=Gnd) -0.5 to +7.0 V IIK DC Input Diode Current (VI/O < 0V) - 50 mA IOK DC Output Diode Current (note 2) - 50 mA IO DC Output Current (note 3) 128 mA ± 100 mA ICC or IGND DC VCC or Ground Current per Supply Pin Storage Temperature Tstg Lead Temperature (10 sec) TL ) s ( t -65 to +150 300 c u d °C °C Absolute Maximum Rating are those value beyond which damage to the device may occour. Functional operation under these condition is not implied 1) IO absolute maximum rating must be observed 2) VO < GND 3) Not more than one output should be tested at one time. Duration of the test should not exceed one second. e t e l RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Input Voltage VO Output Voltage (VCC = 0V) VO Output Voltage Top Operating Temperqture dt/dv dt/dv ) s ( ct -O Switch Input Rise and Fall Time Control Input Rise and Fall Time (note 1) 1) VIN from 0.8V to 2V at VCC = 3.0V e t e ol s b O o s b Supply Voltage VI o r P du ) s ( ct b O - so e t le o r P c u d ) s t( Value Unit 4 to 5.5 V 0 to 5.5 V o r P 0 to 5.5 V 0 to 5.5 V -55 to 125 °C 0 to DC 0 to 10 ns/V ns/V u d o r P e t e l o s b O 3/9 B5S162862 DC SPECIFICATION Test Condition Symbol Parameter TA = 25 °C VCC (V) -40 to 85 °C -55 to 125 °C Unit Min. Typ. Max. Min. Max. Min. Max. VIH High Level Input Voltage 4 to 5.5 VIL Low Level Input Voltage 4 to 5.5 VH Input Hysteresis at Control pin Switch ON Resistance RON Value 2 2 0.8 4.5 to 5.5 2 0.8 V 0.8 150 4.5 ION=64 mA VI=0V 4.5 ION=48 mA VI=0V 4.5 ION=15 mA VI=2.4V 4.0 ION=15 mA VI=2.4V V mV ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O II VIK VI = 5.5V or GND High Impedance Leakage VI/O = 5.5V 4.5 to 5.5 Current to GND Clamp Diode Voltage I 4.0 to 5.5 I = -18mA ICC Quiescent Supply Current IOZ ICCD Input Leakage Current 5.5 Supply Current per Control Input per MHz (1) ICC incr. per Input 40 28 20 40 35 20 48 20 48 Ω ±0.1 0 to 5.5 5.5 ∆ICC 20 5.5 -0.7 VI = VCC or GND VI/O = Open nG=GND; Control Input Toggling 50% Duty Cycle VIC=VCC-2.1 V 0.1 1.0 ±1.0 ±2.0 µA ±1.0 ±2.0 µA -1.2 -1.2 V 3.0 10.0 µA 0.25 mA/ MHz 2.5 mA 1) This current applies to the control inputs only and represent the current required to switch internal capacitance at the specified frequency. The 1An and 2An inputs generate no significant AC or DC currents as they transition. This parameter is not tested, but is guaranteed by design. AC ELECTRICAL CHARACTERISTICS Test Condition Symbol Parameter tPLH tPHL Propagation Delay Time (1) tPZL tPZH xAn to xBn, xBn to xAn(2) Output Enable Time tPLZ tPHZ Output Disable Time 1) Parameter guaranteed by design 2) X=1,2; n=0..9. 4/9 VCC (V) 4.5 to 5.5 Value ts = tr -40 to 85 °C (ns) Min. Max. CL (pF) RL (Ω) 50 500 2.5 50 500 2.5 50 500 2.5 -55 to 125 °C Min. Unit Max. 1.25 ns 1.5 5.5 ns 1.5 5.5 ns B5S162862 CAPACITANCE CHARACTERISTICS Test Condition Symbol CIN CI/O Parameter TA = 25 °C VCC (V) Input Capacitance at Control Pin Input Capacitance at I/O Pin 5.0 Value Min. nG=VCC Typ. Unit Max. 4 pF 5.5 pF TEST CIRCUIT ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O TEST tPLH, tPHL SWITCH Open tPZL, tPLZ 7V tPZH, tPHZ Open CL = 50pF or equivalent (includes jig and probe capacitance) RL = R1 = 500Ω or equivalent RT = ZOUT of pulse generator (typically 50Ω) 5/9 B5S162862 WAVEFORM 1: PROPAGATION DELAY (f=1MHz; 50% duty cycle) ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle) 6/9 B5S162862 TSSOP48 MECHANICAL DATA mm. inch DIM. MIN. TYP MAX. A MIN. TYP. 1.2 A1 0.05 0.047 0.15 A2 MAX. 0.002 0.006 0.9 0.035 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O b 0.17 0.27 0.0067 0.011 c 0.09 0.20 0.0035 0.0079 D 12.4 12.6 0.488 0.496 E 8.1 BSC E1 6.0 0.318 BSC 6.2 e 0.236 0.5 BSC 0.244 0.0197 BSC K 0˚ 8˚ 0˚ 8˚ L 0.50 0.75 0.020 0.030 A A2 A1 b K e L E c D E1 PIN 1 IDENTIFICATION 1 7065588C 7/9 B5S162862 Tape & Reel TSSOP48 MECHANICAL DATA mm. inch DIM. MIN. A TYP MAX. MIN. 330 C 12.8 D 20.2 13.2 TYP. MAX. 12.992 0.504 0.519 0.795 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O N 60 T 8/9 2.362 30.4 1.197 Ao 8.7 8.9 0.343 0.350 Bo 13.1 13.3 0.516 0.524 Ko 1.5 1.7 0.059 0.067 Po 3.9 4.1 0.153 0.161 P 11.9 12.1 0.468 0.476 B5S162862 ) s ( t c u d o ) r s ( P t c e t u e d l o o r s P b e O t e l ) o s ( s t b c u O d o ) r s P ( t c e t u e l d o o r s P b O e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2003 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. © http://www.st.com 9/9