B5S16861
20-BIT TWO PORT BUS SWITCH
PRELIMINARY DATA
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HIGH SPEED: tPD = 0.25ns (MAX.)
at VCC = 4.5V TA=85°C
ON RESISTANCE BETWEEN TWO PORT:
5Ω (TYP) at VCC = 5.0V TA=25°C
LOW POWER DISSIPATION:
ICC = 1uA(MAX.) at TA=25°C
COMPATIBLE WITH TTL OUTPUTS:
VIH=2V(MIN), VIL=0.8V(MAX)
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
OPERATING VOLTAGE RANGE:
VCC(OPR) = 4V to 5.5V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 16861
IMPROVED LATCH-UP IMMUNITY
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
Table 1: Order Codes
PACKAGE
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B5S16861TTR
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Figure 1: Pin Connection
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DESCRIPTION
The B5S16861 is an advanced high-speed CMOS
20-BIT TWO PORT BUS SWITCH fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS technology.
It is ideal for 4V to 5.5V VCC operations and
ultra-low power and low noise applications,
typically notebook and docking station.
Any nG output control governs two 10-bit BUS
SWITCHES. Output Enable inputs (nG) tied
together gives full 20-bit operations. When nG is
LOW, the switches are on. When nG is HIGH, the
switches are in high impedance state.
It has ultra high-speed performance at 5V near
zero delay with low ON resistance.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
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October 2004
Rev. 1
1/10
This is preliminary information on a new product now in development are or undergoing evaluation. Details subject to change without notice.
B5S16861
Figure 2: Input Equivalent Circuit
Table 2: Pin Description
PIN N°
SYMBOL
1, 13
2, 3, 4, 5, 6, 7,
8, 9, 10, 11
14, 15, 16, 17,
18, 19, 20, 21,
22, 23
34, 33, 32, 31,
30, 29, 28, 27,
26, 25
46, 45, 44, 43,
42, 41, 40, 39,
38, 37
NC
Figure 3: Schematic Diagram
NAME QND FUNCTION
Not Connected
2A0 to 2A9 Data Inputs
1B0 to 1B9 Data Outputs
1G, 2G
12, 24
GND
VCC
36, 48
Bus Enable Input
(Active Low)
Ground (0V)
)
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Positive Supply Voltage
Table 3: Truth Table
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INPUT
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nG
L
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n: 0 to 9
X: "H" or "L"
Z: High Impedance
2/10
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2B0 to 2B9 Data Outputs
47, 35
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1A0 to 1A9 Data Inputs
OUTPUT
1An, 2An
1Bn, 2Bn
X
X
Bus ON
Z
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B5S16861
Table 4: Absolute Maximum Ratings
Symbol
VCC
Parameter
Value
Unit
Supply Voltage
-0.5 to +7.0
V
VI
DC Switch and Control Pin Voltage
-0.5 to +7.0
V
VO
DC Output Voltage (VCC = 0V) (note 1)
-0.5 to +7.0
V
VO
DC Output Voltage (VI/O=Gnd)
-0.5 to +7.0
V
IIK
DC Input Diode Current (VI/O < 0V)
- 50
mA
IOK
DC Output Diode Current (note 2)
- 50
mA
IO
DC Output Current (note 3)
128
mA
± 100
mA
-65 to +150
°C
300
°C
ICC or IGND DC VCC or Ground Current per Supply Pin
Tstg
Storage Temperature
TL
Lead Temperature (10 sec)
Absolute Maximum Rating are those value beyond which damage to the device may occur. Functional operation under these condition is not
implied
1) IO absolute maximum rating must be observed
2) VO < GND
3) Not more than one output should be tested at one time. Duration of the test should not exceed one second.
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Table 5: Recommended Operating Conditions
Symbol
VCC
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Supply Voltage
VI
Input Voltage
VO
Output Voltage (VCC = 0V)
VO
Output Voltage
Top
Operating Temperature
dt/dv
dt/dv
ro
Parameter
Switch Input Rise and Fall Time
Control Input Rise and Fall Time (note 1)
)
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1) VIN from 0.8V to 2V at VCC = 3.0V
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Value
Unit
4 to 5.5
V
0 to 5.5
V
0 to 5.5
V
0 to 5.5
V
-55 to 125
°C
0 to DC
0 to 10
ns/V
ns/V
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B5S16861
Table 6: DC Specification
Test Condition
Symbol
Parameter
TA = 25 °C
VCC
(V)
High Level Input Voltage
4 to 5.5
VIL
Low Level Input Voltage
4 to 5.5
VH
Input Hysteresis at
Control pin
Switch ON Resistance
II
2
0.8
4.5
ION=48 mA
VI=0V
5
7
4.5
ION=15 mA
VI=2.4V
10
15
4.0
ION=15 mA
VI=2.4V
14
22
ICC
Quiescent Supply Current
ICCD
Supply Current per
Control Input per MHz (1)
5.5
5.5
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V
0.8
V
7
Ω
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±0.1
-0.7
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VI = VCC or
GND
VI/O = Open
nG=GND;
Control Input
Toggling
50% Duty
Cycle
VIC=VCC-2.1
V
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5.5
Unit
mV
ION=64 mA
VI=0V
0 to 5.5
ICC incr. per Input
0.8
4.5
VIK
∆ICC
2
150
VI = 5.5V or
GND
High Impedance Leakage
VI/O = 5.5V
4.5 to 5.5
Current
to GND
Clamp Diode Voltage
I
4.0 to 5.5
I = -18mA
IOZ
-55 to 125
°C
2
4.5 to 5.5
Input Leakage Current
-40 to 85
°C
Min. Typ. Max. Min. Max. Min. Max.
VIH
RON
Value
0.1
±1.0
±2.0
µA
±1.0
±2.0
µA
-1.2
-1.2
V
3.0
10.0
µA
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0.25
mA/
MHz
2.5
mA
1) This current applies to the control inputs only and represent the current required to switch internal capacitance at the specified frequency.
The 1An and 2An inputs generate no significant AC or DC currents as they transition. This parameter is not tested, but is guaranteed by
design.
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Table 7: AC Electrical Characteristics
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Symbol
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Parameter
tPLH tPHL
Propagation Delay Time (1)
tPZL tPZH
xAn to xBn, xBn to xAn(2)
Output Enable Time
tPLZ tPHZ
Output Disable Time
1) Parameter guaranteed by design
2) X=1,2; n=0..9.
4/10
Test Condition
VCC
(V)
4.5 to 5.5
Value
ts = tr -40 to 85 °C -55 to 125°C
(ns) Min. Max. Min. Max.
CL
(pF)
RL
(Ω)
50
500
2.5
50
500
2.5
50
500
2.5
Unit
0.25
ns
1.5
5.5
ns
1.5
5.5
ns
B5S16861
Table 8: Capacitance Characteristics
Test Condition
Symbol
CIN
CI/O
Parameter
Value
TA = 25 °C
VCC
(V)
Input Capacitance at Control
Pin
Input Capacitance at I/O Pin
5.0
Min.
nG=VCC
Typ.
Unit
Max.
4
pF
5.5
pF
Figure 4: Test Circuit
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TEST
tPLH, tPHL
tPZL, tPLZ
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tPZH, tPHZ
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SWITCH
Open
7V
Open
CL = 50pF or equivalent (includes jig and probe capacitance)
RL = R1 = 500Ω or equivalent
RT = ZOUT of pulse generator (typically 50Ω)
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B5S16861
Figure 5: Waveform - Propagation Delay (f=1MHz; 50% duty cycle)
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Figure 6: Waveform - Output Enable And Disable Time (f=1MHz; 50% duty cycle)
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B5S16861
TSSOP48 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
MAX.
A
MIN.
TYP.
MAX.
1.2
A1
0.05
0.047
0.15
A2
0.002
0.006
0.9
0.035
b
0.17
0.27
0.0067
0.011
c
0.09
0.20
0.0035
0.0079
D
12.4
12.6
0.488
)
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E
0.496
8.1 BSC
E1
6.0
0.318 BSC
6.2
e
0.5 BSC
0°
8°
L
0.45
0.75
)
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A2
A1
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0.244
0.0197 BSC
K
A
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0.236
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0°
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0.018
K
8°
0.030
L
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PIN 1 IDENTIFICATION
1
7065588D
7/10
B5S16861
Tape & Reel TSSOP48 MECHANICAL DATA
mm.
inch
DIM.
MIN.
TYP
A
MAX.
MIN.
TYP.
330
13.2
12.992
C
12.8
D
20.2
0.795
N
60
2.362
T
0.504
0.519
30.4
1.197
Ao
8.7
8.9
0.343
0.350
Bo
13.1
13.3
0.516
Ko
1.5
1.7
0.059
Po
3.9
4.1
0.153
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P
11.9
12.1
0.468
0.524
)
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8/10
MAX.
0.067
0.161
0.476
B5S16861
Table 9: Revision History
Date
Revision
01-Oct-2004
1
Description of Changes
First Release.
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B5S16861
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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