BAL-CW1250D3
50 Ω nominal input / conjugate match balun to
CW1250/CW1260/CW1150/CW1160, with integrated harmonic filter
Description
STMicroelectronics BAL-CW1250D3 is a balun
(balanced/unbalanced device) designed to
transform a single ended signal to differential
signals in WLAN application.
This BAL-CW1250D3, with low insertion losses in
the bandwidth 2400 MHz to 2500 MHz, has been
customized for CW1250, CW1150, CW1260,
CW1160 transceiver. The differential output
embeds an integrated matching network adapted
to the transceiver.
Lead-free Flip-Chip package
5 bumps
Datasheet − production data
Features
• 50 Ω nominal input / match ST-Ericsson RF IC
CW1250, CW1150, CW1260, CW1160
The BAL-CW1250D3 has been designed using
STMicroelectronics IPD (integrated passive
device) technology on non-conductive glass
substrate to optimize RF performance.
Figure 1. Pinout diagram (top view)
• Low insertion loss
• Low amplitude imbalance
3
GND
2
1
A
SE
• Low phase imbalance
• DC blocking access on single RF input
VCC
B
2
• Small footprint: < 1.2 mm
DIFF
DIFF
C
Benefits
• Extremely low profile (< 550 µm after reflow)
• Integrate matching network
• High RF performance
• RF components count and area reduction
Applications
• Balun with integrated matching for ST-Ericsson
RF IC CW1250, C1150, CW1260
September 2015
This is information on a product in full production.
DocID024678 Rev 2
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www.st.com
10
Characteristics
1
BAL-CW1250D3
Characteristics
Table 1. Absolute maximum ratings (limiting values)
Value
Symbol
Parameter
Unit
Min
PIN
Average power RFIN
ESD ratings MIL STD883C
(HBM: C = 100 pF, R = 1.5 kΩ, air discharge)
VESD
TOP
Typ
Max
24
dBm
2000
ESD ratings charged device model
(JESD22-C101-D)
500
ESD ratings machine model
(MM: C = 200 pF, R = 25 Ω, L = 500 nH)
200
Operating temperature
V
-30 to +85
°C
Table 2. Impedances (Tamb = 25 °C)
Value
Symbol
Parameter
Unit
Min
ZOUT
ZIN
Nominal differential output impedance
Nominal input impedance
Typ
Max
matched
Ω
50
Ω
Table 3. RF performance (Tamb = 25 °C)
Value
Symbol
Parameter
Unit
Min
Frequency range (bandwidth)
IL
Insertion loss in bandwidth
0.97
dB
Single ended return loss in bandwidth
-21
dB
Differential return loss in bandwidth
-24
dB
RL DIFF
2400
Max
F
RL SE
2/10
Typ
φimb
Phase imbalance
-10
Aimb
Amplitude imbalance
-1
Att2f0
2nd harmonic attenuation
DocID024678 Rev 2
2500
0.1
-19
MHz
10
°
1
dB
dB
BAL-CW1250D3
1.1
Characteristics
Measurements
Figure 2. Insertion loss
Figure 3. Single indeed return loss
S21 (dB)
-0.90
S11 (dB)
-20
-0.92
-22
-0.94
-24
-0.96
-26
-0.98
-28
F (GHz)
F (GHz)
-30
-1.0
2.40
2.41
2.42
2.43
2.44
2.45
2.46
2.47
2.48
2.49
2.41
2.40
2.50
Figure 4. Differential return loss
-24
2.42
2.43
2.44
2.45
2.46
2.47
2.48
2.49
2.50
Figure 5. Amplitude imbalance
S22 (dB)
-0.37
-26
-0.36
-28
-0.35
-30
-0.34
-32
-0.33
-34
-0.32
-36
-0.31
Absolute Aimb (dB)
-0.30
-38
F (GHz)
-40
2.40
2.41
2.42
2.43
2.44
2.45
2.46
2.47
2.48
2.49
2.50
2.41
2.40
Figure 6. Phase imbalance
2.62
F (GHz)
-0.29
2.42
2.43
2.44
2.45
2.46
2.47
2.48
2.49
2.50
Figure 7. Second harmonic attenuation
Absolute PHimb (deg)
-18.5
S21 (dB)
2.60
-19.0
2.58
2.56
-19.5
2.54
-20.0
2.52
2.50
-20.5
2.48
F (GHz)
2.40
2.41
2.42
2.43
2.44
2.45
2.46
2.47
2.48
2.49
F (GHz)
-21.0
2.46
2.50
2.40
2.41
DocID024678 Rev 2
2.42
2.43
2.44
2.45
2.46
2.47
2.48
2.49
2.50
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Package information
2
BAL-CW1250D3
Package information
•
Epoxy meets UL94, V0
•
Lead-free package
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
2.1
Flip-Chip package information
Figure 8. Flip-Chip package outline
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Table 4. Flip-Chip package mechanical data
Description
Parameter
Min.
Typ.
Max.
Unit
A
Bump height + substrate thickness
0.570
0.630
0.690
mm
A1
Bump height
0.155
0.205
0.255
mm
A2
Substrate thickness
0.400
b
Bump diameter
0.215
0.255
0.295
mm
D
Y dimension of the die
1.150
1.200
1.250
mm
D1
Y pitch
E
X dimension of the die
E1
X pitch
0.400
mm
fD
Distance from bump to edge of die on Y axis
0.105
mm
0.760
0.940
0.990
ccc
mm
1.040
0.05
$
4/10
mm
0.025
DocID024678 Rev 2
mm
mm
mm
BAL-CW1250D3
Package information
Figure 9. Footprint
PP
PP
PP
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&
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Figure 10. Footprint - 3 mils stencil -non solder
mask defined
Figure 11. Footprint - 3 mils stencil - solder
mask defined
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Figure 12. Footprint - 5 mils stencil -non solder
mask defined
Figure 13. Footprint - 5 mils stencil - solder
mask defined
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Package information
BAL-CW1250D3
Figure 14. Recommended land pattern (used for balun characterization)
Figure 15. Marking
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BAL-CW1250D3
Package information
Figure 16. Flip-Chip tape and reel specifications
Dot identifying Pin A1 location
2.0
Ø 1.50
4.0
8.0
3.5
1.30 ± 0.05
1.75
0.22
ST
ST
ST
xxz
yww
xxz
yww
xxz
yww
1.09 ± 0.05
4.0
0.71± 0.05
All dimensions are typical values in mm
Note:
User direction of unreeling
More information is available in the STMicroelectronics Application note:
AN2348 Flip-Chip: “Package description and recommendations for use”
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Application information
3
BAL-CW1250D3
Application information
Figure 17. Application schematic
2.4G/5G RF transceiver
BAL-CW1250D3
2.4GHz FEM
BPF 2.4GHz
F
2.4GHz
PA
Z
DIP2450-01D3
5GHz
PA
Bluetooth
Rx/Tx
2.4GHz
LNA
5GHz
LNA
5GHz FEM
Note:
BPF50-01D3
More information is available in the application notes:
AN2348 Flip-Chip package description and recommendations for use
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BAL-CW1250D3
4
Ordering information
Ordering information
Table 5. Ordering information
5
Part Number
Marking
Package
Weight
Base Qty
Delivery Mode
BAL-CW1250D3
SG
Flip-Chip
1.46 mg
5000
Tape and reel(7”)
Revision history
Table 6. Document revision history
Date
Revision
Changes
23-May-2013
1
Initial release.
23-Sep-2015
2
Updated Figure 8. Added Figure 10, Figure 11, Figure 12, Figure 13
and Table 4. Reformatted to current standards.
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BAL-CW1250D3
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Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2015 STMicroelectronics – All rights reserved
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DocID024678 Rev 2
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