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BALF-NRF01D3

BALF-NRF01D3

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    5-UFBGA,FCBGA

  • 描述:

    BALUN ULTRAMINI 5FLIPCHIP

  • 数据手册
  • 价格&库存
BALF-NRF01D3 数据手册
BALF-NRF01D3 50 Ω nominal input / conjugate match balun to nRF51822-QFAA /QFAB and nRF51422-QFAA/QFAB with integrated harmonic filter Datasheet − production data Description STMicroelectronics BALF-NRF01D3 is an ultraminiature balun. The BALF-NRF01D3 integrates matching network in a monolithic glass substrate. Matching impedance has been customized for the nRF51822-QFAA/QFAB, and nRF51422-QFAA/QFAB RF transceivers. The BALF-NRF01D3 uses STMicroelectronics IPD technology on non-conductive glass substrate which optimize RF performance. Lead-free Flip-Chip package 5 bumps Figure 1. Pinout diagram (top view) 3 2 1 Features • Low insertion loss DIFF A GND • Low amplitude imbalance SE • Low phase imbalance • Coated Flip-Chip on Glass DIFF • Small footprint: < 1.5 mm2 VCC B C Benefits • Very low profile: < 560 µm after reflow • High RF performance • PCB space saving versus discrete solution • BOM count reduction • Efficient manufacturability Applications • 2.45 GHz balun with integrated matching network • Matching optimized for following chipsets: nRF51822-QFAA/QFAB, and nRF51422QFAA/QFAB July 2015 This is information on a product in full production. DocID026031 Rev 4 1/11 www.st.com 11 Characteristics 1 BALF-NRF01D3 Characteristics Table 1. Absolute maximum ratings (limiting values) Value Symbol Parameter Unit Min. Typ. PIN Input Power RFIN Max. 20 dBm ESD ratings MIL STD883C (HBM: C = 100 pF, R = 1.5 k Ω , air discharge) 2000 VESD TOP ESD ratings charge device model (JESD22-C101-C) 500 ESD ratings machine model (MM: C = 200 pF, R = 25 Ω , L = 500 nH) 500 Operating temperature -40 V +105 °C Table 2. Electrical characteristics (Tamb = 25 °C) Value Symbol Parameter Unit Min. Typ. Max. conjugate match to: ZOUT ZIN Nominal input impedance F Frequency range (bandwidth) IL Insertion loss in bandwidth RL Return loss in bandwidth φimb Ω – nRF51822-QFAA/QFAB – nRF51422-QFAA/QFAB Nominal differential output impedance Ω 50 2400 2540 1.35 1.46 dB 16.5 17 17.5 dB Phase imbalance 4.5 5 5.5 ° Aimb Amplitude imbalance 0.15 0.2 0.25 dB 2f0 2nd harmonic filtering -15 -14 dB 3f0 3rd harmonic filtering -42 -41 dB 2/11 DocID026031 Rev 4 BALF-NRF01D3 1.1 Characteristics Simulations results (Tamb = 25 °C) Figure 2. Insertion loss in band Figure 3. Differential transmission -0 dB dB -1.00 -1.05 -10 -1.10 -1.15 -20 -1.20 -1.25 -30 -1.30 -1.35 -40 -1.40 -1.45 F (GHz) -1.50 2.40 2.42 2.44 2.46 2.48 2.50 2.52 F (GHz) -50 0 2.54 1 Figure 4. Return loss on SE port 4 3 6 5 7 8 Figure 5. Amplitude imbalance dB -17.0 2 dB 0.5 0.4 0.3 -17.5 0.2 0.1 0.0 -18.0 -0.1 -0.2 -18.5 -0.3 F (GHz) -18.5 2.40 2.42 2.44 2.46 2.48 2.50 2.52 -0.4 F (GHz) -0.5 2.54 2.40 Figure 6. Phase imbalance 10 2.42 2.44 2.46 2.48 2.50 2.52 2.54 Figure 7. H2 attenuation deg -14.0 dB 9 -14.5 8 7 -15.0 6 5 -15.5 4 -16.0 3 -16.5 2 1 -17.0 F (GHz) F (GHz) 0 2.40 -17.5 2.42 2.44 2.46 2.48 2.50 2.52 2.54 4.80 DocID026031 Rev 4 4.85 4.90 4.95 5.00 5.05 5.10 3/11 Characteristics BALF-NRF01D3 Figure 8. Attenuation in H3 -40 dB -42 -44 -46 -48 F (GHz) -50 7.20 7.25 7.30 7.35 7.40 7.45 7.50 7.55 7.60 7.65 Table 3. Compatibility matrix (nRF51422) nRF51422 IC revision 2 Packet/variant QFAA QFAB Build code DAA Ex0 A00 Table 4. Compatibility matrix (nRF51822) nRF51822 IC revision Packet/variant Build code FA0 2 QFAA Gx0 QFAB 4/11 GC0 DocID026031 Rev 4 Bx0 BALF-NRF01D3 Characteristics Figure 9. Application schematic Please note that the capacitance on SE port (pin 5) is no longer needed. BALF-NRF01D3 R1 NC DocID026031 Rev 4 5/11 Package information 2 BALF-NRF01D3 Package information • Epoxy meets UL94, V0 • Lead-free package In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. Figure 10. Package dimensions (top and side view) 630 µm ± 60 219 µm 400 µm 600 µm 50 0 DIFF 1000 ± 50 µm 500 µm DIFF µm GND SE VCC 433 µm 219 µm 1500 ± 50µm 6/11 DocID026031 Rev 4 205 µm BALF-NRF01D3 Package information Figure 11. PCB layout recommendation = BALF-NRF01D3 *Do not implement any capacitane on SE port (pin 5) Figure 12. BALF-NRF01D3 position Center of QFN land pattern to BALF-NRF01D3 bump center 960 µm DocID026031 Rev 4 7/11 Package information BALF-NRF01D3 Figure 13. Marking Dot, ST logo ECOPACK grade xx = marking z = manufacturing location yww = datecode x x z y ww Figure 14. Flip-Chip tape and reel specifications Dot identifying Pin A1 location 2.0 Ø 1.55 4.0 8.0 3.5 1.57 1.75 0.22 ST ST ST xxz yww xxz yww xxz yww 1.1 4.0 0.71 All dimensions are typical values in mm Note: User direction of unreeling More information is available in the STMicroelectronics Application note: AN2348 Flip-Chip: “Package description and recommendations for use” 8/11 DocID026031 Rev 4 BALF-NRF01D3 Package information Figure 15. Footprint - 3 mils stencil -non solder mask defined Figure 16. Footprint - 3 mils stencil - solder mask defined &RSSHUSDGGLDPHWHU —PUHFRPPHQGHG —PPLQLPXP —PPD[LPXP 6ROGHUPDVNRSHQLQJ —PUHFRPPHQGHG —PPLQLPXP —PPD[LPXP 6ROGHUPDVNRSHQLQJ —PUHFRPPHQGHG —PPLQLPXP —PPD[LPXP &RSSHUSDGGLDPHWHU —PUHFRPPHQGHG —PPLQLPXP 6ROGHUVWHQFLORSHQLQJ —PUHFRPPHQGHG 6ROGHUVWHQFLORSHQLQJ —PUHFRPPHQGHG Figure 17. Footprint - 5 mils stencil -non solder mask defined Figure 18. Footprint - 5 mils stencil - solder mask defined &RSSHUSDGGLDPHWHU —PUHFRPPHQGHG —PPLQLPXP —PPD[LPXP 6ROGHUPDVNRSHQLQJ —PUHFRPPHQGHG —PPLQLPXP —PPD[LPXP 6ROGHUPDVNRSHQLQJ —PUHFRPPHQGHG —PPLQLPXP —PPD[LPXP &RSSHUSDGGLDPHWHU —PUHFRPPHQGHG —PPLQLPXP 6ROGHUVWHQFLORSHQLQJ —PUHFRPPHQGHG 6ROGHUVWHQFLORSHQLQJ —PUHFRPPHQGHG GHSHQGLQJRQSDVWHLWFDQJRGRZQWR—P GHSHQGLQJRQSDVWHLWFDQJRGRZQWR—P DocID026031 Rev 4 9/11 Ordering information 3 BALF-NRF01D3 Ordering information Table 5. Ordering information 4 Order code Marking Weight Base Qty Delivery mode BALF-NRF01D3 ST 1.82 mg 5000 Tape and Reel Revision history Table 6. Document revision history 10/11 Date Revision Changes 27-Mar-2014 1 Initial release 04-Jun-2014 2 Updated all curves and added Table 4. 25-Mar-2015 3 Updated cover page and Table 2, Table 3 and Table 4. 07-Jul-2015 4 Updated Table 1. DocID026031 Rev 4 BALF-NRF01D3 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2015 STMicroelectronics – All rights reserved DocID026031 Rev 4 11/11
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