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BLUENRG-MSCSP

BLUENRG-MSCSP

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

    34-XFBGA,WLCSP

  • 描述:

    IC RF TXRX+MCU BLUETOOTH 34WLCSP

  • 数据手册
  • 价格&库存
BLUENRG-MSCSP 数据手册
BlueNRG-MS Upgradable Bluetooth® low energy network processor Features • • WLCSP34 QFN32 Product summary Order code BLUENRG-MSQTR Package QFN32 (5x5 mm) Packing Tape and reel Order code BLUENRG-MSCSP Package WLCSP34 (2.66x2.56 mm) Packing Tape and reel • • • • • • • • • • • • • • • • • • • • • • Bluetooth specification v4.2 compliant master and slave single-mode Bluetooth low energy network processor Embedded Bluetooth low energy protocol stack: GAP, GATT, SM, L2CAP, LL, RF-PHY Bluetooth low energy profiles provided separately Operating supply voltage: from 1.7 to 3.6 V 8.2 mA maximum TX current (@0 dBm, 3.0 V) Down to 1.7 µA current consumption with active BLE stack Integrated linear regulator and DC-DC step-down converter Up to +8 dBm available output power (at antenna connector) Excellent RF link budget (up to 96 dB) Accurate RSSI to allow power control Proprietary application controller interface (ACI), SPI based, allows interfacing with an external host application microcontroller Full link controller and host security High performance, ultra-low power Cortex-M0 32-bit based architecture core Upgradable BLE stack (stored in embedded Flash memory, via SPI) AES security co-processor Low power modes 16 or 32 MHz crystal oscillator 12 MHz ring oscillator 32 kHz crystal oscillator 32 kHz ring oscillator Battery voltage monitor Compliant with the following radio frequency regulations: ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15, ARIB STD-T66 Available in QFN32 (5x5 mm) and WLCSP34 (2.66x2.56 mm) packages Operating temperature range: -40 °C to 85 °C Applications • • • • • • • • • Watches Fitness, wellness and sports Consumer medical Security/proximity Remote control Home and industrial automation Assisted living Mobile phone peripherals PC peripherals DS10691 - Rev 9 - January 2019 For further information contact your local STMicroelectronics sales office. www.st.com BlueNRG-MS Description 1 Description The BlueNRG-MS is a very low power Bluetooth low energy (BLE) single-mode network processor, compliant with Bluetooth specification v4.2. The BlueNRG-MS supports multiple roles simultaneously and can act at the same time as Bluetooth smart sensor and hub device. The Bluetooth Low Energy stack runs on the embedded ARM Cortex-M0 core. The stack is stored on the on-chip non-volatile Flash memory and can be easily upgraded via SPI. The device comes pre-programmed with a production-ready stack image(Its version could change at any time without notice). A different or more up-to-date stack image can be downloaded from the ST website and programmed on the device through the ST provided software tools. The BlueNRG-MS allows applications to meet the tight advisable peak current requirements imposed by standard coin cell batteries. The maximum peak current is only 10 mA at 1 dBm output power. Ultra low-power sleep modes and very short transition times between operating modes allow very low average current consumption, resulting in longer battery life. The BlueNRG-MS offers the option of interfacing with external microcontrollers via SPI transport layer. DS10691 - Rev 9 page 2/42 BlueNRG-MS General description 2 General description The BlueNRG-MS is a single-mode Bluetooth low energy master/slave network processor, compliant with the Bluetooth specification v4.2. It integrates a 2.4 GHz RF transceiver and a powerful Cortex-M0 microcontroller, on which a complete poweroptimized stack for Bluetooth single mode protocol runs, providing: Master, slave role support • • GAP: central, peripheral, observer or broadcaster roles • ATT/GATT: client and server • SM: privacy, authentication and authorization • L2CAP • Link Layer: AES-128 encryption and decryption An on-chip non-volatile Flash memory allows on-field Bluetooth low energy stack upgrade. In addition, according the Bluetooth specification v4.2 the BlueNRG-MS can support the following features through firmware updates: • Multiple roles simultaneously support • Support simultaneous advertising and scanning • Support being slave of up to two masters simultaneously • Privacy V1.1 • Low duty cycle directed advertising The device allows applications to meet of the tight advisable peak current requirements imposed with the use of standard coin cell batteries. If the high efficiency embedded DC-DC step-down converter is used, the maximum input current is only 15 mA at the highest output power (+8 dBm). Even if the DC-DC converter is not used, the maximum input current is only 29 mA at the highest output power, still preserving battery life. Ultra low-power sleep modes and very short transition time between operating modes result in very low average current consumption during real operating conditions, providing very long battery life. Two different external matching networks are suggested: standard mode (TX output power up to +5 dBm) and high power mode (TX output power up to +8 dBm). The external host application processor, where the application resides, is interfaced with the BlueNRG-MS through an application controller interface protocol which is based on a standard SPI interface. DS10691 - Rev 9 page 3/42 BlueNRG-MS General description Figure 1. BlueNRG-MS application block diagram Application Processor Application Bluetooth Low Energy Profiles BlueNRG-N BlueNRG-MS Application Controller Interface SPI Application Controller Interface Bluetooth Low Energy Stack 2.4GHz Radio GAMS20150615EC-0957 DS10691 - Rev 9 page 4/42 BlueNRG-MS Pin description 3 Pin description The BlueNRG-MS pinout is shown in Figure 2. BlueNRG-MS pinout top view (QFN32), Figure 3. BlueNRG-MS pinout top view (WLCSP34) and Figure 4. BlueNRG-MS pinout bottom view (WLCSP34). In Table 1. Pinout description a short description of the pins is provided. RESETN SMPSFILT2 NO_SMPS SMPSFILT1 VDD1V2 SPI_CS TEST10 SPI_MISO Figure 2. BlueNRG-MS pinout top view (QFN32) VBAT1 SPI_MOSI SXTAL0 SPI_CLK SPI_IRQ GND pad TEST1 VBAT3 SXTAL1 RF0 RF1 VBAT2 FXTAL0 TEST2 TEST3 TEST4 TEST12 TEST11 TEST9 TEST8 VDD1V8 TEST5 TEST6 TEST7 FXTAL1 AM17562v2 Figure 3. BlueNRG-MS pinout top view (WLCSP34) 1 2 3 4 5 6 A B C D E F GAMS1803141400SG Note: DS10691 - Rev 9 Top view (balls are underneath). page 5/42 BlueNRG-MS Pin description Figure 4. BlueNRG-MS pinout bottom view (WLCSP34) GAMS0203141520SG F E D C B A 1 2 3 4 5 6 Table 1. Pinout description Pins QFN32 Name WLCSP I/O Description 1 E2 SPI_MOSI I SPI_MOSI 2 E1 SPI_CLK I SPI_CLK 3 D2 SPI_IRQ O SPI_IRQ 4 D1 TEST1 I/O Test pin 5 C1 VBAT3 VDD 1.7-3.6 battery voltage input 6 C2 TEST2 I/O Test pin connected to GND 7 B1 TEST3 I/O Test pin connected to GND 8 B2 TEST4 I/O Test pin connected to GND 9 A1 TEST5 I/O Test pin connected to GND 10 B3 TEST6 I/O Test pin connected to GND 11 A2 TEST7 I/O Test pin connected to GND 12 A3 VDD1V8 O 1.8 V digital core 13 A4 TEST8 I/O Test pin not connected 14 A5 TEST9 I/O Test pin not connected 15 B4 TEST11 I/O 16 B5 TEST12 I/O 17 A6 FXTAL1 I 16/32 MHz crystal 18 B6 FXTAL0 I 16/32 MHz crystal 19 - VBAT2 VDD 1.8-3.6 battery voltage input 20 C6 RF1 I/O Antenna + matching circuit 21 D6 RF0 I/O Antenna + matching circuit 22 E6 SXTAL1 I 32 kHz crystal 23 E5 SXTAL0 I 32 kHz crystal 24 D5 VBAT1 VDD 1.7-3.6 battery voltage input 25 E4 RESETN I Reset DS10691 - Rev 9 Test pin not connected (QFN32) Test pin connected to GND (WLCSP) Test pin not connected (QFN32) Test pin connected to GND (WLCSP) page 6/42 BlueNRG-MS Pin description Pins QFN32 Name WLCSP I/O Description 26 F6 SMPSFILT1 O SMPS output 27 - NO_SMPS I Power management strategy selection 28 F5 SMPSFILT2 I/O SMPS input/output 29 F3 VDD1V2 O 1.2 V digital core 30 E3 TEST10 I/O TEST pin connected to GND 31 F2 SPI_CS I SPI_CS 32 F1 SPI_MISO O SPI_MISO - C3 GND GND Ground - D3 GND GND Ground - D4 GND GND Ground - F4 SMPS-GND GND SMPS ground DS10691 - Rev 9 page 7/42 BlueNRG-MS Application circuits 4 Application circuits The schematics below are purely indicative. For more detailed schematics, please refer to the "Reference design" and "Layout guidelines" which are provided as separate documents. Figure 5. BlueNRG-MS application circuit: active DC-DC converter QFN32 package 1.7 V to 3.6 V Power Supply C2 C1 C6 C3 L1 C4 C5 SPI_CS SPI_MISO U1 32 31 30 29 28 27 26 25 RESETN L5 Application MCU C11 C7 C8 SPI_MISO SPI_CS TEST10 VDD1V2 SMPSFILT2 NO_SMPS SMPSFILT1 RESETN L4 U2 SPI_MOSI SPI_CLK SPI_IRQ R1 C12 1 2 3 4 5 6 7 8 SPI_MOSI SPI_CLK SPI_IRQ TEST1 VBAT3 TEST2 TEST3 TEST4 C14 VBAT1 SXTAL0 SXTAL1 RF0 RF1 VBAT2 FXTAL0 FXTAL1 GND PAD XTAL1 24 23 22 21 20 19 18 17 C10 C21 C13 L3 C16 C15 BlueNRG-MS 9 10 11 12 13 14 15 16 TEST5 TEST6 TEST7 VDD1V8 TEST8 TEST9 TEST11 TEST12 L2 C9 XTAL2 C17 C18 L6 C19 C20 GAMS20150615EC-1005 DS10691 - Rev 9 page 8/42 BlueNRG-MS Application circuits Figure 6. BlueNRG-MS application circuit: non active DC-DC converter QFN32 package 1.7 V to 3.6 V Power Supply C1 C6 C3 C4 C5 L5 SPI_CS SPI_MISO U2 1 2 3 4 5 6 7 8 R1 C12 SPI_MOSI SPI_CLK SPI_IRQ TEST1 VBAT3 TEST2 TEST3 TEST4 L4 C14 XTAL1 24 23 22 21 20 19 18 17 VBAT1 SXTAL0 SXTAL1 RF0 RF1 VBAT2 FXTAL0 FXTAL1 GND PAD C8 C7 SPI_MISO SPI_CS TEST10 VDD1V2 SMPSFILT2 NO_SMPS SMPSFILT1 RESETN U1 SPI_MOSI SPI_CLK SPI_IRQ C11 32 31 30 29 28 27 26 25 RESETN Application MCU C21 C10 C16 L3 C13 C15 TEST5 TEST6 TEST7 VDD1V8 TEST8 TEST9 TEST11 TEST12 L2 XTAL2 C9 C17 9 10 11 12 13 14 15 16 BlueNRG-MS C18 L6 C19 C20 GAMS20150615EC-1006 Figure 7. BlueNRG-MS application circuit: active DC-DC converter WLCSP package 1.7 V to 3.6 V Power Supply C2 C1 C6 C3 L1 C4 C5 SPI_CS SPI_MISO U2 SPI_MOSI SPI_CLK SPI_IRQ R1 C12 E2 E1 D2 D1 C1 C2 B1 B2 C11 C7 SPI_MOSI SPI_CLK SPI_IRQ TEST1 VBAT3 TEST2 TEST3 TEST4 C8 L4 SPI_MISO SPI_CS TEST10 VDD1V2 SMPSFILT2 SMPS_GND SMPSFILT1 RESETN GND U1 F1 F2 E3 F3 F5 F4 F6 E4 RESETN D4 L5 Application MCU VBAT1 SXTAL0 SXTAL1 RF0 RF1 GND FXTAL0 FXTAL1 D5 E5 E6 D6 C6 C3 B6 A6 C14 XTAL1 C21 L3 C16 C10 C15 BlueNRG-MS A1 B3 A2 A3 A4 A5 B4 B5 D3 TEST5 TEST6 TEST7 VDD1V8 TEST8 TEST9 TEST11 TEST12 GND L2 C9 XTAL2 C17 C18 L6 C19 C20 GAMS20150615EC-1007 DS10691 - Rev 9 page 9/42 BlueNRG-MS Application circuits Figure 8. BlueNRG-MS application circuit: non active DC-DC converter WLCSP package 1.7 V to 3.6 V Power Supply C1 C6 C3 C4 C5 L5 F1 F2 E3 F3 F5 F4 F6 E4 RESETN D4 Application MCU SPI_CS SPI_MISO U2 SPI_MOSI SPI_CLK SPI_IRQ C12 SPI_MOSI SPI_CLK SPI_IRQ TEST1 VBAT3 TEST2 TEST3 TEST4 A1 B3 A2 A3 A4 A5 B4 B5 D3 BlueNRG-MS C8 L4 C14 VBAT1 SXTAL0 SXTAL1 RF0 RF1 GND FXTAL0 FXTAL1 D5 E5 E6 D6 C6 C3 B6 A6 TEST5 TEST6 TEST7 VDD1V8 TEST8 TEST9 TEST11 TEST12 GND R1 E2 E1 D2 D1 C1 C2 B1 B2 C7 SPI_MISO SPI_CS TEST10 VDD1V2 SMPSFILT2 SMPS_GND SMPSFILT1 RESETN GND U1 C11 XTAL1 C21 L3 C16 C10 C15 L2 XTAL2 C9 C17 C18 L6 C19 C20 GAMS20150615EC-1008 Table 2. External component list Component Description C1 Decoupling capacitor C2 DC-DC converter output capacitor C3 DC-DC converter output capacitor C4 Decoupling capacitor for 1.2 V digital regulator C5 Decoupling capacitor for 1.2 V digital regulator C6 Decoupling capacitor C7 32 kHz crystal loading capacitor (1) C8 32 kHz crystal loading capacitor Section 4 (1) C9 C10 C11 RF balun/matching network capacitor high performance RF balun/matching network capacitor standard mode RF balun/matching network capacitor High Performance RF balun/matching network capacitor Standard mode RF balun/matching network capacitor high performance RF balun/matching network capacitor standard mode C12 Decoupling capacitor C13 Decoupling capacitor C14 DS10691 - Rev 9 RF balun/matching network capacitor high performance RF balun/matching network capacitor standard mode page 10/42 BlueNRG-MS Application circuits Component C15 C16 Description RF balun/matching network capacitor high performance RF balun/matching network capacitor standard mode RF balun/matching network capacitor high performance RF balun/matching network capacitor standard mode C17 16/32 MHz crystal loading capacitor C18 16/32 MHz crystal loading capacitor C19 Decoupling capacitor for 1.8 V digital regulator C20 Decoupling capacitor for 1.8 V digital regulator C21 RF balun/matching network capacitor high performance, RF balun/matching network capacitor standard mode L1 DC-DC converter input inductor, Isat > 100 mA, Q > 25 L2 L3 L4 R1 RF balun/matching network inductor high performance RF balun/matching network inductor standard mode RF balun/matching network inductor high performance RF balun/matching network inductor standard mode RF balun/matching network inductor high performance RF balun/matching network inductor standard mode Pull-down resistor on the SPI_IRQ line (can be replaced by the internal pull-down of the application MCU) XTAL1 32 kHz crystal (optional) XTAL2 16/32 MHz crystal 1. Values valid only for the crystal NDK NX3215SA-32.768 kHz-EXS00A-MU00003. For other crystals refer to what specified in their datasheet. DS10691 - Rev 9 page 11/42 BlueNRG-MS Block diagram and descriptions 5 Block diagram and descriptions A block diagram of the device is shown in Figure 9. Block diagram. In the following subsections a short description of each module is given. Figure 9. Block diagram 5.1 Core, memory and peripherals The BlueNRG-MS contains an ARM Cortex-M0 microcontroller core that supports ultra-low leakage state retention mode and almost instantaneously returning to fully active mode on critical events. The memory subsystem consists of 64 kB Flash, and 12 kB RAM, divided in two blocks of 6 kB (RAM1 and RAM2). Flash is used for the M0 program. No RAM or FLASH resources are available to the external microcontroller driving the BlueNRG-MS. The application controller interface (ACI) uses a standard SPI slave interface as transport layer, basing in five physical wires: • 2 control wires (clock and slave select) • 2 data wires with serial shift-out (MOSI and MISO) in full duplex • 1 wire to indicate data availability from the slave DS10691 - Rev 9 page 12/42 BlueNRG-MS Power management Table 3. SPI interface Name Direction Width Description SPI_CS In 1 SPI slave select = SPI enable SPI_CLK In 1 SPI clock (max. 8 MHz) SPI_MOSI In 1 Master output, slave input SPI_MISO Out 1 Master input, slave output SPI_IRQ Out 1 Slave has data for master All the SPI pins have an internal pull-down except for the CSN that has a pull-up. All the SPI pins, except the CSN, are in high impedance state during the low-power states. The IRQ pin needs a pull-down external resistor. The device embeds a battery level detector to monitor the supply voltage. The characteristics of the battery level detector are defined in Table 18. Auxiliary blocks characteristics. 5.2 Power management The BlueNRG-MS integrates both a low dropout voltage regulator (LDO) and a step-down DC-DC converter, and one of them can be used to power the internal BlueNRG-MS circuitry. However even when the LDO is used, the stringent maximum current requirements, which are advisable when coin cell batteries are used, can be met and further improvements can be obtained with the DC-DC converter at the sole additional cost of an inductor and a capacitor. The internal LDOs supplying both the 1.8 V digital blocks and 1.2 V digital blocks require decoupling capacitors for stable operation. When the VBAT voltage is below 1.8 V, the LDO 1.8 V output follows the VBAT value. Figure 10. Power management strategy using LDO and Figure 11. Power management strategy using step-down DC-DC converter, show the simplified power management schemes using LDO and DC-DC converter. Figure 10. Power management strategy using LDO VBATT 1.7V - 3.6V SMPS OFF NOT CONNECTED VBATT 1.7V - 3.6V LDOs 1.2V LDOs 1.2V LDO Digital logic 1.2V LDO Digital logic 1.8V External decoupling capacitor External decoupling capacitor AM17566v1 DS10691 - Rev 9 page 13/42 BlueNRG-MS Clock management Figure 11. Power management strategy using step-down DC-DC converter VBATT 1.7V - 3.6V SMPS External Inductor Vout_SMPS External decoupling capacitor LDOs 1.2V LDOs 1.2V LDO Digital logic 1.2V LDO Digital logic 1.8V External decoupling capacitor External decoupling capacitor AM17667v1 5.3 Clock management The BlueNRG-MS integrates two low-speed frequency oscillators (LSOSC) and two High speed (16 MHz or 32 MHz) frequency oscillators (HSOSC). The low frequency clock is used in Low Power mode and can be supplied either by a 32.7 kHz oscillator that uses an external crystal and guarantee up to ±50 ppm frequency tolerance, or by a ring oscillator with maximum ±500 ppm frequency tolerance, which does not require any external components. The primary high frequency clock is a 16 MHz or 32 MHz crystal oscillator. There is also a fast-starting 12 MHz ring oscillator that provides the clock while the crystal oscillator is starting up. Frequency tolerance of high speed crystal oscillator is ±50 ppm. The usage of the 16 MHz (or 32 MHz) crystal is strictly necessary. 5.4 Bluetooth low energy radio The BlueNRG-MS integrates a RF transceiver compliant to the Bluetooth specification and to the standard national regulations in the unlicensed 2.4 GHz ISM band. The RF transceiver requires very few external discrete components. It provides 96 dB link budgets with excellent link reliability, keeping the maximum peak current below 15 mA. In Transmit mode, the power amplifier (PA) drives the signal generated by the frequency synthesizer out to the antenna terminal through a very simple external network. The power delivered as well as the harmonic content depends on the external impedance seen by the PA. The output power is programmable from -18 dBm to +8 dBm, to allow a user-defined power control system and to guarantee optimum power consumption for each scenario. DS10691 - Rev 9 page 14/42 BlueNRG-MS Operating modes 6 Operating modes Several operating modes are defined for the BlueNRG-MS: • Reset mode Sleep mode • • Standby mode • Active mode • Radio mode – Receive radio mode – Transmit radio mode In reset mode, the BlueNRG-MS is in ultra-low power consumption: all voltage regulators, clocks and the RF interface are not powered. The BlueNRG-MS enters Reset mode by asserting the external reset signal. As soon as it is de-asserted, the device follows the normal activation sequence to transit to Active mode. In sleep mode either the low speed crystal oscillator or the low speed ring oscillator are running, whereas the high speed oscillators are powered down as well as the RF interface. The state of the BlueNRG-MS is retained and the content of the RAM is preserved. Depending on the application, part of the RAM (RAM2 block) can be switched off during sleep to save more power (refer to stack mode 1, described in UM1868). While in sleep mode, the BlueNRG-MS waits until an internal timer expires and then it goes into Active mode. The transition from Sleep mode to Active mode can also be activated through the SPI interface. Standby mode and Sleep mode are equivalent but the low speed frequency oscillators are powered down. In Standby mode the BlueNRG-MS can be activated through the SPI interface. In Active mode the BlueNRG-MS is fully operational: all interfaces, including SPI and RF, are active as well as all internal power supplies together with the high speed frequency oscillator. The MCU core is also running. Radio mode differs from Active mode as also the RF transceiver is active and it is capable of either transmitting or receiving. Figure 12. Simplified state machine reports the simplified state machine: Figure 12. Simplified state machine RESET Treset -active SLEEP Tsleep -active Tstandby -active Tactive -sleep STANDBY Tactive -stabndby ACTIVE TTX-active TRX-active Tactive -RX RX Tactive -TX TX AM17668v1 DS10691 - Rev 9 page 15/42 BlueNRG-MS Operating modes Table 4. BlueNRG-MS operating modes State Digital LDO OFF Reset Register contents lost ON Standby Register contents retained ON Sleep Register contents retained ON Active Register contents retained ON RX Register contents retained ON TX Register contents retained SPI LSOSC HSOSC Core RF synt. RX chain TX chain OFF OFF OFF OFF OFF OFF OFF ON OFF OFF OFF OFF OFF OFF ON ON OFF OFF OFF OFF OFF ON - ON ON OFF OFF OFF ON - ON ON ON ON OFF ON - ON ON ON OFF ON Table 5. BlueNRG-MS transition times Transition Maximum time 1.5 ms Reset-active (1) Standby-active(1) Sleep-active(1) Active-RX Active-TX RX-TX or TX-RX Condition 32 kHz not available 7 ms 32 kHz RO 94 ms 32 kHz XO 0.42 ms 32 kHz not available 6.2 ms 32 kHz RO 93 ms 32 kHz XO 0.42 ms 125 µs Channel change 61 µs No channel change 131 µs Channel change 67 µs No channel change 150 µs 1. These measurements are taken using NX3225SA-16.000 MHz-EXS00A-CS05997. DS10691 - Rev 9 page 16/42 BlueNRG-MS Application controller interface 7 Application controller interface The application controller interface (ACI) is based on a standard SPI module with speeds up to 8 MHz. The ACI defines a protocol providing access to all the services offered by the layers of the embedded Bluetooth stack. The ACI commands are described in the BlueNRG-MS ACI command interface document (UM1865). In addition, the ACI provides a set of commands that allow to program BlueNRG-MS firmware from an external device connected to SPI. The complete description of updater commands and procedures is provided in a separate application note (AN4491). DS10691 - Rev 9 page 17/42 BlueNRG-MS Absolute maximum ratings and thermal data 8 Absolute maximum ratings and thermal data Absolute maximum ratings are those values above which damage to the device may occur. Functional operation under these conditions is not implied. All voltages are referred to GND. Table 6. Absolute maximum ratings Pin Parameter Value Unit 5, 19, 24, 26, 28 DC-DC converter supply voltage input and output -0.3 to +3.9 V 12, 29 DC voltage on linear voltage regulator -0.3 to +3.9 V 1, 2, 3, 4, 6, 7, 8, 9, 10, 11, 25, 27, 30, 31, 32 DC voltage on digital input/ output pins -0.3 to +3.9 V 13, 14, 15,16 DC voltage on analog pins -0.3 to +3.9 V 17, 18, 22, 23 DC voltage on XTAL pins -0.3 to +1.4 V DC voltage on RF pins -0.3 to +1.4 V TSTG Storage temperature range -40 to +125 °C VESD-HBM Electrostatic discharge voltage ±2.0 kV 20, 21 (1) 1. +8 dBm input power at antenna connector in standard mode, +11 dBm in high power mode, with given reference design. Table 7. Thermal data DS10691 - Rev 9 Symbol Parameter Value Rthj-amb Thermal resistance junctionambient 34 (QFN32) Rthj-c Thermal resistance junctioncase 50 (WLCSP36) 2.5 (QFN32) 25 (WLCSP36) Unit °C/W °C/W page 18/42 BlueNRG-MS General characteristics 9 General characteristics Table 8. Recommended operating conditions Symbol Parameter Min. Typ. Max. Unit VBAT Operating battery supply voltage 1.7 — 3.6 V TA Operating ambient temperature range -40 — +85 °C DS10691 - Rev 9 page 19/42 BlueNRG-MS Electrical specification 10 Electrical specification 10.1 Electrical characteristics Characteristics measured over recommended operating conditions unless otherwise specified. Typical value are referred to TA = 25 °C, VBAT = 3.0 V. All performance data are referred to a 50 W antenna connector, via reference design, QFN32 package version. Table 9. Electrical characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit Power consumption when DC-DC converter active Reset Standby Sleep Active RX IBAT Supply current TX standard mode TX high power mode 5 RAM2 OFF 1.3 RAM2 ON 2 32 kHz XO ON (RAM2 OFF) 1.7 32 kHz XO ON (RAM2 ON) 2.4 32 kHz RO ON (RAM2 OFF) 2.8 32 kHz RO ON (RAM2 ON) 3.5 CPU, Flash and RAM on 2 High power mode 7.7 Standard mode 7.3 +5 dBm 11 0 dBm 8.2 -2 dBm 7.2 -6 dBm 6.7 -9 dBm 6.3 -12 dBm 6.1 -15 dBm 5.9 -18 dBm 5.8 +8 dBm 15.1 +4 dBm 10.9 +2 dBm 9 -2 dBm 8.3 -5 dBm 7.7 nA µA µA mA mA mA mA Power consumption when DC-DC converter not active DS10691 - Rev 9 page 20/42 BlueNRG-MS Electrical characteristics Symbol Parameter Test conditions Min. Reset Standby Sleep Typ. Max. 5 RAM2 OFF 1.4 RAM2 ON 2 32 kHz XO ON (RAM2 OFF) 1.7 32kHz XO ON (RAM2 ON) 2.4 32 kHz RO ON (RAM2 OFF) 2.8 32 kHz RO ON (RAM2 ON) 3.5 Unit nA µA µA Active 2 CPU, Flash and RAM on RX IBAT Supply current TX standard mode TX high power mode High power mode 14.5 Standard mode 14.3 +5 dBm 21 0 dBm 15.4 -2 dBm 13.3 -6 dBm 12.2 -9 dB 11.5 -12 dBm 11 -15 dBm 10.6 -18 dBm 10.4 +8 dBm 28.8 +4 dBm 20.5 +2 dBm 17.2 -2 dBm 15.3 -5 dBm 14 -8 dBm 13 -11 dBm 12.3 -14 dBm 12 mA mA mA mA Digital I/O DS10691 - Rev 9 CIN Port I/O capacitance TRISE Rise time 0.1*VDD to 0.9*VDD, CL = 50 pF TFALL Fall time 0.9*VDD to 0.1*VDD, CL = 50 pF T(RST) Hold time for reset - 1.5 TC VBAT range 3.0 3.3 3.6 V TC1 VBAT range 2.25 2.5 2.75 V 1.29 1.38 1.67 pF 5 19 ns 6 22 ns ms page 21/42 BlueNRG-MS Electrical characteristics Symbol Parameter TC2 VBAT range VIL VIH VOL VOH IOL IOH DS10691 - Rev 9 Input low voltage Input high voltage Output low voltage Output high voltage Low level output current @ VOL (max.) High level output current @ VOH (min.) Test conditions Min. Typ. Max. Unit 1.7 1.8 1.98 V VBAT range: TC -0.3 0.8 VBAT range: TC1 -0.3 0.7 VBAT range: TC2 -0.3 0.63 VBAT range: TC 2.0 3.6 VBAT range: TC1 1.7 3.6 VBAT range: TC2 1.17 3.6 VBAT range: TC 0.4 VBAT range: TC1 0.7 VBAT range: TC2 0.45 VBAT range: TC 2.4 VBAT range: TC1 1.7 VBAT range: TC2 1.35 VBAT range: TC 3.4 5.6 7.9 VBAT range: TC1 3.8 6.6 10.1 VBAT range: TC2 1.6 3 5 VBAT range: TC 5.5 10.6 17.6 VBAT range: TC1 3.7 7.2 12.0 VBAT range: TC2 1.4 3 5.6 V V V V mA mA page 22/42 BlueNRG-MS RF general characteristics 10.2 RF general characteristics Characteristics measured over recommended operating conditions unless otherwise specified. Typical value are referred to T A= 25 °C, VBAT = 3.0 V. All performance data are referred to a 50 W antenna connector, via reference design, QFN32 package version. Table 10. RF general characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit FREQ Frequency range 2400 – 2483.5 MHz FCH Channel spacing – 2 – MHz RFch RF channel center frequency 2402 – 2480 MHz 10.3 RF transmitter characteristics Characteristics measured over recommended operating conditions unless otherwise specified. Typical value are referred to TA = 25 °C, VBAT = 3.0 V. All performance data are referred to a 50 W antenna connector, via reference design, QFN32 package version. Table 11. RF Transmitter characteristics Symbol Parameter MOD Modulation scheme BT DS10691 - Rev 9 Test conditions Min. Typ. Max. Unit GFSK Bandwidth-bit period product – 0.5 – Mindex Modulation index 0.45 0.5 0.55 DR Air data rate – 1 – Mbps STacc Symbol time accuracy – – 50 ppm High power – +8 +10 dBm PMAX Maximum output power at antenna connector Standard mode – +5 +7 dBm PRFC Minimum output High power power Standard mode – -15 – – -18 – PRFC RF power accuracy – – ±2 dB dB PBW1M 6 dB bandwidth for modulated carrier (1 Mbps) Using resolution bandwidth of 100 kHz 500 – – kHz PRF1 1st adjacent channel transmit power 2 MHz Using resolution bandwidth of 100 kHz and average detector – – -20 dBm PRF2 2nd adjacent channel transmit power >3 MHz Using resolution bandwidth of 100 kHz and average detector – – -30 dBm page 23/42 BlueNRG-MS RF receiver characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit PSPUR Spurious emission Harmonics included. Using resolution bandwidth of 1 MHz and average detector – – -41 dBm CFdev Center frequency deviation During the packet and including both initial frequency offset and drift – – ±150 kHz Freqdrift Frequency drift During the packet – – ±50 kHz IFreqdrift Initial carrier frequency drift – – ±20 kHz DriftRatemax Maximum drift rate – – 400 Hz/µs Standard mode @ 2440 MHz – 25.9 + j44.4 – High power mode @ 2440 MHz – 25.4 + j20.8 – ZLOAD 10.4 Optimum differential load Ω RF receiver characteristics Characteristics measured over recommended operating conditions unless otherwise specified. Typical value are referred to T A= 25 °C, V BAT = 3.0 V. All performance data are referred to a 50 W antenna connector, via reference design, QFN32 package version. Table 12. RF receiver characteristics Symbol RX SENS Parameter Sensitivity Test conditions Min. BER
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