CLT03-2Q3

CLT03-2Q3, CLT03-1SC3 Datasheet Self powered digital input current limiter Features Product label • • • • • • • • • • • Single and dual isolated channel devices No power supply needed Digital input current limitation Enables input to meet type 1 and 3 characteristic of IEC 61131-2 standard Deglitch filter for EMC robustness High side / Low side compatible Inputs are reverse plugin compatible Drive isolated opto-couplers or non-isolated LVTTL digital input termination Operating ambient temperature range from -30 °C to 125 °C Two packages – SOT23-8L - 650 µm pitch – QFN-16L - 500 µm pitch Complies with the following standards: – IEC 61000-4-2 level 1: ±4 kV (air discharge) – IEC 61000-4-2 level 1: ±2 kV (contact discharge) Applications Product status link CLT03-2Q3, CLT03-1SC3 Product summary Order code Package Packing CLT03-1SC3 CLT03-2Q3 SOT23-8L QFN-16L Tape and reel Where current limitation is required in factory automation applications: • Programmable logic controller • Remote input module Description The CLT03 series is a digital input current limiter which drastically reduces the power dissipation of the digital inputs. It does not require external power supply as the device is activated with the input signal and it consumes no power in off state. The CLT03 series is high side and low side compatible, as well as reverse plugin compatible. It can drive either opto-coupler or 3.3 V LVTTL circuit. The CLT03-2Q3 can be evaluated thanks to the STEVAL-IFP035V1 evaluation board which embeds an isolated and non-isolated digital inputs configuration. DS12302 - Rev 8 - January 2021 For further information contact your local STMicroelectronics sales office. www.st.com CLT03-2Q3, CLT03-1SC3 I/O pin description 1 I/O pin description Table 1. CLT03-1SC3 pins name, type, and description Name Pin # Type Description INA 2 Signal input Logic input with current limitation INATT 3 Signal input Logic input with current limitation for non-isolated configuration INB 1 Signal input Logic input with current limitation TP 8 Test input VBUF 7 OUTN 4 Ground OUTP 6 Signal output PD 5 Ground Test pulse input for capacitor Power output Buffer capacitor Logic output ground (channel 1 output ground) Data output Logic output ground with pull down resistor (non-isolated mode) Figure 1. SOT23-8L pinout (top view) Table 2. CLT03-2Q3 pins name, type, and description Name Pin # Type Description INA1 / INA2 7/3 Signal input Logic input with current limitation INATTL1 / INATTL2 6/2 Signal input Logic input with current limitation for non-isolated configuration INB1 / INB2 8/4 Signal input Logic input with current limitation TP1 / TP2 9 / 14 Test input VBUF1 / VBUF2 10 / 15 OUTN1 5 / TAB1 Ground Logic output ground (channel 1 output ground) OUTN2 13 / TAB2 Ground Logic output ground (channel 2 output ground) OUTP1 / OUTP2 11 / 16 Signal output PD1/PD2 12 / 1 Ground Test pulse input for capacitor Power output Buffer capacitor Data output Logic output ground with pull down resistor (non-isolated mode) Figure 2. QFN-16L 4.0 x 2.0 pinout (top view) DS12302 - Rev 8 page 2/22 CLT03-2Q3, CLT03-1SC3 Characteristics 2 Characteristics 2.1 Circuit block diagram Figure 3. Channel diagram 2.2 Absolute ratings Stresses outside the absolute ratings range may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to absolute rating conditions for extended periods may affect device reliability. Table 3. Absolute ratings (Tamb = 25 °C, unless otherwise specified) Symbol VPP VPP (1)(2) Parameter name Value Unit Peak pulse voltage, HBM, MIL STD 883J-Method 3015.9 2 kV Peak pulse voltage (pins INA, INATTL & INB), IEC 61000-4-2 (contact) 2 kV -60 to +60 V 230 VAC VIN Input voltage VISO CLT03-2Q3: Isolation between channel 1 and 2 Tj Junction temperature -30 to +125 °C TSTG Storage temperature -55 to +150 °C 1. See application schematic 2. Performance level depends on layout and environment Table 4. Thermal resistance parameter Symbol DS12302 - Rev 8 Parameter Value Unit Rth(j-a) CLT03-1SC3: Thermal resistance junction to ambient, according to EIA/JEDEC JESD51-7 and JESD51-5 120 °C/W Rth(j-a) CLT03-2Q3: Thermal resistance junction to ambient, according to EIA/JEDEC JESD51-7 and JESD51-5 41 °C/W page 3/22 CLT03-2Q3, CLT03-1SC3 Electrical characteristics 2.3 Electrical characteristics Table 5. Electrical characteristics (-30 °C < Tambient < +125 °C, unless otherwise specified) (values) Symbol Description Name Min. Typ. Max. Unit 4 mA 11 V Input ILIM Input current – On state VTLH Low to High state input voltage VTHL High to Low state input voltage 2.5 9.4 5 VHYST Input triggering voltage hysteresis 1.2 VFAULT Fault mode threshold voltage 30 IFAULT Input current in fault region VIN > VFAULT 1 7.5 V 2.6 40 V V 2.5 mA 35 kHz Timing parameters fIN tFAULT Input frequency Fault mode triggering latency after VIN > VFAULT 25 µs tPLH Input to output low to high propagation time (including deglitch filter)(1) 2 5 µs tPHL Input to output high to low propagation time (including deglitch filter) (1) 2 5 µs 2 4 mA 1 mA Ouput IOUT On state Off state VOUT On state Off state Isolated mode Non-isolated mode Isolated and non-isolated mode -10 10 µA Isolated mode 0.7 3.6 V 3 3.6 V -0.3 0.4 V Non-isolated mode Isolated and non-isolated mode ROUT OUTP to OUTN internal equivalent output resistance (VINA - VINB = 0 V) RPD OUTN to PD internal pull down resistor 24 2.85 kΩ 4.25 kΩ 1. See Figure 10. tPLH and tPHL test condition DS12302 - Rev 8 page 4/22 CLT03-2Q3, CLT03-1SC3 U-I operation description 3 U-I operation description Figure 4. Input U-I operation Figure 5. Output U-I operation DS12302 - Rev 8 page 5/22 CLT03-2Q3, CLT03-1SC3 Fault mode description 4 Fault mode description When the input voltage VIN exceeds a threshold VFAULT = 30 V the CLT03 series activates the Fault Mode with a defined latency tFAULT. In this mode the CLT03 series further reduces the input current limitation down to IFAULT and the corresponding output channel is deactivated. Fault mode ensures defined and safe operation of the CLT03 series in overvoltage condition as it is often required by safety regulations. DS12302 - Rev 8 page 6/22 CLT03-2Q3, CLT03-1SC3 Deglitch filter 5 Deglitch filter Figure 6. Deglitch filter tPLH tPHL Signal input Signal input Internal buffer Internal buffer Signal output Signal output No glitch Example with glitches To provide the best EMI robustness solution, a deglitch filter based on a non-resettable mono-stable has been integrated. As described in Figure 6. Deglitch filter, to avoid parasitic spike in output signal when glitches occur in input signals, the integrated internal buffer cleans the glitch effect. The output activation and deactivation action times is defined by tPLH and tPHL when no glitch. DS12302 - Rev 8 page 7/22 CLT03-2Q3, CLT03-1SC3 Test pulse feature description 6 Test pulse feature description The built-in test pulse feature eases diagnostic checks. It is possible to know on a regular basis that the CLT03 is still working properly. This feature is especially important for safety applications and often required by safety regulations. In order, to enable the Test Pulse feature a capacitor should be connected between TP and OUTN pins. When such a capacitor is connected, the OUTP value will be forced to low state every TP period (PTP) for a define test pulse width (tTP). TP period is equal to 256 times tTP. The frequency of the “Test Pulse low state” is managed through the capacitor value. In order to disable this feature, TP should be shorted to OUTN. Table 6. Test pulse parameters Symbol Description Min. Typ. Max. Unit fTP Test pulse frequency 4.1 219 kHz CTP External capacitor range 100 4700 pF tTP Test pulse width 1/fTP ms PTP Test pulse period 256 x tTP ms ΔfTP Test pulse frequency variation (out of capacitance variation) -60 +60 % Figure 7. Test Pulse parameters description IN IN OUT OUT tTP PTP No test pulse DS12302 - Rev 8 Test pulse actived page 8/22 CLT03-2Q3, CLT03-1SC3 Test pulse feature description Figure 8. fTP versus CTP value Figure 9. High side - isolated configuration - test pulse activated DS12302 - Rev 8 page 9/22 CLT03-2Q3, CLT03-1SC3 Propagation time measurement description 7 Propagation time measurement description Figure 10. tPLH and tPHL test condition V output input 12 V V TLH V THL 2.4 V 0.4 V 100ns 7µs t PLH Note: t t PHL for tPLH and tPHL measurement, VTLH and VTHL should be determined for each sample. Timing measurement should be done with these samples specific VTLH and VTHL thresholds. DS12302 - Rev 8 page 10/22 CLT03-2Q3, CLT03-1SC3 Simplified application schematic 8 Simplified application schematic Table 7. Configuration compatibility of CLT03 series Symbol High Side Low Side Isolated Yes Yes Non-isolated Yes No Each circuit given in this section is given for 1 channel only. For each circuit, the test pulse feature is disabled. In order to activate the test pulse feature, a capacitor must be added between TP and OUTN (see Section 6 Test pulse feature description). Figure 11. High side - isolated configuration - test pulse not activated DS12302 - Rev 8 page 11/22 CLT03-2Q3, CLT03-1SC3 Simplified application schematic Figure 12. Low side - isolated configuration - test pulse not activated Figure 13. Low side - non-isolated configuration - test pulse not activated Note: DS12302 - Rev 8 OUTP to PD connection is optional. page 12/22 CLT03-2Q3, CLT03-1SC3 Package information 9 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 9.1 SOT23-8L 2.9 x 2.8 mm package information Figure 14. SOT23-8L 2.9 x 2.8 mm package outline Table 8. SOT23-8L 2.9 x 2.8 mm package mechanical data Dimensions Inches(1) Millimeters Ref. Min. Typ. Max. Min. Typ. Max. A 0.90 1.27 1.45 0.035 0.050 0.057 A1 0.00 0.762 0.15 0.000 0.003 0.006 A2 0.90 1.20 1.30 0.035 0.047 0.051 b 0.22 0.30 0.38 0.009 0.012 0.0115 C 0.09 0.152 0.20 0.004 0.006 0.008 D 2.80 2.90 3.00 0.110 0.114 0.118 E 2.60 2.80 3.00 0.102 0.110 0.118 E1 1.50 1.65 1.75 0.059 0.065 0.069 e 0.65 REF 0.026 REF e1 1.95 REF 0.077 REF L 0.35 a 0° 0.45 0.55 0.014 8° 0° 0.018 0.022 8° 1. Values in inches are converted from mm and rounded to 4 decimal digits. DS12302 - Rev 8 page 13/22 CLT03-2Q3, CLT03-1SC3 SOT23-8L 2.9 x 2.8 mm package information Figure 15. Footprint recommendations, dimensions in mm Figure 16. SOT23-8L 2.9 x 2.8 mm marking Figure 17. Package orientation in reel Figure 18. Tape and reel orientation Figure 19. 7'' reel dimension values Figure 20. Inner box dimension values 30 Ø 180 max 14.4 2±0.5 Ø 13 Ø 60 Ø 20.2 min 205 205 DS12302 - Rev 8 page 14/22 CLT03-2Q3, CLT03-1SC3 SOT23-8L 2.9 x 2.8 mm package information Figure 21. Tape outline Table 9. Tape dimension values Dimensions Millimeters Ref. DS12302 - Rev 8 Min. Typ. Max. D0 1.45 1.5 1.6 D1 1.00 F 3.45 3.50 3.55 K0 1.30 1.40 1.50 P0 3.90 4.00 4.10 P1 3.90 4.00 4.10 P2 1.95 2.00 2.05 W 7.90 8.00 8.30 page 15/22 CLT03-2Q3, CLT03-1SC3 QFN-16L 4.0 x 2.0 package information 9.2 QFN-16L 4.0 x 2.0 package information Figure 22. QFN-16L 4.0 x 2.0 package outline Table 10. QFN-16L 4.0 x 2.0 package mechanical data Dimensions Inches(1) Millimeters Ref. Min. Typ. Max. Min. Typ. Max. 0.80 0.90 1.00 0.0315 0.0354 0.0394 A1 0.02 0.05 0.0008 0.0020 A3 0.20 A 0.008 B 0.18 0.25 0.30 0.0071 0.0100 0.0118 D 3.95 4.00 4.05 0.1555 0.1574 0.1594 E 1.95 2.00 2.05 0.0768 0.0787 0.0807 D2 1.25 1.40 1.51 0.0492 0.0551 0.0594 E2 0.70 0.85 0.95 0.0276 0.0334 0.0374 e 0.50 K 0.15 L 0.20 0.0197 0.0059 0.30 0.40 0.0079 0.0118 0.0157 1. Values in inches are converted from mm and rounded to 4 decimal digits. DS12302 - Rev 8 page 16/22 CLT03-2Q3, CLT03-1SC3 QFN-16L 4.0 x 2.0 package information Figure 24. Marking Figure 23. Footprint recommendations Figure 25. Package orientation in reel Figure 27. 7'' reel dimension values Figure 26. Tape and reel orientation Figure 28. Inner box dimension values 30 205 205 DS12302 - Rev 8 page 17/22 CLT03-2Q3, CLT03-1SC3 QFN-16L 4.0 x 2.0 package information Figure 29. Tape outline Table 11. Tape dimension values Dimensions Millimeters Ref. DS12302 - Rev 8 Min. Typ. Max. D0 1.45 1.5 1.6 D1 1.00 F 1.65 1.75 1.85 K0 1.10 1.15 1.20 P0 3.90 4.00 4.10 P1 3.90 4.00 4.10 P2 1.95 2.00 2.05 W 11.90 12.00 12.30 page 18/22 CLT03-2Q3, CLT03-1SC3 Reflow profile 10 Reflow profile Figure 30. ST ECOPACK® recommended soldering reflow profile for PCB mounting 250 240-245 °C Temperature (°C) -2 °C/s 2 - 3 °C/s 60 sec (90 max) 200 -3 °C/s 150 -6 °C/s 100 0.9 °C/s 50 Time (s) 0 30 60 90 120 150 180 210 240 Note: Minimize air convection currents in the reflow oven to avoid component movement. Note: Maximum soldering profile corresponds to the latest IPC/JEDEC J-ST-020. DS12302 - Rev 8 270 300 page 19/22 CLT03-2Q3, CLT03-1SC3 Ordering information 11 Ordering information Figure 31. Ordering information scheme 03 03 CLT CLT – – 1 2 SC Q 3 3 Current limiter Version Number of channels 1 = Single channel 2 = Dual channels Package type SC = SOT23-8L Q = QFN-16L 4.0 x 2.0 3 : 3 mA current limitation typ. Table 12. Ordering information Order code Marking(1) Package Weight Base qty. Delivery mode CLT03-1SC3 1SC3 SOT23-8L 18 mg 3000 Tape and reel CLT03-2Q3 CLT03 QFN-16L 4.0 x 2.0 20 mg 3000 Tape and reel 1. The marking can be rotated to differentiate assembly location DS12302 - Rev 8 page 20/22 CLT03-2Q3, CLT03-1SC3 Revision history Table 13. Document revision history Date Revision 18-Dec-2017 1 Initial release. 11-Dec-2018 2 Minor text change to improve readability. 3 Updated Section Features, Table 4. Electrical characteristics (-30 °C < Tj < +125 °C, unless otherwise specified) (values), Section 8 Simplified application schematic and Figure 6. Test Pulse parameters description. 23-Dec-2019 Changes Added Table 2. Thermal resistance parameter and Section 5 Deglitch filter. DS12302 - Rev 8 06-Feb-2020 4 Updated Table 4. Electrical characteristics (-30 °C < Tj < +125 °C, unless otherwise specified) (values) and Figure 4. Output U-I operation.. 04-Mar-2020 5 Updated Section Features, Section 2.2 Absolute ratings and Section 2.3 Electrical characteristics. 02-Dec-2020 6 Inserted SOT23-8L package information. Minor text change to improve readability. 18-Dec-2020 7 Updated Features and Figure 24. 12-Jan-2021 8 Updated Section 6 Test pulse feature description and SOT23-8L name. page 21/22 CLT03-2Q3, CLT03-1SC3 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. 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