E-L6204D

L6204 DMOS DUAL FULL BRIDGE DRIVER ■ ■ ■ ■ ■ ■ ■ ■ SUPPLY VOLTAGE UP TO 48V RDS(ON) 1.2Ω L6204 (25°C) MULTOPOWER BCD TECHNOLOGY CROSS CONDUCTION PROTECTION THERMAL SHUTDOWN 0.5A DC CURRENT TTL/CMOS COMPATIBLE DRIVER HIGH EFFICIENCY CHOPPING MULTIPOWER BCD TECHNOLOGY ) s ( ct du Powerdip 16+2+2 SO 24+2+2 o r P ORDERING NUMBERS: L6204 L6204D DESCRIPTION The L6204 is a dual full bridge driver for motor control applications realized in BCD technology which combines isolated DMOS power transistors with CMOS and Bipolar circuits on the same chip. By using mixed technology it has been possible to optimize the logic circuitry and the power stage to achieve the best possible performance. ) (s The logic inputs are TTL/CMOS compatible. Both channels are controlled by a separate Enable. BLOCK DIAGRAM t c u e t e ol Each bridge has a sense resistor to control the currenrt level. s b O The L6204 is mounted in an 20-lead Powerdip and SO 24+2+2 packages and the four center pins are used to conduct heat to the PCB. At normal operating temperatures no external heatsink is required. P e d o r Vs1 OUT 1 OUT 2 Vs2 OUT 3 OUT 4 t e l o VBOOT s b O IN1 IN4 ENABLE 1 ENABLE 2 IN2 BOOTSTRAP OSCILLATOR IN3 THERMAL SHUT DOWN CHARGE PUMP SENSE 1 July 2003 GND SENSE 2 1/12 L6204 PIN CONNECTIONS SENS1 1 20 VBOOT IN1 2 19 IN2 ENABLE1 3 18 OUT2 OUT1 4 17 Vs1 GND 5 16 GND GND 6 15 GND OUT3 7 14 Vs2 ENABLE2 8 13 OUT4 IN3 SENSE2 9 12 IN4 10 11 VCP SENSE1 1 28 VBOOT IN1 2 27 IN2 ENABLE1 3 26 OUT2 N.C. 4 25 N.C. N.C. 5 24 N.C. OUT1 6 23 VS1 GND 7 22 GND GND 8 21 GND OUT3 9 20 VS2 N.C. 10 19 N.C. 11 18 ENABLE2 12 17 IN3 13 16 SENSE2 14 DIP20 du ) s ( ct o r P 15 DIP16+2+2 N.C. N.C. OUT4 IN4 VCP SO24+2+2 e t e l SO24+2+2 o s b PIN DESCRIPTION SO Pin (*) DIP Pin Symbols 1 1 SENSE 1 2 2 IN1 3 3 ENABLE 1 6 4 7 5 8 6 s b O 13 r P e OUT 1 GND t e l o 9 12 u d o 7 ) s ( ct GND OUT 3 -O Functions Sense resistor to provide the feedback for motor current control of the bridge A Digital input from the motor controller (bridge A) A logic level low on this pin disable the bridge A Output of one half bridge of the bridge A Common Power Ground Common Power Ground Ouput of one half bridge of the bridge B 8 ENABLE 2 A logic level low on this pin disable the bridge B 9 IN 3 Digital input from the motor controller (bridge B) 14 10 15 11 SENSE 2 16 12 IN 4 17 13 OUT 4 20 14 V 2 S Supply voltage bridge B 21 15 GND Common Power Ground 22 16 GND Common Power Ground 23 17 V 1 Supply Voltage bridge A 26 18 OUT 2 27 19 IN 2 Digital input from the motor controller (bridge A) 28 20 VBOOT Overvoltage input for driving of the upper DMOS Sense resistor to provide the feedback for motor current control of the bridge B BOOSTRAP OSC. VCP Oscillator output for the external charge pump S Digital input from the motor controller (bridge B) Output of one half bridge of the bridge B Output of one half bridge of the bridge A (*) For SO package the pins 4, 5, 10, 11, 18, 19, 24 and 25 are not connected. 2/12 L6204 ABSOLUTE MAXIMUM RATINGS Symbol Parameter VS Value Unit Supply Voltage VIN, VEN Input or Enable Voltage Range 50 V -0.3 to +7 V 3 A Pulsed Output Current Io VSENSE Sensing Voltage -1 to 4 V VBOOT Bootstrap Supply 60 V 5 1.23 2 W W W Total power dissipation: (Tpins = 80°C) (Tamb = 70°C no copper area on PCB) (Tamb = 70°C 8cm2 copper area on PCB) Ptot Tstg, Tj Storage and Junction Temperature u d o THERMAL DATA Symbol Parameter Rth j-pins Thermal Resistance Junction-pins Rth j-amb Thermal Resistance Junction-ambient Supply Voltage IS Total Quiescent Current fC Commutation Frequency TJ Td Test Condition s ( t c du 73 Min. Typ. 12 EN1=EN2=H; IN1=IN2=IN3=IN4=L EN1 = EN2 = L DIP Unit 14 °C/W 65 °C/W Max. Unit 48 V 10 10 mA mA KHz Thermal Shutdown 150 °C Dead Time Protection 500 ns ro P e let o s b RDS O ) 16 20 TRANSISTORS IDSS e t e l Max o s b Parameter VS Pr SO Max ELECTRICAL CHARACTERISTCS Symbol ) s ( ct °C -40 to 150 Leakage Current OFF 1 mA On Resistance ON 1.2 Ω LOGIC LEVELS O VINL, VENL Input Low Voltage VINH, VENH Input High Voltage IINL, IENL Input Low Current IN1 = IN2 = IN3 = IN4 = EN1 = EN2 =L IINH, IENH Input High Current IN1 = IN2 = IN3 = IN4 = EN1 = EN2 =H -0.3 0.8 2 50 V 7 V -10 µA µA 3/12 L6204 APPLICATION DIAGRAM STEPPER MOTOR A B Vs C1 Vs1 D1 OUT2 OUT1 OUT3 Vs2 OUT4 VBOOT IN4 IN1 ) s ( ct ENABLE1 ENABLE 2 IN2 THERMAL SHUT DOWN CHARGE PUMP BOOTSTRAP OSCILLATOR D2 SENSE1 SENSE1 C2 SENSE2 let RS1 o s b CIRCUIT DESCRIPTION r P e SENSE2 GND u d o IN3 RS2 O ) L6204 is a dual full bridge IC designed to drive DC motors, stepper motors and other inductive loads. Each bridge has 4 power DMOS transistor with RDSon = 1.2Ω and the relative protection and control circuitry. (see fig. 3) s ( t c The 4 half bridges can be controlled independently by means of the 4 inputs IN!, IN2, IN3, IN4 and 2 enable inputs ENABLE1 and ENABLE2. u d o External connections are provided so that sensing resistors can be added for constant current chopper applications. r P e LOGIC DRIVE (*) t e l o INPUTS bs O IN1 IN2 OUTPUT MOSFETS IN3 IN4 L L Sink 1, Sink 2 L H Sink 1, Source 2 H L Source 1, Sink 2 H H Source 1, Source 2 X X All transistor turned OFF EN1=EN2=H EN1=EN2=L L = Low H = High X = Don’t care (*) True table for the two full bridges 4/12 L6204 CROSS CONDUCTION Although the device guarantees the absence of cross-conduction, the presence of the intrinsic diodes in the POWER DMOS structure causes the generation of current spikes on the sensing terminals. This is due to charge-discharge phenomena in the capacitors C1 & C2 associated with the drain source junctions (fig. 1). When the output switches from high to low, a current spike is generated associated with the capacitor C1. On the low-to-high transition a spike of the same polarity is generated by C2, preceded by a spike of the opposite polarity due to the charging of the input capacity of the lower POWER DMOS transistor (see fig. 2). Figure 1. Intrinsic Structures in the POWER MOS Transistors ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e Figure 2. Current Typical Spikes on the Sensing Pin t e l o s b O 5/12 L6204 TRANSISTOR OPERATION ON STATE When one of the POWER DMOS transistors is ON it can be considered as a resistor RDS(ON) = 1.2Ω at a junction temperature of 25°C. In this condition the dissipated power is given by : PON = RDS(ON) · IDS2 The low RDS(ON) of the Multipower-BCD process can provide high currents with low power dissipation. OFF STATE When one of the POWER DMOS transistor is OFF the VDS voltage is equal to the supply voltage and only the leakage current IDSS flows. The power dissipation during this period is given by : POFF = VS · IDSS ) s ( ct u d o TRANSITIONS r P e Like all MOS power transistors the DMOS POWER transistors have as intrinsic diode between their source and drain that can operate as a fast freewheeling diode in switched mode applications. t e l o During recirculation with the ENABLE input high, the voltage drop across the transistor is RDS(ON) . ID and when the voltage reaches the diode voltage it is clamped to its characteristic. When the ENABLE input is low, the POWER MOS is OFF and the diode carries all of the recirculation current. The power dissipated in the transitional times in the cycle depends upon the voltage and current waveforms in the application. Ptrans = IDS(t) × VDS(t) BOOTSTRAP CAPACITORS ) (s s b O t c u To ensure the correct driving of high side drivers a voltage higher than V S is supplied on pin 20 (Vboot). This bootstrap voltage is not needed for the lower power DMOS transistor because their sources are grounded. To produce this voltage a charge pump method is used and mAde by two external capacitors and two diodes. It can supply the 4 driving blocks of the high side drivers. Using an external capacitor the turn-on speed of the high side driver is very high; furthermore with different capacitance values it is possible to adapt the device to different switching frequencies. It is also possible to operate two or more L6204s using only 2 diodes and 2 capacitance for all the ICs; all the Vboot pins are connected to the Cstore capacitance while the pin 11 (VCP) of just one L6204 is connect to Cpump, obviously all the L6204 ICs have to be connected to the same VS. (see fig. 6) d o r P e t e l o s b O Figure 3. Two Phase Chopping IN1 = H IN2 = L EN1 = H 6/12 IN1 = L IN2 = H EN1 = H L6204 Figure 4. One Phase Chopping IN1 = H IN2 = H EN1 = H IN1 = H IN2 = L EN1 = H ) s ( ct u d o Figure 5. Enable Chopping r P e t e l o )- IN1 = H IN2 = L EN1 = H Figure 6. s ( t c s b O IN1 = X IN2 = X EN1 = L u d o r P e t e l o s b O DEAD TIME To protect the device against simultaneous conduction in both arms of the bridge and the resulting rail-torail short, the logic circuits provide a dead time. THERMAL PROTECTION A thermal protection circuit has been included that will disable the device if the junction temperature reaches 150 °C. When the temperature has fallen to a safe level the device restarts under the control of the input and enable signals. 7/12 L6204 APPLICATION INFORMATION RECIRCULATION During recirculation with the ENABLE input high, the voltage drop across the transistor is RDS(ON). IL for voltages less than 0.7 V and is clamped at a voltage depending on the characteristics of the source-drain diode for greater voltages. Although the device is protected against cross conduction, current spikes can appear on the current sense pin due to charge/discharge phenomena in the intrinsic source drain capacitances. In the application this does not cause any problems because the voltage created across the sense resistor is usually much less than the peak value, although a small RC filter can be added if necessary. POWER DISSIPATION (each bridge) In order to achieve the high performance provided by the L6204 some attention must be paid to ensure that it has an adequate PCB area to dissipate the heat. The first stage of any thermal design is to calculate the dissipated power in the appl ication, for this example the half step operation shown in figure 7 is considered. ) s ( ct u d o RISE TIME Tr r P e When an arm of the half bridge is turned on current begins to flow in the inductive load until the maximum current IL is reached after a time Tr. t e l o The dissipated energy EOFF/ON is in this case : EOFF/ON = [RDS(ON) · IL2 · Tr] · 2/3 Figure 7. ) (s s b O t c u d o r P e t e l o s b O ON TIME TON During this time the energy dissipated is due to the ON resistance of the transistors EON and the commutation ECOM. As two of the POWER DMOS transistors are ON EON is given by : EON = IL 2 · RDS(ON) · 2 · TON In the commutation the energy dissipated is : ECOM = VS · IL · TCOM · fSWITCH · TON Where : TCOM = Commutation Time and it is assumed that ; TCOM = TTURN-ON = TTURN-OFF = 100 ns fSWITCH = Chopper frequency 8/12 L6204 FALL TIME Tf For this example it is assumed that the energy dissipated in this part of the cycle takes the same form as that shown for the rise time : EON/OFF = [RDS(ON) · IL · Tf] · 2/3 QUIESCENT ENERGY The last contribution to the energy dissipation is due to the quiescent supply current and is given by : EQUIESCENT = IQUIESCENT · VS · T TOTAL ENERGY PER CYCLE ETOT = (EOFF/ON + EON + ECOM + EON/OFF) bridge 1 + (EOFF/ON + EON + ECOM + EON/OFF)bridge 2 + + EQUIESCENT The Total Power Dissipation PDIS is simply : PDIS = ETOT/T Tr = Rise time ) s ( ct u d o r P e TON = ON time Tf = Fall Time t e l o Td = Dead time T = Period s b O T = Tr + TON + Tf + Td ) (s t c u d o r P e t e l o s b O 9/12 L6204 mm DIM. MIN. a1 0.51 B 0.85 TYP. inch MAX. MIN. MAX. 0.020 1.40 b 0.033 0.50 b1 TYP. 0.38 0.055 0.020 0.50 D 0.015 0.020 24.80 8.80 0.346 e 2.54 0.100 e3 22.86 0.900 u d o F 7.10 0.280 I 5.10 0.201 L 3.30 Z 0.130 1.27 0.050 ) (s t c u d o r P e t e l o 10/12 ) s ( ct 0.976 E s b O OUTLINE AND MECHANICAL DATA r P e s b O t e l o Powerdip 20 L6204 mm DIM. MIN. TYP. A inch MAX. MIN. TYP. 2.65 MAX. 0.104 a1 0.1 0.3 0.004 0.012 b 0.35 0.49 0.014 0.019 b1 0.23 0.32 0.009 0.013 C OUTLINE AND MECHANICAL DATA 0.5 0.020 c1 ) s ( ct 45° (typ.) D 17.7 18.1 0.697 0.713 E 10 10.65 0.394 0.419 e 1.27 0.050 e3 16.51 0.65 F 7.4 7.6 0.291 0.299 L 0.4 1.27 0.016 0.050 8 ° (max.) S ) (s u d o r P e s b O t e l o SO28 t c u d o r P e t e l o s b O 11/12 L6204 ) s ( ct u d o r P e t e l o ) (s s b O t c u d o r P e t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. STMicroelectronics acknowledges the trademarks of all companies referred to in this document. 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