ECMF4-20A42N10

ECMF4-20A42N10 Datasheet Common mode filter with ESD protection for high speed serial interface Features • • D1+ to connector 1 10 D1+ to IC D1- to connector 2 9 D1- to IC GND 3 8 GND D2+ to connector 4 7 D2+ to IC D2- to connector 5 6 D2- to IC Product status • • • • • 5GHz differential bandwidth to comply with HDMI 2.0, HDMI 1.4, USB 3.1, MIPI, Display port, etc. High common mode attenuation on LTE, GSM, GPS and WLAN frequencies: – -13 dB at 0.7 GHz – -23 dB at 1.5 GHz – -25 dB at 2.4 GHz – -23 dB at 2.7 GHz – -13 dB at 5.0 GHz Very low PCB space consumption Thin package: 0.5 mm max. Lead free and RoHS package High reduction of parasitic elements through integration Complies with IEC 61000-4-2 level 4 standards: – ±15 kV (air discharge) – ±8 kV (contact discharge) Applications • • • • Notebook, laptop Streaming box Set top box Portable devices ECMF4-20A42N10 Description The is a highly integrated common mode filter designed to suppress EMI/RFI common mode noise on high speed differential serial buses like HDMI 2.0, HDMI1.4, USB 3.1 Gen 1, Ethernet, MIPI, Display port and other high speed serial interfaces. It has a very large differential bandwidth to comply with these standards and can also protect and filter 2 differential lanes. DS11458 - Rev 3 - May 2018 For further information contact your local STMicroelectronics sales office. www.st.com ECMF4-20A42N10 ECMF4-20A42N10 Characteristics 1 ECMF4-20A42N10 Characteristics Table 1. Absolute maximum ratings (Tamb = 25 °C) Symbol Parameter Value Unit Contact discharge 8 kV Air discharge 15 IEC 61000-4-2: VPP Peak pulse voltage IRMS Maximum RMS current Top Maximum operating temperature range -55 to +125 Tstg Storage temperature range -55 to +150 TL 100 Maximum temperature for soldering during 10 s mA °C 260 Figure 2. Electrical characteristics (definitions) I VRM VCL IRM IPP VBR CDIODE Maximum stand-off voltage Clamping voltage at peak pulse current IPP Leakage current at VRM Peak pulse current Breakdown voltage ESD diode capacitance RDC fC DC serial resistance Differential cut off frequency IPP IR IRM V VRM VBR VCL Table 2. Electrical characteristics (Tamb = 25 °C) Symbol Min. Typ. 4.5 5.5 Max. Unit VBR IR = 1 mA IRM VRM = 3 V per line RDC DC serial resistance, IDC = 20 mA 5.5 Ω Differential mode cut-off frequency at -3 dB 5.0 GHz fc VCL Cdiode DS11458 - Rev 3 Test conditions 100 IPP = 1 A - 8/20 μs 8 kV contact discharge after 30 ns, IEC 61000-4-2 VBIAS = 0 V, 2.5 GHz ≤ f ≤ 6 GHz, VOSC = 30 mV V 10 11 0.35 0.45 nA V pF page 2/14 ECMF4-20A42N10 Characteristics (curves) Table 3. Pin description Pin number 1.1 Description Pin number Description 1 D1+ to connector 6 D2- to IC 2 D1- to connector 7 D2+ to IC 3 GND 8 GND 4 D2+ to connector 9 D1- to IC 5 D2- to connector 10 D1+ to IC Characteristics (curves) Figure 3. Differential attenuation versus frequency (Z0 DIFF Figure 4. Common mode attenuation versus frequency (Z0 = 100 Ω) COM = 50 Ω) Figure 5. USB3.1 Gen 1 5.0 Gbps eye diagram without ECMF4-20A42N10 (test conditions: type C connector, reference cable and equalizer) DS11458 - Rev 3 Figure 6. USB3.1 Gen 1 5.0 Gbps eye diagram with ECMF4-20A42N10 (test conditions: type C connector, reference cable and equalizer) page 3/14 ECMF4-20A42N10 Characteristics (curves) Figure 7. USB3.1 Gen 2 10.0 Gbps eye diagram without ECMF4-20A42N10 (test conditions: type C connector, reference cable equalizer with ADC = 6 dB and DFE) Figure 8. USB3.1 Gen 1 10.0 Gbps eye diagram with ECMF4-20A42N10 (test conditions: type C connector, reference cable equalizer with ADC = 6 dB and DFE) Figure 9. HDMI1.4 1.485 Gbps eye diagram without ECMF4-20A42N10 Figure 10. HDMI1.4 1.485 Gbps eye diagram with ECMF4-20A42N10 Figure 12. HDMI2.0 5.94 Gbps eye diagram with Figure 11. HDMI2.0 5.94 Gbps eye diagram without ECMF4-20A42N10. (test conditions : worst case cable and ECMF4-20A42N10. (test conditions : worst case cable and equalizer) equalizer) DS11458 - Rev 3 page 4/14 ECMF4-20A42N10 Characteristics (curves) Figure 13. HDMI2.1 12 Gbps eye diagram without ECMF4-20A42N10. (test conditions: worst case cable, equalizer and CTLE) Figure 14. HDMI2.1 12 Gbps eye diagram with ECMF4-20A42N10. (test conditions: worst case cable, equalizer and CTLE) Figure 15. DP HBR2 5.4 Gbps eye diagram without ECMF4-20A42N10. (test conditions : with cable and equalizer) Figure 16. DP HBR2 5.4 Gbps eye diagram with ECMF4-20A42N10. (test conditions : with cable and equalizer) Figure 17. Mipi Gear3 5.83 Gbps eye diagram without ECMF4-20A42N10 Figure 18. Mipi Gear3 5.83 Gbps eye diagram with ECMF4-20A42N10 DS11458 - Rev 3 page 5/14 ECMF4-20A42N10 Characteristics (curves) Figure 19. ESD response to IEC61000-4-2 (+8 kV contact discharge) Figure 20. ESD response to IEC61000-4-2 (-8 kV contact discharge) Figure 21. TLP characteristic IPP(A) 20 18 Positive polarity 16 Negative polarity 14 12 10 8 6 4 2 VCL(V) 0 0 DS11458 - Rev 3 5 10 15 20 25 page 6/14 ECMF4-20A42N10 Package information 2 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 2.1 µQFN10L package information Figure 22. µQFN10L package outline Top view D Idex area E Side view A1 A Bottom view e A3 seating plane b 1 5 10 6 PIN # 1 ID L Table 4. µQFN10L package mechanical data Dimensions Millimeters Ref. Min. Typ. Max. A 0.41 0.45 0.50 A1 0.00 0.02 0.05 A3 0.127 b 0.15 0.20 0.25 D 2.15 2.20 2.25 E 1.30 1.35 1.40 e L DS11458 - Rev 3 0.40 0.40 0.50 0.60 page 7/14 ECMF4-20A42N10 µQFN10L package information Figure 23. Marking layout MF Note: The marking codes can be rotated by 90 ° or 180° to differentiate assembly location. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose. Figure 24. Tape and reel outline Pin 1 located according to EIA-481 P0 Ø D0 E1 F W B0 P1 P2 A0 Ø D1 K0 User direction of unreeling Note: Pocket dimensions are not on scale Pocket shape may vary depending on package Table 5. Tape and reel mechanical data Ref. DS11458 - Rev 3 Dimensions (millimeters) Min. Typ. Max. P1 3.9 4.0 4.1 P0 3.9 4.0 4.1 Ø D0 1.4 1.5 1.6 Ø D1 0.35 0.40 0.45 F 3.45 3.5 3.55 E1 1.65 1.75 1.85 page 8/14 ECMF4-20A42N10 µQFN10L package information Ref. DS11458 - Rev 3 Dimensions (millimeters) Min. Typ. Max. K0 0.6 0.65 0.7 P2 1.95 2 2.05 W 7.9 8 8.1 A0 1.50 1.55 1.60 B0 2.35 2.40 2.45 page 9/14 ECMF4-20A42N10 Recommendation on PCB assembly 3 Recommendation on PCB assembly 3.1 Footprint Figure 25. Footprint in mm 0.200 0.400 0.700 1.750 SMD footprint design is recommended. 3.2 Stencil opening design Recommended design reference: stencil opening thickness: 100 μm Figure 26. Stencil opening recommendations 1.710 0.660 0.190 0.400 DS11458 - Rev 3 page 10/14 ECMF4-20A42N10 Solder paste 3.3 Solder paste 1. 2. 3. 4. 3.4 Placement 1. 2. 3. 4. 5. 6. 3.5 Manual positioning is not recommended. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering Standard tolerance of ±0.05 mm is recommended. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. PCB design preference 1. 2. 3.6 Halide-free flux qualification ROL0 according to ANSI/J-STD-004. “No clean” solder paste is recommended. Offers a high tack force to resist component movement during PCB movement. Solder paste with fine particles: powder particle size is 20-38 μm. To control the solder paste amount, the closed via is recommended instead of open vias. The position of tracks and open vias in the solder area should be well balanced. A symmetrical layout is recommended, to avoid any tilt phenomena caused by asymmetrical solder paste due to solder flow away. Reflow profile Figure 27. ST ECOPACK® recommended soldering reflow profile for PCB mounting 250 240-245 °C Temperature (°C) -2 °C/s 2 - 3 °C/s 60 sec (90 m ax) 200 -3 °C/s 150 -6 ° C/s 100 0.9 °C/s 50 Time (s) 0 Note: DS11458 - Rev 3 30 60 90 120 150 180 210 240 270 300 Minimize air convection currents in the reflow oven to avoid component movement. Maximum soldering profile corresponds to the latest IPC/JEDEC J-STD-020. page 11/14 ECMF4-20A42N10 ECMF4-20A42N10 Ordering information 4 ECMF4-20A42N10 Ordering information Figure 28. Ordering information scheme ECMF 4 - 20 A 42 N10 Function ESD Common Mode Filter Number of lines 4 = 2 lanes Rejection peak 20= 2.0GHz Version Differential bandwidth 42 = 4.2GHz Package N10 = µQFN -10 L Table 6. Ordering information Order code Marking Package Weight Base qty. Delivery mode ECMF4-20A42N10 MF(1) µQFN-10L 3.9 mg 3000 Tape and reel 1. The marking can be rotated by 90° to differentiate assembly location DS11458 - Rev 3 page 12/14 ECMF4-20A42N10 Revision history Table 7. Document revision history DS11458 - Rev 3 Date Revision Changes 16-May-2016 1 Initial release. 12-Apr-2018 2 Updated Section 1.1 Characteristics (curves), Table 4. µQFN10L package mechanical data and Table 6. Ordering information. Added Table 5. Tape and reel mechanical data, Section 3.1 Footprint, Figure 7. USB3.1 Gen 2 10.0 Gbps eye diagram without ECMF4-20A42N10 (test conditions: type C connector, reference cable equalizer with ADC = 6 dB and DFE), Figure 8. USB3.1 Gen 1 10.0 Gbps eye diagram with ECMF4-20A42N10 (test conditions: type C connector, reference cable equalizer with ADC = 6 dB and DFE) and Section 3.2 Stencil opening design. 28-May-2018 3 Updated Section ● Product status / summary. page 13/14 ECMF4-20A42N10 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved DS11458 - Rev 3 page 14/14