EMIF03-SIM01

EMIF03-SIM01 ® 3 LINES EMI FILTER AND ESD PROTECTION IPADTM MAIN PRODUCT APPLICATIONS EMI filtering and ESD protection for : SIM Interface (Subscriber Identify Module) UIM Interface (Universal Identify Module) DESCRIPTION The EMIF03-SIM01 is a highly integrated devices designed to suppress EMI/RFI noise in all systems subjected to electromagnetic interferences. The EMIF03 Flip Chip packaging means the package size is equal to the die size. This filter includes an ESD protection circuitry which prevents the device from destruction when subjected to ESD surges up 15kV. ■ ■ BENEFITS EMI symmetrical (I/O) low-pass-filter High efficiency in EMI filtering Very low PCB space consuming: 1.57mm x 1.57 mm Very thin package: 0.65 mm High efficiency in ESD suppression High reliability offered by monolithic integration High reducing of parasitic elements through integration & wafer level packaging. c u d Flip Chip package PIN CONFIGURATION (Ball side) ■ e t le ■ 3 ■ ■ ■ ■ ) s ( ct ■ o r P ) s t( o s b O - COMPLIES WITH THE FOLLOWING STANDARDS : u d o IEC61000-4-2 15kV (air discharge) 8 kV (contact discharge) MIL STD 883E - Method 3015-6 Class 3 2 1 RST in RST out CLT in Gnd CLT out B Data in VCC Data out C A r P e CONFIGURATION t e l o bs O VCC 100 Ω RST in RST out R1 47 Ω CLK in CLK out R2 100 Ω Data out Data in R3 GND TM : IPAD is a trademark of STMicroelectronics. July 2003 - Ed: 8A 1/6 EMIF03-SIM01 ABSOLUTE RATINGS (limiting values) Symbol Parameter and test conditions Maximum junction temperature Tj Value Unit 125 °C Top Operating temperature range -40 to + 85 °C Tstg Storage temperature range -55 to +150 °C ELECTRICAL CHARACTERISTICS (Tamb = 25 °C) Symbol Parameter IF VBR Breakdown voltage IRM Leakage current @ VRM VRM Stand-off voltage VCL Clamping voltage Rd Dynamic impedance IPP Peak pulse current RI/O Series resistance between Input & Output Cline Input capacitance per line Symbol IR = 1 mA IRM VRM = 3V R1 (s) R2 du Fig. 1: S21 (dB) attenuation measurements. t e l o c u d IPP e t le Min. o s b O - ct R3 o r P e V IRM IR Rd @ 0V VF VCL VBR VRM Test conditions VBR Cline I o r P Typ. ) s t( Max. 6 Unit V 1 µA Ω 1.5 95 100 105 Ω 44.65 47 49.35 Ω 95 100 105 Ω 35 pF Fig. 2: Analog crosstalk measurements. Aplac 7.60 User: STMicroelectronics Feb 22 2001 0.00 dB -5.00 dB s b O -10.00 -15.00 -20.00 -25.00 -30.00 -35.00 -40.00 -45.00 -50.00 100.0k 1.0M 10.0M 100.0M 1.0G f/Hz B3_B1(CLK) 2/6 A3_A2(RST) MHz C3_C1(DAT) EMIF03-SIM01 Fig. 3: Digital crosstalk measurements. Fig. 4: ESD response to IEC61000-4-2 (+15kV air discharge) on one input and on one output. Fig. 5: ESD response to IEC61000-4-2 (-15kV air discharge) on one input and on one output. c u d ) s t( o r P Fig. 6: Line capacitance versus reverse applied voltage. e t le C(pF) o s b O 35 F=1MHz Vosc=30mV Tj=25°C 30 25 ct (s) o r P e du 20 15 VR(V) 10 0 1 2 3 4 5 6 t e l o s b O 3/6 EMIF03-SIM01 Aplac model Rseries Port2 50 Port1 50 MODEL = demif03 DEMIF03 diodes Model - RS = 1.2 - CJO = 17p - M = 0.3333 - VJ = 0.6 - ISR = 100p - BV = 6.8 - IBV = 1m - TT = 100n MODEL = demif03 sub sub Vcc 50p 0.05 MODEL = demif03_Vcc 0.08nH Rseries = 47R (CLK line) = 100R (RST & Data lines) DEMIF03_Vcc diode Model - RS = 1.5 - CJO = 20p - M = 0.3333 - VJ = 0.6 - ISR = 100p - BV = 6.8 - IBV = 1m - TT = 100n sub 0.1 c u d ORDER CODE EMIF yy - xxx zz F x e t le o s b O - EMI Filter Number of lines o r P 1: Pitch = 500µm, Bump = 315µm 2: Leadfree pitch = 500µm Bump = 315µm 3: Leadfree pitch = 400µm Bump = 250µm 4: Pitch = 500µm, Bump = 250µm Flip Chip ) s ( ct x: resistance value (Ohms) z: capacitance value / 10(pF) or Application (3 letters) and Version (2 digits) u d o r P e PACKAGE MECHANICAL DATA (all dimensions in µm) 650µm ± 65 315µm ± 50 1.57mm ± 50µm s b O 500µm ± 50 500µm ± 50 t e l o 1.57mm ± 50µm 4/6 ) s t( EMIF03-SIM01 FOOT PRINT RECOMMENDATIONS Copper pad Diameter : 250µm recommended , 300µm max Solder stencil opening : 330µm Solder mask opening recommendation : 340µm min for 315µm copper pad diameter MARKING 365 c u d 240 365 Dot, ST logo xxx = marking yww = datecode (y = year ww = week) 220 o s b O - All dimensions in µm ) s ( ct o r P 40 e t le x x x y ww ) s t( u d o r P e t e l o s b O 5/6 EMIF03-SIM01 PACKING Dot identifying Pin A1 location 3.5 +/- 0.1 4 +/- 0.1 User direction of unreeling All dimensions in mm e t le ) s ( ct PACKING EMIF03-SIM01 Marking u d o r P e FCT ST xxx yww ST xxx yww ST xxx yww 8 +/- 0.3 0.73 +/- 0.05 Ordering code 1.75 +/- 0.1 Ø 1.5 +/- 0.1 4 +/- 0.1 c u d ) s t( o r P o s b O - Package Weight Base qty Delivery mode Flip Chip 3.3 mg 5000 Tape & reel 7” Note: More packing information are available in the application note AN1235: “Flip-Chip: Package description and recommendations for use” t e l o s b O Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics © 2003 STMicroelectronics - Printed in Italy - All rights reserved. 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