EMIF03-SIM06F3
3-line IPAD™, EMI filter including ESD protection
Datasheet production data
Description
The EMIF03-SIM06F3 chip is a highly integrated
audio filter device designed to suppress EMI/RFI
noise in all systems subjected to electromagnetic
interface.
The filter included ESD protection circuitry, which
prevents damage to the protected device when
subjected to ESD surges up to 15 kV.
Flip-chip package
(11 bumps)
Figure 1. Pin configuration (bump side)
1
2
3
Features
A
EMI symmetrical (I/O) low-pass filter
High efficiency in ESD protection
Lead-free package
B
Very thin package
High reliability offered by monolithic integration
C
High reduction of parasitic elements through
integration and wafer level packaging
D
Complies with the following standards:
IEC 61000-4-2 level 4
– ± 15 kV (air discharge)
– ± 8 kV (contact discharge)
Figure 2. Functional schematic
IEC 61000-4-2 level 1
– ± 2 kV (air discharge)
– ± 2 kV (contact discharge)
B1
47 W
C1
R2
100 W
A3
B3
C3
R3
A2
GND
Mobile phones and communication systems
This is information on a product in full production.
D3
R1
Where EMI filtering in ESD sensitive equipment is
required:
December 2013
D2
R4
100 W
A1
Application
Computers, printers and MCU boards
D1
10000 W
C2
GND
A2 and C2 bumps must be conneced together on the PCB
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Characteristics
1
EMIF03-SIM06F3
Characteristics
Table 1. Absolute maximum ratings (Tamb = 25 °C)
Symbol
Parameter
Value
Internal pins (A1, B1, C1):
ESD discharge IEC 61000-4-2(1), level 1
Air discharge
Contact discharge
External pins (A3, B3, C3, D1, D2, D3):
ESD discharge IEC 61000-4-2(1), level 4
Air discharge
Contact discharge
VPP
Unit
2
2
kV
20
20
Top
Operating temperature range
- 40 to + 85
Tstg
Storage temperature range
- 55 to 150
1. Measurements done on IEC 61000-4-2 test bench. For further details see Application note
AN3353, “IEC 61000-4-2 standard testing”.
Figure 3. Electrical characteristics (definitions)
Symbol
VBR =
I RM =
V RM =
V CL =
I PP
=
Cline =
RI/O =
P arameter
Breakdown voltage
Leakage current @ VRM
Stand-off voltage
Clamping voltage
Peak pulse current
Line capacitance
Series resistance between
input and ouptput
VCL
PP
Table 2. Electrical characteristics (Tamb = 25 °C)
Symbol
IRM
VRM = 3 V
VBR
IR = 1 mA
Min.
Typ.
Max.
Unit
50
nA
6
V
R1, R3
Tolerance ±20%
100
R2
Tolerance ±20%
47
R4
Tolerance ±20%
10
Cline
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Test conditions
Vline = 0 V, Vosc = 30 mV, F = 10 MHz
(measured under zero light conditions)
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10
k
12
pF
EMIF03-SIM06F3
Characteristics
Figure 4. Attenuation versus frequency
S21(dB)
0
Figure 5. Analog crosstalk versus frequency
XTalk (dB)
0
-5
-10
-10
-20
-15
-30
-20
-40
-25
-50
-30
-60
-35
F(Hz)
F(Hz)
-70
-40
1M
3M
Data
Rst
10M
30M
100M
300M
1G
3G
1M
3M
Figure 6. ESD response to IEC 61000-4-2
(+8 kV contact discharge)
10.0 V / Div
10M
30M
100M
Data-D1
Data-Rst
Rst-D3
Clk
300M
1G
3G
Data-Clk
Rst-D2
Figure 7. ESD response to IEC 61000-4-2
(-8 kV contact discharge)
20.0 V / Div
1 VCL: Peak clamping voltage
2 VCL :clamping voltage @ 30 ns
3 VCL :clamping voltage @ 60 ns
4 VCL :clamping voltage @ 100 ns
1 -21.1 V
4 -6.8 V
1 VCL: Peak clamping voltage
2 VCL :clamping voltage @ 30 ns
3 VCL :clamping voltage @ 60 ns
4 VCL :clamping voltage @ 100 ns
1 22.6 V
2 14.0 V
3 -9.9 V
2 -10.5 V
3 11.1 V
4 6.8 V
20 ns / Div
20 ns / Div
Figure 8. Line capacitance versus applied voltage
C(pF)
16
14
12
10
8
6
4
2
bias (V)
0
0
2
4
D2 GND
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Package information
2
EMIF03-SIM06F3
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 9. Flip-Chip package dimensions
Æ 255 ± 40 µm
500 µm ± 50
400 ± 30 µm
1140 ± 30 µm
170 µm
170 µm
400 ± 30 µm
1540 ± 30 µm
Figure 10. Footprint recommendations
Copper pad Diameter:
220 µm recommended
260 µm maximum
Solder mask opening:
300 µm minimum
Solder stencil opening:
220 µm recommended
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Figure 11. Marking
Dot, ST logo
ECOPACK® grade
xx = marking
z = manufacturing location
yww = datecode
(y = year
ww = week)
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x x z
y ww
EMIF03-SIM06F3
Package information
Figure 12. Tape and reel specification
Dot identifying Pin A1 location
Ø 1.50
2.0
4.0
8.0
3.5
1.65
1.75
0.20
1.28
0.59
All dimensions are typical values in mm
Note:
4.0
User direction of unreeling
More information is available in the application notes:
AN2348, “IPAD™ 400 µm Flip Chip: package description and recommendations for use”
AN1751, “EMI filters: recommendations and measurements”
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Ordering information
3
EMIF03-SIM06F3
Ordering information
Figure 13. Ordering information scheme
EMIF
03
-
SIM 06
F3
EMI filter
Number of lines
Information
3 letters = application
2 digits = version
Package
F = Flip chip
x = 3: Lead-free pitch = 400 µm, bump = 255 µm
Table 3.Ordering information
4
Order code
Marking
Package
Weight
Base qty
Delivery mode
EMIF03-SIM06F3
KP
Flip Chip
2.3 mg
5000
Tape and reel (7”)
Revision history
Table 4.Document revision history
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Date
Revision
19-Dec-2013
1
Changes
Initial release
DocID024459 Rev 1
EMIF03-SIM06F3
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