EMIF06-HSD03F3
EMI filter with integrated ESD protection for micro-SD Card™
Datasheet production data
Features
Very low line capacitance to compensate long
PCB tracks (2.5 pF typ.)
High efficiency in ESD suppression up to 18 kV
(IEC 61000-4-2)
Very low PCB space consumption:
– 1.1 x 2.4 mm
Ultralow leakage current: 20 nA max.
Very thin package: 0.605 mm
Flip-Chip package
(17 bumps)
Smart pinout for easier PCB layout
Figure 1. Pin configuration (bump side)
High reduction of parasitic elements through
integration and wafer level packaging
Lead-free package
2
,
Complies with the following standards:
– IEC 61000-4-2 level 4:±15 kV (air
discharge), ±8 kV (contact discharge)
9FF
2
,
*1'
,
2
Application
*1'
,
2
SD3.0, UHS-1 SDR104 (208 MHz)
2
Description
2
The EMIF06-HSD03F3 chip is a highly integrated
device designed to suppress EMI/RFI noise for
interface line filtering.
*1'
,
'(7
,
Figure 2. Functional schematic
L = 1 nH R = 1 Ω
Ox
Ix
CLINE = 2.5 pF
DET
October 2016
This is information on a product in full production.
The EMIF06-HSD03F3 Flip-Chip packaging
means the package size is equal to the die size.
That’s why EMIF06-HSD03F3 is a very small
device. Additionally, this filter includes ESD
protection circuitry, which prevents damage to the
protected device when subjected to ESD surges
up 18 kV.
VCC
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www.st.com
10
Application diagram
1
EMIF06-HSD03F3
Application diagram
Figure 3. Schema
Vcc
Top layer
Second layer
DAT2
DAT3
CMD
VCC
CLK
GND
DAT0
DAT1
O1
I1
Vcc
O2
I2
GND
I3
O3
GND
CPU
O4
I4
GND
µSD card
contacts face down
I5
O5
DET
I6
O6
µSD card
contacts spring
DET
Maximum distance = 50 mm
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EMIF06-HSD03F3
2
Characteristics
Characteristics
Table 1. Absolute maximum ratings (Tamb = 25 °C)
Symbol
VPP
Tj
Parameter
Value
ESD discharge IEC 61000-4-2, level 4 for Ix pins:
Air discharge
Contact discharge
ESD discharge IEC 61000-4-2, level 1 for Ox pins:
Air discharge
Contact discharge
Unit
18
18
kV
10
10
Maximum junction temperature
125
°C
TOP
Operating temperature range
- 30 to + 85
°C
Tstg
Storage temperature range
- 55 to +150
°C
Figure 4. Electrical characteristics (definitions)
I
IF
Symbol
VBR =
IRM =
VRM =
VCL =
IPP =
Rd =
Cline =
RI/O =
Parameter
Breakdown voltage
Leakage current at VRM
Stand-off voltage
Clamping voltage
Peak pulse current
VF
VCL VBR
VRM
IRM
V
Dynamic resistance
Line capacitance
Series resistance between
input and ouptput
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Slope: 1/Rd
IPP
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Characteristics
EMIF06-HSD03F3
Table 2. Electrical characteristics (Tamb = 25 °C)
Symbol
Test conditions
VBR
Data lines, IR = 1 mA
IRM
VRM = 3 V per line
Min.
5
Vline = 0 V, Vosc = 30 mV, F = 1 MHz
2.5
L
Rd
Max.
Unit
9
V
20
nA
Ω
1
RI/O
Cline
Typ.
3
1
Dynamics resistance, tP = 100 ns
IO-GND (positive polarity)
650
GND-IO (negative polarity)
320
pF
nH
mΩ
VCC
VBR
IR = 1 mA
IRM
VRM = 3 V
Cline
Vline = 0 V, Vosc = 30 mV, F = 1 MHz
5
9
V
20
nA
40
pF
DET
VBR
IR = 1 mA
IRM
VRM = 3 V
Cline
Vline = 0 V, Vosc = 30 mV, F = 1 MHz
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5
40
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9
V
20
nA
pF
EMIF06-HSD03F3
Characteristics
Figure 5. Attenuation versus frequency
IX, OX
0.00
- 1.00
- 2.00
- 3.00
- 4.00
- 5.00
- 6.00
- 7.00
- 8.00
- 9.00
-10.00
Figure 6. Attenuation versus frequency
VCC, DET
S21(dB)
S21(dB)
0.00
-7.50
-15.00
-22.50
F(Hz)
100.0 k
1.0 M
I6
I3
10.0 M 100.0 M
1.0 G
F(Hz)
-30.00
100.0k
I4
I5
I2
I1
Figure 7. ESD response to IEC 61000-4-2
(+8 kV contact discharge)
1.0M
10.0M
VCC
100.0M
1.0G
DET
Figure 8. ESD response to IEC 61000-4-2
(-8 kV contact discharge)
10.0 V / Div
20.0 V / Div
1 109.6 V
1 VCL: Peak clamping voltage
2 VCL :clamping voltage @ 30 ns
3 VCL :clamping voltage @ 60 ns
4 VCL :clamping voltage @ 100 ns
2 19.2 V
3 13.9 V
3 -4.1 V
4 -2.4 V
1 VCL: Peak clamping voltage
2 VCL :clamping voltage @ 30 ns
3 VCL :clamping voltage @ 60 ns
4 VCL :clamping voltage @ 100 ns
4 6.6 V
1 -61.1 V
20 ns / Div
Figure 9. Digital crosstalk I1-O2
20 ns / Div
Figure 10. Analog crosstalk versus frequency
1.0 V / Div
P4: pkpk(C2)
1.28 ns
P1: top(C1)
3.01 ns
P2:rise(C1)
1.99 ns
2 -5.1 V
P3: fall(C1)
1.93 ns
10 ns / Div
0.00
-10.00
-20.00
-30.00
-40.00
-50.00
-60.00
-70.00
-80.00
-90.00
-100.00
-110.00
XTalk(dB)
F(Hz)
100.0 k
I1-O2
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1.0 M
10.0 M
I2-O3
100.0 M
1.0 G
VCC- Clk
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Characteristics
EMIF06-HSD03F3
Figure 11. TLP measurement
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
0
IPP(A)
Positive polarity
Negative polarity
Poly. (Positive polarity)
Poly. (Negative polarity)
0
5
10
15
20
y = 0.0961x 2 + 2.1437x - 4.7641
R2 = 0.9935
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tP=100ns
TJ initial=25°C
V CL (V)
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25
30
35
y = -0.0078x 2 + 2.1203x - 13.887
R2 = 0.9956
40
EMIF06-HSD03F3
3
Package information
Package information
Epoxy meets UL94, V0
Lead-free package
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
3.1
Flip-Chip package information
Figure 12. Flip-Chip package dimensions
605 ± 60 µm
1.10 mm ± 40 µm
400 ± 40 µm
2.40 mm ± 40 µm
0
40
±
40
µm
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Package information
EMIF06-HSD03F3
Figure 13. Footprint recommendations
Figure 14. Marking
Dot, ST logo
Copper pad Diameter:
220 µm recommended
260 µm maximum
ECOPACK® grade
xx = marking
z = manufacturing location
yww = datecode
(y = year
ww = week)
Solder mask opening:
300 µm minimum
Solder stencil opening:
220 µm recommended
x x z
y ww
'RWLGHQWLI\LQJ3LQ 2ORFDWLRQ
Figure 15. Tape and reel specification
67
67
67
[[]
\ZZ
[[]
\ZZ
[[]
\ZZ
Note:
More information is available in the application notes:
AN2348, “IPAD™ 400 µm Flip Chip: package description and recommendations for use”
AN1751, “EMI filters: recommendations and measurements”
AN4541: “EMI Filters for SD3.0 card: High speed SD card protection and filtering devices”
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EMIF06-HSD03F3
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Ordering information
Ordering information
Figure 16. Ordering information scheme
EMIF
06
-
HSD 03
F3
EMI Filter
Number of lines
Application
HSD = High speed SD card
Version
Version = 3
Package
F = Flip Chip
x = 3: Lead-free, pitch = 400 µm, bump = 255 µm
Table 3. Ordering information
5
Order code
Marking
Package
Weight
Base qty
Delivery mode
EMIF06-HSD03F3
KK
Flip Chip
3.4 mg
5000
Tape and reel (7”)
Revision history
Table 4. Document revision history
Date
Revision
19-Nov-2013
1
Initial release
09-Jan-2014
2
Corrected typographical error.
06-Jan-2015
3
Added mention for new AN4541.
06-Oct-2016
Changes
Updated Figure 1.
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EMIF06-HSD03F3
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2016 STMicroelectronics – All rights reserved
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