ESDA17P100-1U2M

ESDA17P100-1U2M Datasheet High power transient voltage suppressor Features • • • • • • µQFN package Low clamping voltage Peak pulse power: 4800 W (8/20 µs) Stand-off voltage 15 V Unidirectional diode Low leakage current: 0.2 µA at 25 °C Complies with IEC 61000-4-2 level 4 – ±30 kV (air discharge) – ±30 kV (contact discharge) Applications Top view 6 5 Bottom view 1 2 3 4 Pin 1 Pin #1 ID TAB 6 1 2 3 4 TAB Pins 5, 6 and TAB 5 Pin Name Description 1 VBUS VBUS pin 2, 3, 4 NC Non connected pin 5, 6 GND Ground pin TAB GND Ground pin Where transient overvoltage protection in ESD sensitive equipment is required, such as: • Smartphones, mobile phones, tablets, portable multimedia • USB VBUS protection • • Power supply protection Battery protection Description The ESDA17P100-1U2M is a unidirectional single line TVS diode designed to protect the power line against EOS and ESD transients. The device is ideal for applications where high power TVS and board space saving is required. Product status link ESDA17P100-1U2M DS11998 - Rev 2 - February 2023 For further information contact your local STMicroelectronics sales office. www.st.com ESDA17P100-1U2M ESDA17P100-1U2M_Characteristics 1 ESDA17P100-1U2M_Characteristics Table 1. Absolute maximum ratings (Tamb = 25 °C) Symbol Parameter Value Unit Contact discharge >30 kV Air discharge >30 IEC 61000-4-2: VPP Peak pulse voltage PPP Peak pulse power 8/20μs 4800 W IPP Peak pulse current 8/20μs 160 A Tstg Storage junction temperature range -55 to + 150 °C Top Operating junction temperature range -55 to + 150 °C Figure 1. Electrical characteristics (definitions) I IF Symbol VBR VCL IRM VRM IPP = = = = = Parameter Breakdown voltage at IR Clamping voltage Leakage current at VRM Stand-off voltage Peak pulse current at VCL Rd = Dynamic resistance VCL VBR VF VRM V IRM IR Slope = 1/Rd IPP Table 2. Electrical characteristics (Tamb = 25 °C) Symbol VBR Test condition Min. Typ. Max. Unit IR = 1 mA 15.7 16.5 17.7 V 15 V VRM IRM VRM = 12 V 100 nA IRM VRM = 15 V 200 nA Rd 8/20 µs VCL IPP = 100 A, 8/20 µs 24 26 V VCL IPP = 160 A, 8/20 µs 28 30 V CBUS DS11998 - Rev 2 VBUS = 0 V, f = 1 MHz, VOSC = 30 mV 0.07 1200 Ω pF page 2/11 ESDA17P100-1U2M Characteristics (curves) 1.1 Characteristics (curves) Figure 3. Peak pulse power versus exponential pulse duration (Tj = 25 °C, typical value) Figure 2. Peak power dissipation versus initial temperature (typical value) PPP(W) P PP(W) 9000 8/20 µs typical value 8000 10000 Tj initial = 25 °C typical value 7000 6000 1000 5000 4000 100 3000 2000 1000 Tj (°C) 0 20 40 60 80 tp(µs) 10 10 100 120 140 Figure 4. Peak pulse current versus clamping voltage (max. value) 1000 Figure 5. Leakage current versus junction temperature (typical value) IPP(A) Ir (nA) 8/20 µs Tj initial = 25 °C 100 100 160 300 VR = 12 V and 15 V Reverse typical value 250 VR = 15 V 200 10 150 VR = 12 V 100 1 50 VCL (V) 0.1 16 18 20 22 24 26 28 30 0 0 20 40 60 80 100 120 140 160 Tj (°C) Figure 6. ESD response to IEC 61000-4-2 (+8kV contact discharge) Figure 7. ESD response to IEC 61000-4-2 (-8kV contact discharge) 5 V/div 5 V/div 1 V PP : ESD peak voltage 2 V CL : Clamping voltage @ 30 ns 3 V CL : Clamping voltage @ 60 ns 4 V CL : Clamping voltage @ 100 ns 25.4 V 1 7.7 V 2 8V 3 6.9 V -1.2 V 2 4 -1.6 V 3 -997 V 4 -23.5 V 1 1 V PP : ESD peak voltage 2 V CL : Clamping voltage @ 30 ns 3 V CL : Clamping voltage @ 60 ns 4 V CL : Clamping voltage @ 100 ns 20 ns/div DS11998 - Rev 2 20 ns/div page 3/11 ESDA17P100-1U2M Package information 2 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 2.1 µQFN package information Figure 8. µQFN package outline E D Side view b K E2 e3 e1 A1 A A3 Top view L D2 e2 Bottom view DS11998 - Rev 2 page 4/11 ESDA17P100-1U2M µQFN package information Table 3. µQFN package mechanical data Dimensions Millimeters Ref. Inches Min. Typ. Max. Min. Typ. Max. A 0.51 0.55 0.60 0.0201 0.0217 0.0236 A1 0.00 0.02 0.05 0.0000 0.0008 0.0020 A3 0.15 b 0.15 0.20 0.25 0.0059 0.0079 0.0098 D 1.70 1.80 1.90 0.0669 0.0709 0.0748 E 1.90 2.0 2.10 0.0748 0.0787 0.0827 e1 0.4 0.0157 e2 0.80 0.0315 D2 0.30 0.45 0.55 0.0118 0.0177 0.0217 E2 0.69 0.84 0.94 0.0272 0.0331 0.0370 e3 0.95 k L N 0.0374 0.28 0.20 0.0110 0.30 0.40 0.0079 0.0118 0.0157 6.00 Figure 9. µQFN footprint 0.20 0.40 0.50 0.28 0.45 0.84 0.95 0.80 DS11998 - Rev 2 page 5/11 ESDA17P100-1U2M µQFN package information Figure 11. Package orientation in reel Figure 10. Marking layout Figure 12. Tape outline Table 4. Tape and reel mechanical data Dimensions Millimeters Ref. DS11998 - Rev 2 Min. Typ. Max. A0 1.95 2.00 2.05 B0 2.25 2.30 2.35 D0 1.40 1.50 1.60 F 3.45 3.50 3.55 K0 0.70 0.75 0.80 P0 3.90 4.00 4.10 P1 3.90 4.00 4.10 P2 1.95 2.00 2.05 W 7.90 8.00 8.30 page 6/11 ESDA17P100-1U2M Recommendation on PCB assembly 3 Recommendation on PCB assembly 3.1 Stencil opening design 1. 2. General recommendation on stencil opening design a. Stencil opening dimensions: L (Length), W (Width), T (Thickness). General design rule a. Stencil thickness (T) = 75 ~ 125 μm b. Aspect ratio = c. 3. W ≥ 1.5 T Aspect area = (1) L  ×  W ≥ 0.66 2T L  + W (2) Reference design a. Stencil opening thickness: 100 μm b. Stencil opening for leads: Opening to footprint ratio is 90%. Figure 13. Stencil opening dimensions L T W Figure 14. Recommended stencil window position 0.19 0.40 0.47 0.42 0.32 0.59 0.95 0.80 3.2 Solder paste 1. 2. 3. 4. DS11998 - Rev 2 Use halide-free flux, qualification ROL0 according to ANSI/J-STD-004. “No clean” solder paste is recommended. Offers a high tack force to resist component movement during PCB movement. Solder paste with fine particles: powder particle size is 20-45 μm. page 7/11 ESDA17P100-1U2M Placement 3.3 Placement 1. 2. 3. 4. 5. 6. 3.4 PCB design preference 1. 2. 3.5 Manual positioning is not recommended. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering Standard tolerance of ±0.05 mm is recommended. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick, and place and reflow soldering by using optimized tools. To control the solder paste amount, the closed via is recommended instead of open vias. The position of tracks and open vias in the solder area should be well balanced. A symmetrical layout is recommended, to avoid any tilt phenomena caused by asymmetrical solder paste due to solder flow away. Reflow profile Figure 15. ST ECOPACK® recommended soldering reflow profile for PCB mounting 250 240-245 °C Temperature (°C) -2 °C/s 2 - 3 °C/s 60 sec (90 max) 200 -3 °C/s 150 -6 °C/s 100 0.9 °C/s 50 Time (s) 0 Note: DS11998 - Rev 2 30 60 90 120 150 180 210 240 270 300 Minimize air convection currents in the reflow oven to avoid component movement. page 8/11 ESDA17P100-1U2M ESDA17P100-1U2M_Ordering information 4 ESDA17P100-1U2M_Ordering information Figure 16. Ordering information scheme ESDA 17 P100 - 1U2 M ESD Array Breakdown voltage 17 = 17 V typ. IPP 8/20 µs P100 = 100 A Direction 1U2 = 1 unidirectional line Package M = QFN Table 5. Ordering information Order code Marking(1) Package Weight Base qty. Delivery mode ESDA17P100-1U2M D µQFN 6 mg 5000 Tape and reel 1. The marking can be rotated by multiples of 90° to differentiate assembly location DS11998 - Rev 2 page 9/11 ESDA17P100-1U2M Revision history Table 6. Document revision history DS11998 - Rev 2 Date Revision Changes 14-Mar-2017 1 Initial release. 07-Feb-2023 2 Updated package view, Figure 8 and Table 3. page 10/11 ESDA17P100-1U2M IMPORTANT NOTICE – READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. 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