ESDA8P80-1U1M

ESDA8P80-1U1M High power transient voltage suppressor Datasheet - production data Description The ESDA8P80-1U1M is a unidirectional single line TVS diode designed to protect the power line against EOS and ESD transients. Q 3L The device is ideal for applications where high power TVS and board space saving are required. Q 3L Figure 1. Pin configuration 3LQ 3LQ SDFNDJH Features  Low clamping voltage  Typical peak pulse power: – 1100 W (8/20µs)  Stand-off voltage 6.3 V  Unidirectional diode  Low leakage current: – 0.2 µA at 25 °C Applications Where transient overvoltage protection in ESD sensitive equipment is required, such as:  Portable multimedia, tablets, mobile phone, smart phone  USB VBUS protection  Power supply protection  Battery protection March 2016 This is information on a product in full production. DocID028762 Rev 1 1/10 www.st.com Characteristics 1 ESDA8P80-1U1M Characteristics Table 1. Absolute maximum ratings (Tamb = 25 °C) Symbol Parameter Value Unit VPP Peak pulse voltage: IEC 61000-4-2 contact discharge IEC 61000-4-2 air discharge > 30 > 30 kV PPP Peak pulse power (8/20 µs) 1100 W IPP Peak pulse current (8/20 µs) 80 A Tstg Storage temperature range -55 to +150 °C Top Operating junction temperature range -55 to +150 °C Figure 2. Electrical characteristics (definitions) , ,) 9) 9&/ 9 %5 950 9 , 50 ,5 6ORSH  5 G , 33 Table 2. Electrical characteristics (values, Tamb = 25 °C) Symbol 2/10 Test conditions Min. Typ. 6.9 7.3 Max. Unit VBR IR = 1 mA IRM VRM = 5.5 V 200 nA IRM VRM = 6.3 V 1 µA VCL IPP = 60 A 8/20 µs 10.8 12 V VCL IPP = 80 A 8/20 µs 11.8 13.2 V Rd 8/20 µs 0.06 Ω VF IF = 10 mA 0.75 V DocID028762 Rev 1 V ESDA8P80-1U1M Characteristics Figure 3. Peak pulse power dissipation versus Figure 4. Peak pulse power versus exponential initial junction temperature (typical values) pulse duration (maximum values) 333: 333:  —V PD[LPXPYDOXH  7MLQLWLDO ƒ& 7\SLFDOYDOXHV         7Mƒ&        Figure 5. Peak pulse current versus clamping voltage (maximum values)  ,33$  WS—V    Figure 6. Leakage current versus junction temperature (typical values) ,U Q$  ,U I7MDW9UP 9   —V PD[LPXPYDOXH          9FO 9         Figure 7. ESD response to IEC 61000-4-2 (-8 kV contact discharge) 9GLY 7 ƒ& M       Figure 8. ESD response to IEC 61000-4-2 (+8 kV contact discharge) 9GLY 9 33 (6'SHDNYROWDJH  9 &/&ODPSLQJYROWDJH#QV  9 &/&ODPSLQJYROWDJH#QV  9 &/&ODPSLQJYROWDJH#QV  9 P9 9  P9      9 P9   9    9  9  9 33 (6'SHDNYROWDJH  9 &/&ODPSLQJYROWDJH#QV  9 &/&ODPSLQJYROWDJH#QV  9 &/&ODPSLQJYROWDJH#QV  QVGLY DocID028762 Rev 1 QVGLY 3/10 10 Package information 2 ESDA8P80-1U1M Package information  Epoxy meets UL94, V0  Dot indicates pin 1 In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK® packages, depending on their level of environmental compliance. ECOPACK® specifications, grade definitions and product status are available at: www.st.com. ECOPACK® is an ST trademark. 2.1 QFN 1610 package information Figure 9. QFN 1610 package outline ( ' $ 7RSYLHZ $ 6LGH YLHZ E H / %RWWRP YLHZ Table 3. Package mechanical data Dimensions Ref. Millimeters Min. Typ. Max. Min. Typ. Max. A 0.51 0.55 0.60 0.02001 0.0217 0.0236 A1 0.00 0.02 0.05 0.0000 0.0008 0.0020 b 0.75 0.80 0.85 0.0295 0.0315 0.0335 D 1.50 1.60 1.70 0.0591 0.0630 0.0669 E 0.90 1.00 1.10 0.0354 0.0394 0.0433 0.40 0.0118 0.0138 e L 4/10 Inches 1.05 0.30 0.35 0.0413 DocID028762 Rev 1 0.0157 ESDA8P80-1U1M Package information Figure 10. Footprint, dimensions in mm PP PP PP PP PP PP PP Figure 11. Alternative footprint, dimensions in mm PP PP PP Figure 12. Marking - 3LQ Product marking may be rotated by multiples of 90° for assembly plant differentiation. In no case should this product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for this purpose. Figure 13. Tape and reel specifications “ ‘ “ “ %DULQGLFDWHV3LQ “ “ - - - - - - - “ “ “ “ Note: 3LQ “ $OOGLPHQVLRQVDUHW\SLFDOYDOXHVLQPP 8VHUGLUHFWLRQRIXQUHHOLQJ DocID028762 Rev 1 5/10 10 Recommendation on PCB assembly ESDA8P80-1U1M 3 Recommendation on PCB assembly 3.1 Stencil opening design 1. General recommendation on stencil opening design a) Stencil opening dimensions: L (Length), W (Width), T (Thickness). Figure 14. Stencil opening dimensions / 7 b) : General design rule Stencil thickness (T) = 75 ~ 125 µm W Aspect Ratio = -----  1.5 T LW Aspect Area = ----------------------------  0.66 2T  L + W  Reference design a) Stencil opening thickness: 100 µm b) Stencil opening for leads: Opening to footprint ratio is 90%. Figure 15. Recommended stencil window position PP PP PP PP PP PP PP PP Figure 16. Alternative stencil window position 6/10 )RRWSULQW DocID028762 Rev 1 PP PP PP 6WHQFLOZLQGRZ PP PP 6WHQFLOZLQGRZ )RRWSULQW PP 2. ESDA8P80-1U1M 3.2 3.3 3.4 Recommendation on PCB assembly Solder paste 1. Use halide-free flux, qualification ROL0 according to ANSI/J-STD-004. 2. “No clean” solder paste recommended. 3. Offers a high tack force to resist component displacement during PCB movement. 4. Use solder paste with fine particles: powder particle size 20-45 µm. Placement 1. Manual positioning is not recommended. 2. It is recommended to use the lead recognition capabilities of the placement system, not the outline centering. 3. Standard tolerance of ± 0.05 mm is recommended. 4. 3.5 N placement force is recommended. Too much placement force can lead to squeezed out solder paste and cause solder joints to short. Too low placement force can lead to insufficient contact between package and solder paste that could cause open solder joints or badly centered packages. 5. To improve the package placement accuracy, a bottom side optical control should be performed with a high resolution tool. 6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder paste printing, pick and place and reflow soldering by using optimized tools. PCB design preference 1. To control the solder paste amount, the closed via is recommended instead of open vias. 2. The position of tracks and open vias in the solder area should be well balanced. A symmetrical layout is recommended, to avoid any tilt phenomena caused by asymmetrical solder paste due to solder flow away. DocID028762 Rev 1 7/10 10 Recommendation on PCB assembly 3.5 ESDA8P80-1U1M Reflow profile Figure 17. ST ECOPACK® recommended soldering reflow profile for PCB mounting  ƒ& 7HPSHUDWXUHƒ&  ƒ&V ƒ&V  VHF  PD[   ƒ&V   ƒ&V  ƒ&V  7LPHV  Note: 8/10           Minimize air convection currents in the reflow oven to avoid component movement. DocID028762 Rev 1 ESDA8P80-1U1M 4 Ordering information Ordering information Figure 18. Ordering information scheme (6'$ 380 (6' $UUD\ %UHDNGRZQYROWDJH  9W\S ,33—V 3 $ 'LUHFWLRQ 8 8QLGLUHFWLRQDO 3DFNDJH 0 4)1 Table 4. Ordering information Order code Marking Weight Base qty. Delivery mode ESDA8P80-1U1M J(1) 2.4 mg 8000 Tape and reel 1. The marking can be rotated by multiples of 90° to differentiate assembly location 5 Revision history Table 5. Document revision history Date Revision 02-Mar-2016 1 Changes Initial release. DocID028762 Rev 1 9/10 10 ESDA8P80-1U1M IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2016 STMicroelectronics – All rights reserved 10/10 DocID028762 Rev 1