ESDZV5-1BF4
Datasheet
Ultra low clamping single line bidirectional ESD protection
Features
•
•
•
•
•
•
0201 package
Figure 1. Functional diagram
Ultra low clamping voltage: 7 V (IEC 61000-4-2 contact discharge 8 kV at 30 ns /
16 A TLP)
Bidirectional device
Low leakage current
0201 package
ECOPACK2 compliant component
Exceeds the followig standard:
–
IEC 61000-4-2 level 4 = ±30 kV (air discharge) and ±18 kV (contact
discharge)
Application
Where transient over voltage protection in ESD sensitive equipment is required, such
as:
•
Smartphones, mobile phones and accessories
•
Tablets and notebooks
•
Portable multimedia devices and accessories
•
Wearable, home automation, healthcare
•
Highly integrated systems
Description
The ESDZV5-1BF4 is a bidirectional single line TVS diode designed to protect the
data line or other I/O ports against ESD transients.
The device is ideal for applications where both reduced line capacitance and board
space saving are required.
Product status
ESDZV5-1BF4
DS11928 - Rev 3 - January 2022
For further information contact your local STMicroelectronics sales office.
www.st.com
ESDZV5-1BF4
Characteristics
1
Characteristics
Table 1. Absolute ratings (Tamb = 25 °C)
Symbol
Parameter
Value
Contact discharge
18
Air discharge
30
Unit
VPP
Peak pulse voltage
PPP
Peak pulse power dissipation (8/20 μs)
70
W
IPP
Peak pulse current (8/20 μs)
7
A
Tj
Operating junction temperature range
-55 to +150
°C
Storage temperature range
-65 to +150
°C
260
°C
Tstg
TL
Maximum lead temperature for soldering during 10 s
kV
Figure 2. Electrical characteristics (definitions)
I
Symbol
VTrig
VCL
IRM
VRM
IPP
=
=
=
=
=
Parameter
Trigger voltage
Clamping voltage
Leakage current @ V RM
Stand-off voltage
Peak pulse current
RD
VH
=
=
Dynamic resistance
Holding voltage
CLINE
=
Input capacitance per line
RD
VRM
VCL VTrig VH
V
IRM
IPP
Table 2. Electrical characteristics (Tamb = 25 °C)
Symbol
VTrig
Test condition
Higher voltage than VTrig guarantees the protection turn-on
VH
Lower voltage than VH guarantees the protection turn-off
IRM
VRM = 5.5 V(1)
VCL
8 kV contact discharge after 30 ns, IEC 61000-4-2
VCL
8/20 µs waveform, IPP = 7 A
CLINE
RD
F = 1 MHz, VLINE = 0 V, VOSC = 30 mV
Pulse duration 100 ns
Min.
Typ.
5.8
4
Max.
Unit
10
V
100
nA
4.6
7
6
0.18
V
10
V
7.5
pF
Ω
1. Application note: when used to protect a line connected to a DC source, the DC voltage must be lower than the minimum VH
to enable the diode to return to its non-conducting state after the transient.
DS11928 - Rev 3
page 2/10
ESDZV5-1BF4
Characteristics (curves)
1.1
Characteristics (curves)
Figure 3. Leakage current versus junction temperature
(typical values)
Figure 4. Junction capacitance versus reverse voltage
applied (typical values)
C (pF )
7
Ir(nA)
120
6
100
5
80
4
60
3
40
2
20
1
0
25
50
75
100
125
150
0
Tj(°C)
0
Figure 5. ESD response to IEC 61000-4-2 (+8 kV contact
discharge)
5 V/div
1
2
3
Vbias(V)
4
5
6
Figure 6. ESD response to IEC 61000-4-2 (-8 kV contact
discharge)
5 V/div
1
2
3
4
22 V
1
Peak clamping voltage
Clamping voltage at 30 ns
Clamping voltage at 60 ns
Clamping voltage at 100 ns
4
3
2
7V
6V
2
-7 V
-6 V
5V
3
-5 V
4
1
2
3
4
1
-22 V
Peak clamping voltage
Clamping voltage at 30 ns
Clamping voltage at 60 ns
Clamping voltage at 100 ns
20 ns/div
20 ns/div
Figure 7. TLP characteristic
18
Figure 8. S21 attenuation measurement result
I(A)
0
S21(dB)
16
-5
14
12
10
-10
8
6
-15
4
2
-20
0
0
1
2
3
4
V(V)
DS11928 - Rev 3
5
6
7
8
9
10 MHz
100 MHz
Frequency
1 GHz
10 GHz
page 3/10
ESDZV5-1BF4
Package information
2
Package information
In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages,
depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product
status are available at: www.st.com. ECOPACK is an ST trademark.
2.1
0201 package information
Figure 9. 0201 package outline
Note:
DS11928 - Rev 3
The marking codes can be rotated by 90 ° or 180° to differentiate assembly location. In no case should this
product marking be used to orient the component for its placement on a PCB. Only pin 1 mark is to be used for
this purpose.
page 4/10
ESDZV5-1BF4
0201 package information
Table 3. 0201 package mechanical data
Dimensions
Millimeters
Ref.
Min.
Typ.
Max.
A
0.270
0.300
0.330
b
0.1675
0.1875
0.2075
D
0.560
0.580
0.600
D1
0.3375
E
0.260
0.280
0.300
E1
0.205
0.225
0.245
fD
0.0175
0.0275
0.0375
fE
0.0175
0.0275
0.0375
Figure 10. Marking
A
Note:
The marking can be rotated by multiples of 90° to differentiate assembly location.
Figure 11. Tape and reel specification (in mm)
Bar indicates Pin 1
4.0 ± 0.1
Ø 1.5 ± 0.1
1.75 ± 0.1
2.0 ± 0.05
0.36 ± 0.03
3.5 ± 0.05
0.67 ± 0.03
8.0 + 0.03 - 0.01
0.22
0.38 ± 0.03
2.0 ± 0.05
All dimensions in mm
DS11928 - Rev 3
User direction of unreeling
page 5/10
ESDZV5-1BF4
Recommendation on PCB assembly
3
Recommendation on PCB assembly
3.1
Footprint
Figure 12. Recommended footprint in mm
0.150
0.225
0.187
Solder mask opening
3.2
Stencil opening design
1.
Reference design
a.
Stencil opening thickness: 75 μm / 3 mils
Figure 13. Recommended stencil window position in mm
0.167
0.210
0.170
Stencil apertures
DS11928 - Rev 3
page 6/10
ESDZV5-1BF4
Solder paste
3.3
Solder paste
1.
2.
3.
4.
3.4
Placement
1.
2.
3.
4.
5.
6.
3.5
Manual positioning is not recommended.
It is recommended to use the lead recognition capabilities of the placement system, not the outline centering
Standard tolerance of ±0.05 mm is recommended.
1.0 N placement force is recommended. Too much placement force can lead to squeezed out solder paste
and cause solder joints to short. Too low placement force can lead to insufficient contact between package
and solder paste that could cause open solder joints or badly centered packages.
To improve the package placement accuracy, a bottom side optical control should be performed with a high
resolution tool.
For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is recommended during solder
paste printing, pick and place and reflow soldering by using optimized tools.
PCB design preference
1.
2.
3.6
Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
“No clean” solder paste is recommended.
Offers a high tack force to resist component movement during high speed.
Use solder paste with fine particles: powder particle size 20-38 µm.
To control the solder paste amount, the closed via is recommended instead of open vias.
The position of tracks and open vias in the solder area should be well balanced. A symmetrical layout is
recommended, to avoid any tilt phenomena caused by asymmetrical solder paste due to solder flow away.
Reflow profile
Figure 14. ST ECOPACK recommended soldering reflow profile for PCB mounting
250
240-245 °C
Temperature (°C)
-2 °C/s
2 - 3 °C/s
60 sec
(90 max)
200
-3 °C/s
150
-6 °C/s
100
0.9 °C/s
50
Time (s)
0
Note:
DS11928 - Rev 3
30
60
90
120
150
180
210
240
270
300
Minimize air convection currents in the reflow oven to avoid component movement. Maximum soldering profile
corresponds to the latest IPC/JEDEC J-STD-020.
page 7/10
ESDZV5-1BF4
Ordering information
4
Ordering information
Figure 15. Ordering information scheme
ESD
Z
V
5
- 1
B
F4
ESD protection
Z : Ultra low Clamping
snapback effect
V : Very Low Capacitance
5 : Stand-off voltage at 5.5 V max.
Number of lines
B = Bi-directional
Package
F4 = 0201
Table 4. Ordering information
Order code
Marking
Package
Weight
Base qty.
Delivery mode
ESDZV5-1BF4
A(1)
0201
0.116 mg
15000
Tape and reel
1. The marking can be rotated by multiples of 90° to differentiate assembly location
DS11928 - Rev 3
page 8/10
ESDZV5-1BF4
Revision history
Table 5. Document revision history
DS11928 - Rev 3
Date
Revision
Changes
06-Apr-2017
1
First issue.
28-Jul-2017
2
Updated footprint title.
19-Jan-2022
3
Updated Figure 12. Minor text changes.
page 9/10
ESDZV5-1BF4
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service
names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2022 STMicroelectronics – All rights reserved
DS11928 - Rev 3
page 10/10
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