EVAL6470
Fully integrated microstepping motor driver using the L6470
Data brief
Features
■
Voltage range from 8 V to 45 V
■
Phase current up to 3 Ar.m.s.
■
SPI with daisy-chain feature
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Socket for external resonator or crystal
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SW input
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Thermal resistance junction-to-ambient of 40
°C/W (typical)
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Suitable to be used in combination with
STEVAL-PCC009V2
Description
The EVAL6470 demonstration board is a fully
integrated microstepping motor driver. In
combination with the STEVAL-PCC009V2
communication board and the dSPIN Evaluation
Software, the board allows the engineer to
investigate all the features of the L6470 device.
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In particular, the board can be used to check the
voltage mode driving and to regulate the L6470
parameters in order to fit the application
requirements.
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Two or more EVAL6470 can be driven by a single
communication board making the demonstration
board suitable for the evaluation of L6470 in multimotor applications.
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March 2011
Doc ID 018622 Rev 1
For further information contact your local STMicroelectronics sales office.
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www.st.com
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Board description
EVAL6470
1
Board description
Figure 1.
EVAL6470 demonstration board jumper and connector locations
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EVAL6470
Board description
Table 1.
EVAL6470: jumper and connector description
Name
Type
J4
Power supply
Board power supply
J2
Power outputs
Bridge A outputs
J3
Power outputs
Bridge B outputs
J10
SPI connector
Master SPI connector
J11
SPI connector
Slave SPI connector
SW
NM test point
External switch connector
VS
Test point
Motor supply voltage
VREG
Test point
Internal 3 V regulator output
VDD
Test point
Logic interface voltage
GND
Test point
Ground
JP7
Jumper
Selects SPI connector PWM2 GPIO functionality
JP2
Jumper
Daisy chain termination
JP5
Jumper
EXT_VDD (SPI connector) to VDD connection
JP3
Jumper
VDD to VREG connection
JP4
Jumper
Table 2.
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Selects ADCIN source
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Pr
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Description
L6470 BUSY open drain output
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EVAL6470: master SPI connector pinout (J10)
Pin number
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Function
L6470 FLAG open drain output
Ground
EXT_VDD (can be used as external logic power supply)
5
SPI master in, slave out signal (connected to L6470 SDO output through
daisy chain termination jumper JP2)
6
SPI serial clock signal (connected to L6470 CK input)
7
SPI master out, slave in signal (connected to L6470 SDI input)
8
SPI slave select signal (connected to L6470 CS input)
9
PWM1 input
10
PWM2 input
Doc ID 018622 Rev 1
3/11
Board description
EVAL6470
Table 3.
EVAL6470: slave SPI connector pinout (J11)
Pin number
Table 4.
Description
1
L6470 BUSY open drain output
2
L6470 FLAG open drain output
3
Ground
4
EXT_VDD (can be used as external logic power supply)
5
SPI master in, slave out signal (connected to pin 5 of J10)
6
SPI serial clock signal (connected to L6470 CK input)
7
SPI master out, slave in signal (connected to L6470 SDO output)
8
SPI slave select signal (connected to L6470 CS input)
9
PWM1 input
10
PWM2 input
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EVAL6470: electrical specification (recommended values)
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Parameter
Supply voltage range (VS)
8 to 45 V
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Output current rating
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Logic interface voltage (VDD)
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Operating temperature range
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L6470H thermal resistance junction-to-ambient
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Value
Up to 3 Arms
Logic supply voltage (VREG)
3.3 V (when externally supplied)
3.3 V or 5 V (when externally supplied)
0 to +5 V
–25 to +125 °C
40 °C/W
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EVAL6470
Board description
EVAL6470 schematic - part 1
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Board description
EVAL6470
EVAL6470 schematic - part 2
EVAL6470
Board description
Table 5.
EVAL6470: component list
Part reference
Part value
Part description
C1
100 nF
50 V ceramic capacitor
C2
10 nF
63 V ceramic capacitor
C3, C8
100 nF
Ceramic capacitor
C4
100 µF
63 V electrolytic capacitor
C5
220 nF
16 V ceramic capacitor
C6, C7
NM
Ceramic capacitor
C9, C10
100 pF
Ceramic capacitor
C11
1 nF
Ceramic capacitor
C12
3.3 nF
Ceramic capacitor
C13
10 nF
C14
10 µF
C15
47 µF
D1
BAT46SW
D2
BZX284C3V6
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Ceramic capacitor
6.3 V ceramic capacitor
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6.3 V ceramic capacitor
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JP2, JP3
J2, J3, J4
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Low drop diode couple
3.6 V Zener diode
Jumper 2 x 1
Jumper 2 x 1
Jumper 3 x 1
Jumper 3 x 1
Connector
NM
Strip pin
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R1
31.6 kΩ
Resistor 1%
R2
8.2 kΩ
Resistor 1%
R5, R6, R7
39 kΩ
Resistor 1%
R9
10 kΩ
Resistor 1%
R3
200 kΩ
Trimmer
R8
100 Ω
Resistor 1%
R10
0Ω
Resistor 1/8 W
J10
Vertical 5 x 2 male connector
J11
Vertical 5 x 2 male connector
TP5
Test point
TP4, TP6
Test point
U1
L6470H
L6470 dSPIN
Y1
NM
Crystal
Y2
NM
Ceramic resonator
Doc ID 018622 Rev 1
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Board description
Figure 4.
EVAL6470
EVAL6470 layout (top layer)
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Figure 5.
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EVAL6470 layout (bottom layer)
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EVAL6470
2
Connection to IBU universal interface board
Connection to IBU universal interface board
The EVAL6470 should be connected to the interface board (STEVAL-PCC009V2 or
STEVAL-PCC009V1), and the following steps performed:
2.1
1.
Connect the interface board to the PC through the USB cable
2.
If requested, install interface board drivers
3.
Verify interface board operation (check if operation LED diode is turned on)
4.
Connect the interface board 10-pin connector to the EVAL6470 J10 connector (SPI_IN)
through the 10-pole flat cable
5.
Connect motor phases to the EVAL6470 J2 and J3 connectors
6.
Connect the power supply (8 V to 45 V) to the EVAL6470 J4 connector
7.
Start the dSPIN Evaluation tool.
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Daisy-chain mode
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More EVAL6470 boards can be connected in daisy chain mode. This way you can control up
to eight motors using a single communication board (STEVAL-PCC009V2 only).
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To drive two or more boards in daisy chain configuration:
Connect the interface board to the PC through the USB cable
2.
If requested, install the interface board drivers
3.
Verify interface board operation (check if the operation LED diode is turned on)
4.
Connect the interface board 10-pin connector to the first EVAL6470 J10 connector
(SPI_IN) through the 10-pole flat cable
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5.
Open the JP2 jumper of EVAL6470
6.
Connect the J11 connector (SPI_OUT) of the previous EVAL6470 to the J10 connector
(SPI_IN) of the next one through the 10-pole flat cable
7.
Repeat point 5 and 6 for all the others board of the chain but the last one.
8.
9.
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Caution:
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1.
Check the JP2 jumpers of EVAL6470 boards: all the jumpers but the last one should be
opened
Check the JP7 jumpers of EVAL6470 boards: all the jumpers should be in the same
configuration (STCK or STBY)
Increasing the number of devices connected in chain could degrade SPI communication
performances. If communication issues are founded, try to reduce SPI clock speed.
Figure 6.
Daisy chain configuration
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Revision history
3
EVAL6470
Revision history
Table 6.
Document revision history
Date
Revision
22-Mar-2010
1
Changes
Initial release.
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EVAL6470
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