EVALPWD5F60
Demonstration board for PWD5F60 smart driver with integrated
high voltage full bridge
Data brief
Description
The PWD5F60 is an advanced power system-inpackage integrating gate drivers and four
N-channel power MOSFETs in a compact QFN
package.
The integrated power MOSFETs have an RDS(ON)
of 1.38 Ω and 600 V drain-source breakdown
voltage. The embedded gate drivers feature two
comparators that can be used for peak current
control or overcurrent protection and integrate
bootstrap diodes. This allows to effectively drive
loads in a tiny space and to drastically reduce
external components and bill of materials.
Features
Power system-in-package integrating gate
drivers and power MOSFETs featuring:
– RDS(ON) = 1.38 Ω
– BVDSS = 600 V
– 2 embedded comparators
Very low area occupation, all active devices in
SMT technology and no heatsink
Fast-decay or slow-decay on-board constant
OFF-time peak current control
PWM voltage mode control with overcurrent
protection possible via external logic signals
Driver supply voltage range: 10 V to 20 V
UVLO protection on low-side and high-side
3.3 V to 15 V compatible inputs with hysteresis
and pull-down
Internal bootstrap diode
The EVALPWD5F60 demonstrates how to use
the PWD5F60 to drive a single-phase load in fullbridge topology. This allows control of both the
direction and the value of the current flowing into
the load. Typical applications that can benefit
from the high integration of the PWD5F60 are, for
example, single-phase BLDC motors and fans.
The board has a very small footprint and an
optimized layout thanks to the integrated features
of the PWD5F60, and it can be simply run by
applying the supply voltages and a direction
signal.
The board allows easy selection and modification
of the relevant external component values,
enabling fast performance evaluation under
different applicative conditions as well as fine
tuning of final application components.
Bill of materials reduction
Very compact and simplified layout
Flexible, easy and fast design
RoHS compliant
Load current up to 1 A
September 2018
DB3717 Rev 1
For further information contact your local STMicroelectronics sales office.
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www.st.com
Board description
1
EVALPWD5F60
Board description
Table 1. EVALPWD5F60 electrical specifications
Parameter
Max supply voltage range (VS)
Value
(1)
400 VDC
Driver supply voltage (Vcc)
10 to 20 V
Logic control signals
0 to 15 V
(2)
Junction to ambient thermal resistance RJA
30 °C/W
Operating temperature range
-40 °C to +125 °C
1.
Maximum VS voltage is limited by the electrolytic bulk capacitor (C26) voltage rating; PWD5F60 BVDSS is 600 V.
2.
Measured with uniform dissipation on the power MOSFETs
Figure 1. Jumpers and connectors location
Slow/Fast Decay
selection jumpers
Off-time
setting trimmer
VS high voltage
supply connector
Control signals
and driver supply
Load
connector
Peak Current
(as motor speed)
setting trimmer
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DB3717 Rev 1
EVALPWD5F60
Board description
Table 2. Jumpers and connectors description
Name
Type
Function
J1
Control signals connector
VCC and logic control signals, pin strip header
J2
Control signals connector
VCC and logic control signals, terminal block connector
J3
Power supply
VS high voltage power supply connector
J4
Power output
Load connector
JP1
Configuration jumper
To connect VPU pull-up voltage to VCC
JP2
Configuration jumper
To pull-up SD or PWM signals to VPU pull-up voltage
JP3
Configuration jumper
To connect SD or PWM signal to CPOUT2
JP4
Configuration jumper
To use trimmer TR2 for setting the peak current instead of
R10
JP5
Configuration jumper
To use trimmer TR1 for setting OFF-time duration after
overcurrent detection instead of R23
Table 3. Control signals connector pinout (J1 - J2)
Pin
Label
Type
Description
1
SD
Digital input
Drivers' SD signal
2
PWM
Digital input
Drivers' PWM signal
3
VCTRL
Analog / PWM input
Vctrl signal, sets current limit threshold (as motor speed)
4
DIR
Digital input
DIR signal, sets current's direction (as from Hall sensor)
5
RSD
Reserved
Reserved
6
VCC
Power supply
Drivers' VCC power supply
7
VPU
Power supply
VPU pull-up voltage for drivers' signals. Close JP1 to connect to
VCC
8
GND
Power supply
GND
DB3717 Rev 1
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10
Vpu
1
2
3
4
5
6
7
8
J1
J2
C1
100nF/25V
3
2
1
SD
PWM
Vctrl
IN
RSD
Vcc
Vpu
GND
STRIP254P-M-8
1
2
3
4
5
6
7
8
C2
4.7uF/25V
SD
PWM
Vctrl
DIR
RSD
VCC_F
Vpu
SD
PWM
Vctrl
DIR
RSD
VCC_F
10R
C3
4.7uF/25V
R22
Vpu Vcc
Vcc
JP2
DIR
Vcc
C4
R24
N.M.
R2
24k
R3
220k
1uF/25V
Vpu
1k
R18
C7
33pF
C21
1nF
Q3
1
JP3
JP1 CLOSE
R13
24k
3
2
1
SD
PWM
R14
7.5k
DIR_N
Vcc
2N7002
Vcc-Vpu Vpu
C5
820pF
TP1
Vpu
TR1
R21
0R
Vpu
TR1
200k
R4
30k
N.M.
C6
C23
R7
0R
Vcc
C10
C9
33pF
Vcc
TP4
RSD
Vpu
100nF/25V 100nF/25V
C24
33pF
1k
PWM R6
C8
33pF
JP5 CLOSE
R23
N.M.
N.M.
C22
C25
33pF
1k
R5
CPOUT2
SD
C17
33nF/630V
GND
R1
N.M.
4
40
46
EP1
16
22
26
EP4
42
18
43
19
45
21
41
17
38
15
37
14
GND2
GND2
GND2
GND2
GND1
GND1
GND1
GND1
VCC1
VCC2
DT2
DT1
CPOUT2
CPOUT1
PWM2
PWM1
SD2
SD1
IN2
IN1
U1
36
39
EP7
RSD1
RSD2
RSD3
9
VS1
VS1
11
EP3
R16
1R8 1%
SNS
PWD5F60
VS1
10
VS1
SENSE1
25
VS1
31
VS2
32
VS2
33
VS2
Vcc
3
2
NC1
1
2
24
23
34
5
6
7
8
EP2
35
1k
C11
3.3nF
Vpu
220k
R11
OUT2
C13
470nF/25V
OUT1
C12
1uF/25V
TP2
Vref
C26
4.7uF/450V
C18
470nF/25V
C14
33nF/630V
12
27
28
29
30
EP5
13
R12
CP+2
CP-2
CP-1
CP+1
OUTB2
OUT2
OUT2
OUT2
OUT2
OUT2
BOOT2
OUTB1
OUT1
OUT1
OUT1
OUT1
OUT1
BOOT1
TP5 TP3
R15
1R8 1%
VS2
EP6
SENSE2
3
DB3717 Rev 1
NC2
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20
R10
N.M.
Vctrl
Vpu
N.M.
C16
N.M.
C15
TR2
1k
JP4
CLOSED
TR2
R9
10k
R8
30k
VS1
VS
2
1
Vcc
1K
R20
R17
3.9k
R19
24k
C19
22nF
DIR
J4
MORSV-508-2P_screw
J3
MORSV-508-2P_screw
C20
1nF
OUT2 2
OUT1 1
VS
2
44
Vs
Schematic diagram
EVALPWD5F60
Schematic diagram
Figure 2. EVALPWD5F60 circuit schematic
EVALPWD5F60
Schematic diagram
Table 4. EVALPWD5F60 - Bill Of Materials
Part reference
Part value
Part description
C7, C8, C9, C24, C25
33 pF
Ceramic capacitor, SMT 0603
C5
820 pF
Ceramic capacitor, SMT 0603
C11
3.3 nF
Ceramic capacitor, SMT 0603
C19
22 nF
Ceramic capacitor, SMT 0603
C1, C10, C23
100 nF / 25 V
Ceramic capacitor, SMT 0603
C13, C18
470 nF / 25 V
Ceramic capacitor, SMT 0603
C4, C12
1 μF / 25 V
Ceramic capacitor, SMT 0603
C6, C22
N.M.
Ceramic capacitor, SMT 0603
C2, C3
4.7 μF / 25 V
Ceramic capacitor, SMT 0805
C14, C17
33 nF / 630 V
Ceramic capacitor, SMT 1206
C15, C16
N.M.
Ceramic capacitor, SMT 1206
C26
4.7 μF / 450 V - 20%
Electrolytic capacitor, T.H. D10 H12.5 P5
JP1, JP4, JP5
Jumper - CLOSED
SMT jumper - 2 poles
JP2
Jumper - 1-2 CLOSED
SMT jumper - 3poles
JP3
Jumper - 2-3 CLOSED
SMT jumper - 3 poles
J1
STRIP254P-M-8
Pin strip header 2.54 mm, 8 poles
J2
Screw connector
Conn. term. block T.H. 8 POS 3.5 mm
J3, J4
Screw connector
Conn. term. block T.H. 2 POS 5.08 mm
R1, R10, R23, R24
N.M.
Resistor, SMT 0603
R2, R13, R19
24 kΩ
Resistor, SMT 0603
R4, R8
30 kΩ
Resistor, SMT 0603
R5, R6, R12, R18, R20
1 kΩ
Resistor, SMT 0603
R7, R21
0Ω
Resistor, SMT 0603
R9
10 kΩ
Resistor, SMT 0603
R3, R11
220 kΩ
Resistor, SMT 0603
R14
7.5 kΩ
Resistor, SMT 0603
R15, R16
1.8 Ω - 1 %
Resistor, SMT 1210
R17
3.9 Ω
Resistor, SMT 0603
R22
10 Ω
Resistor, SMT 0603
TP1, TP2, TP3, TP5
Test point SMD
SMD test point 50 mils
TP4
Ring test point
Test point PCB 1 mm T.H.
TR1
200 kΩ
Trimmer 1/4 W - Bourns 3266 W
DB3717 Rev 1
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10
Schematic diagram
EVALPWD5F60
Table 4. EVALPWD5F60 - Bill Of Materials (continued)
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Part reference
Part value
Part description
TR2
1 kΩ
Trimmer 1/4 W - Bourns 3266 W
U1
PWD5F60
PWD5F60, VFQFPN 15x7
Q3
2N7002
60 V small signal N-channel MOSFET,
SOT23-3L
DB3717 Rev 1
EVALPWD5F60
Schematic diagram
Figure 3. EVALPWD5F60 - layout (top layer)
Figure 4. EVALPWD5F60 - layout (bottom layer)
DB3717 Rev 1
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Schematic diagram
EVALPWD5F60
Figure 5. EVALPWD5F60 - layout (component placement view)
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DB3717 Rev 1
EVALPWD5F60
3
Revision history
Revision history
Table 5. Document revision history
Date
Revision
29-Aug-2018
1
Changes
Initial release
DB3717 Rev 1
9/10
10
EVALPWD5F60
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DB3717 Rev 1