EVALSTGAP2HDM

EVALSTGAP2HDM Data brief Demonstration board for STGAP2HDM isolated 4 A half-bridge gate driver Features • • Board – High voltage rail up to 1200 V – Negative gate driving – On-board isolated DC-DC converters to supply high-side and low-side gate drivers, fed by VAUX = 5 V, with 5.2 kV maximum isolation – VDD logic supplied by on-board generated 3.3 V or VAUX = 5V – Easy jumper selection of driving voltage configuration: +15/0 V; +15/-3 V; +19/0 V; +19/-3 V; Device – Driver current capability: 4 A source/sink @ 25°C – 4 A Miller CLAMP – Short propagation delay: 75 ns – UVLO function – Configurable interlocking function – Dedicated SD and BRAKE pins – Gate driving voltage up to 26 V – 3.3 V, 5 V TTL/CMOS inputs with hysteresis – Temperature shutdown protection – Standby function Product status link Description EVALSTGAP2HDM The EVALSTGAP2HDM is an half bridge evaluation board designed to evaluate the STGAP2HD isolated dual gate driver The gate driver is characterized by 4 A current capability and rail-to-rail outputs, making the device suitable also for high power applications such as motor drivers in industrial applications equipped with MOSFET, IGBT power switches. The device integrates protection functions: dedicated SD and BRAKE pins are available, UVLO and thermal shutdown are included to easily design high reliability systems, and the interlocking function prevents outputs from being high at the same time. The device allows implementing negative gate driving, and the on-board isolated DC-DC converters allow working with optimized driving voltage for MOSFET, IGBT. The EVALSTGAP2HDM board allows evaluating all the STGAP2HDM features while driving a half-bridge power stage with voltage rating up to 1200 V in TO-220 or TO-247 package. The board allows easily selecting and modifying the values of relevant external components in order to ease driver performance evaluation under different applicative conditions and fine pre-tuning of final application components. DB4473 - Rev 1 - October 2021 For further information contact your local STMicroelectronics sales office. www.st.com DB4473 - Rev 1 1 2 3 4 5 6 7 1 2 3 4 5 6 7 BRAKE_IN P WMA J2 J1 VDD 100R R11 VDD R5 N.M. 220pF/25V C12 INA C14 1nF/25V S D_IN P WMB C5 100nF/16V C4 100R R12 VDD TP 4 C15 1nF/25V R10 10K SD 220pF/25V C13 INB TP 15 INA INB SD BRAKE GND TP 7 TP 8 TP 9 TP 11 100R R8 VDD 4.7uF/16V R9 10K BRAKE VDD R20 0 100R R7 VAUX P WMA P WMB S D_IN BRAKE_IN VDD VAUX P WMA P WMB S D_IN BRAKE_IN 13 11 7 8 9 10 6 GND iLOCK INA INB SD BRAKE VDD U1 CLAMP _B GNDIS O_B GOFF_B GON_B VH_B GNDIS O_A GNDIS O_A CLAMP _A GOFF_A GON_A VH_A S TGAP 2HD GH 25 GL 24 23 22 20 35 34 33 32 31 30 1 2 TP 1 VH_B TP 6 TP 5 GON_B TP 16 R4 GNDISO_B GOFF_B TP 14 R2 GNDISO_A GOFF_A GON_A TP 3 VH_B TP 12 TP 10 C8 100nF/50V VH_B R1 N.M. 20-30R C1 100nF/50V VH_A VH_A S TTH112A D1 2.2R 2.2R GNDIS O_B R6 22R GNDIS O_A R3 22R VH_B 1uF/50V C11 1uF/50V CLOS ED JP6 C6 CLOS ED JP3 VH_A 1uF/50V C9 1uF/50V C2 1 1 N.M. C10 GL OUT N.M. C3 GH 3 2 3 2 HV TP 17 N.M. Q2/A N.M. 1 2 1 2 TP 13 TP 2 Q1/A 1 2 HV OUT GNDPWR TE 928814-1 1 2 CN3 TE 928814-1 1 2 CN2 TE 928814-1 1 2 CN1 1 VDD GND INA INB SD BRAKE VAUX VDD GND INA INB SD BRAKE VAUX EVALSTGAP2HDM Schematic diagram Schematic diagram Figure 1. EVALSTGAP2HDM schematic – gate driver page 2/12 DB4473 - Rev 1 VAUX 10uF/25V C29 VAUX D10 MMS Z3V3T1G 3V3_REG R17 240R 3 1 3V3 0 VDD C22 N.M. 0 C18 N.M. J P 16 2-3 CLOS E 2 VAUX R16 R14 T1 FB2 N.M. 3 4 FB4 N.M. 3 4 BLM21AG471S N1 T2 BLM21AG471S N1 FB3 BLM21AG471S N1 C30 4.7uF/16V 2 1 2 1 BLM21AG471S N1 FB1 + HV VH_B 2 1 C25 N.M. SMD 1812 0V 2 -Vout 0V +Vout CN5 N.M. 1 -Vout C26 N.M. SMD 1812 MGJ 2D051509S C -Vin +Vin U3 1 2 +Vout MGJ 2D051509S C -Vin +Vin GNDISO_B 2 C24 N.M. Electr. P 10 1uF/50V C21 1uF/50V C17 1 U2 GNDISO_A VH_A CN4 N.M. 5 6 7 5 6 7 C27 N.M. Film P 27.5 DCDCL- DCDCL+ DCDCH- DCDCH+ OP EN CLOS ED OP EN J P 15 C28 33nF/1250V Film P 15mm JP9 JP8 10M R19 10M D9 BZT585B2V7T VH_B GNDIS O_B GNDP WR D7 BZT585B16T Q4 2S TF1360 or e quiva le nt 3 OP EN GNDIS O_A OUT D4 BZT585B16T 1 CLOS ED D8 BZT585B20T J P 13 R15 1k 2 J P 12 D6 BZT585B2V7T VH_A Q3 2S TF1360 or equivalent 3 OP EN 1 CLOS ED 2 D5 BZT585B20T R18 CLOS ED C23 1uF/50V J P 14 C20 1uF/50V J P 11 C19 1uF/50V J P 10 C16 1uF/50V R13 1k GNDIS O_B TP 21 TP 20 GNDIS O_A TP 19 TP 18 EVALSTGAP2HDM Schematic diagram Figure 2. EVALSTGAP2HDM circuit schematic – supply, connectors and decoupling page 3/12 EVALSTGAP2HDM Bill of material 2 Bill of material Table 1. EVALSTGAP2HDM - Bill of Material Part Reference CN1, CN2, CN3 CN4, CN5 C1, C8 C2, C6, C9, C11 C3, C10, C18, C22 TE 928814-1 N.M. Part description Tab FASTON 250 Horizontal, 5.08 mm Connector terminal block T.H. 2 POS 5.08 mm 100 nF/50 V Ceramic capacitor, SMT 1206 1 μF/50 V Ceramic capacitor, SMT 0805 N.M. Ceramic capacitor, SMT 0603 C4, C30 4.7 μF/16 V Ceramic capacitor, SMT 0603 C5 100 nF/16 V Ceramic capacitor, SMT 0603 C12, C13 220 pF/25 V Ceramic capacitor, SMT 0603 C14, C15 1 nF/25 V Ceramic capacitor, SMT 0603 C16, C17, C19, C20, C21, C23 1 μF/50 V Ceramic capacitor, SMT 0603 C24 N.M. THT electrolytic capacitor, P 10 mm C25, C26 N.M. Ceramic capacitor, SMT 1812 C27 N.M. Film capacitor, P 27.5 mm C28 33 nF/1250 V C29 10 μF/25 V D1 STTH112A Film capacitor, P15 mm Ceramic capacitor, SMT 0805 High voltage ultrafast rectifier, SMA D4, D7 BZT585B16T Surface mount precision Zener diode, SOD523 D5, D8 BZT585B20T Surface mount precision Zener diode, SOD523 D6, D9 BZT585B2V7T Surface mount precision Zener diode, SOD523 D10 MMSZ3V3T1G Zener voltage regulator 500 mW, SOD-123 FB1, FB2, FB3, FB4 JP3, JP6, JP9, JP11, JP13, JP15 JP8, JP10, JP12, JP14 JP16 BLM21AG471SN1 Closed Ferrite beads, SMT 0805 SMT jumper Open SMT jumper Closed 2-3 SMT Jumper J1 WE691243110007 or similar J2 Pin strip Connector terminal block T.H. 7 POS 3.5 mm Strip connector 7 pos, 2.54 mm Q1, Q2 N.M. N-channel IGBT or MOSFET up to 1700 V, TO-247 Q1A, Q2A N.M. N-channel IGBT or MOSFET up to 1700 V, TO-220 Q3, Q4 DB4473 - Rev 1 Part value 2STF1360 Low voltage fast-switching NPN power transistors, SOT-89 R1 N.M. Chip resistor, SMT 1206 R2, R4 22 Ω Chip resistor, SMT 1210 R3, R6 2.2 Ω Chip resistor, SMT 1210 R5 N.M. Chip resistor, SMT 0603 R7, R8, R11, R12 100 Ω Chip resistor, SMT 0603 R9, R10 10 kΩ Chip resistor, SMT 0603 R13, R15 1 kΩ Chip resistor, SMT 0603 R14, R16, R20 0Ω Chip resistor, SMT 0603 R17 240 Ω Chip resistor, SMT 0805 R18, R19 10 MΩ Chip resistor, SMT 1206 page 4/12 EVALSTGAP2HDM Bill of material Part Reference Part description TP1, TP2, TP3, TP4, TP5, TP6, TP7, TP8, TP9, TP10, TP11, TP12, TP13, TP14, TP15, TP16, TP17 N.M. Loop test point, THT TP18, TP19, TP20, TP21 N.M. Pad test point, SMD 1.5 mm T1, T2 N.M. Common mode choke, SMD 4.7x4.5 mm U1 U2, U3 DB4473 - Rev 1 Part value STGAP2HDM MGJ2D051509SC Galvanically isolated 4 A dual gate driver, SO36-W Murata 5.2 kVDC Isolated 2W gate drive DC/DC converters page 5/12 EVALSTGAP2HDM Layout and component placements 3 Layout and component placements Figure 3. EVALSTGAP2HDM – Layout (component placement top view) Figure 4. EVALSTGAP2HDM – Layout (component placement bottom view) DB4473 - Rev 1 page 6/12 EVALSTGAP2HDM Layout and component placements Figure 5. EVALSTGAP2HDM – Layout (top layer) Figure 6. EVALSTGAP2HDM – Layout (bottom layer) DB4473 - Rev 1 page 7/12 EVALSTGAP2HDM Revision history Table 2. Document revision history DB4473 - Rev 1 Date Version 29-Oct-2021 1 Changes Initial release. page 8/12 EVALSTGAP2HDM Contents Contents 1 Schematic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 3 Layout and component placements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 List of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 List of figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 DB4473 - Rev 1 page 9/12 EVALSTGAP2HDM List of tables List of tables Table 1. Table 2. EVALSTGAP2HDM - Bill of Material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 DB4473 - Rev 1 page 10/12 EVALSTGAP2HDM List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. DB4473 - Rev 1 EVALSTGAP2HDM schematic – gate driver . . . . . . . . . . . . . . . . . . . . . . EVALSTGAP2HDM circuit schematic – supply, connectors and decoupling EVALSTGAP2HDM – Layout (component placement top view) . . . . . . . . . EVALSTGAP2HDM – Layout (component placement bottom view) . . . . . . EVALSTGAP2HDM – Layout (top layer). . . . . . . . . . . . . . . . . . . . . . . . . EVALSTGAP2HDM – Layout (bottom layer) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 3 6 6 7 7 page 11/12 EVALSTGAP2HDM IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2021 STMicroelectronics – All rights reserved DB4473 - Rev 1 page 12/12