EVALSTGAP2HSCM

EVALSTGAP2HSCM Data brief Demonstration board for STGAP2HSCM isolated 4 A single gate driver Features • • Board – High voltage rail up to 1200 V – Negative gate driving – Onboard isolated DC-DC converters to supply high-side and low-side gate drivers, fed by VAUX = 5 V, with 5.2 kV maximum isolation – 3.3 V VDD logic supply generated onboard or 5 V (externally applied) – Easy jumper selection of driving voltage configuration: +15/0 V; +15/-3 V; +19/0 V; +19/-3 V; Device – Driver current capability: 4 A source/sink @ 25°C – 6000 V Galvanic isolation – Short propagation delay: 75 ns – UVLO function – Gate driving voltage up to 26 V – 3.3 V, 5 V TTL/CMOS inputs with hysteresis – Temperature shutdown protection – Standby function – 4 A Miller CLAMP Description Product status link The EVALSTGAP2HSCM is an isolated single gate driver. EVALSTGAP2HSCM The gate driver is characterized by 4 A current capability and rail-to-rail outputs, making the device suitable also for high power inverter applications such as motor drivers in industrial applications equipped with MOSFET / IGBT power switch. The configuration featuring single output pin and Miller CLAMP function allows avoiding gate spikes during fast commutations in half-bridge topologies. The device integrates protection functions: UVLO and thermal shutdown are included to easily design high reliability systems. Dual input pins allow choosing the control signal polarity and also implementing HW interlocking protection in order to avoid cross-conduction in case of controller's malfunction. The device allows implementing negative gate driving, and the onboard isolated DCDC converters allow working with optimized driving voltage for MOSFET/IGBT. The EVALSTGAP2HSCM board allows evaluating all the STGAP2HSCM features while driving a half-bridge power stage with voltage rating up to 1200 V in TO-220 or TO-247 package. The board allows easily selecting and modifying the values of relevant external components in order to ease driver performance evaluation under different applicative conditions and fine pre-tuning of the final application’s components. DB4268 - Rev 1 - September 2020 For further information contact your local STMicroelectronics sales office. www.st.com EVALSTGAP2HSCM Schematic diagram 1 Schematic diagram Figure 1. EVALSTGAP2HSCM circuit schematic – gate drivers IN+_H IN-_H IN+_L IN-_L GND VDD VAUX J1 1 2 3 4 5 6 7 C_IN+H C_IN-H C_IN+L C_IN-L VDD VAUX TP 1 TP 2 TP 3 TP 4 TP 5 TP 6 TP 7 CN1 TE 928814-1 1 2 HV TP 9 C_IN+H C_IN-H C_IN+L C_IN-L VDD VAUX R1 22R GH 1 2 1 1 2 3 4 5 6 7 VDD C1 100nF/50V VDD C_IN+H R3 100R C_IN-H R4 100R GND C5 220pF/25V C_IN-L C_IN+L 2 IN-H 3 4 VDD IN+ GOUT IN- CLAMP GND C2 100nF/50V 5 VH 6 GONUH 7 GOFCH 8 GNDIS O 2R2 JP2 C3 CLOS ED JP3 CLOS ED VH_L R5 C_IN-H 2 N.M. 10-20R VDD D2 2 Q2 N.M. TO247 1 GH N.M. CN2 TE 928814-1 3 1 2 OUT 1 Q2A N.M. TO220 3 C4 OUT 1 2 OUT GNDISO_H C7 J P 5 CLOS ED C_IN-H 1uF 50V TP 8 GNDIS O_H J P 4 CLOS ED C_IN+H J P 6 OP EN VH_H JP1 OP EN GNDIS O_H TP 10 S TGAP 2HS CM R2 2 TP 11 1uF 50V VH_H 1 S TTH112A R6 22R GL OUT 1 C_IN-L IN+H C6 220pF/25V VH_H U1 1 VAUX HV HV D1 S TP S 2L40ZFY 2 IN+_H IN-_H IN+_L IN-_L GND VDD VAUX J2 VDD U2 1 C_IN+L R7 100R C_IN-L R9 100R IN+L 2 IN-L 3 4 C12 220pF/25V C13 220pF/25V VDD VH IN+ GOUT IN- CLAMP GND VH_L C9 100nF/50V S TGAP 2HS CM GNDIS O 5 6 GONUL 7 GOFCL 8 GNDIS O_L TP 12 GNDISO_L D3 S TP S 2L40ZFY R8 2 C8 100nF/50V 2 2R2 VH_L JP7 OP EN JP8 JP9 CLOS ED CLOS ED C10 C11 1uF 50V N.M. 2 Q1 N.M. TO247 1 GL CN3 TE 928814-1 3 GNDP WR 1 2 GNDIS O_L 1 Q1A N.M. TO220 3 1 2 GNDPWR C14 1uF 50V TP 13 EVALSTGAP2HS Version: R1.0 VP 1 EMP TY VP 2 FULL VP 3 EMP TY 2HSM 2HSCM VP 4 EMP TY DB4268 - Rev 1 page 2/12 EVALSTGAP2HSCM Schematic diagram Figure 2. EVALSTGAP2HSCM circuit schematic – supply, connectors and decoupling J P 10 DCDCH+ VAUX R11 0R C18 N.M. C15 1uF/50V U3 BLM21AG471S N1 T1 1 GNDISO_H N.M. 1 4 2 3 1 C17 1uF/50V 7 J P 12 OP EN +Vin -Vin -Vout FB2 BLM21AG471S N1 TP 14 Q3 2S TF1360 1 J P 11 CLOS ED +Vout 0V 2 VH_H 3 R10 1K 2 VH_H FB1 OP EN 2 J3 N.M. D5 BZT585B20T 6 OUT C19 1uF/50V 5 D6 BZT585B2V7T GNDIS O_H DCDCH- MGJ 2D051509S C C16 4.7uF/50V D4 BZT585B16T TP 15 GNDIS O_H J P 13 CLOS ED J P 14 DCDCL+ VH_L 1 GNDISO_L 2 C20 1uF/50V VAUX R13 0R C23 N.M. 1 T2 N.M. U4 2 3 FB4 1 4 C22 +Vout 0V 2 1uF/50V 7 J P 16 OP EN +Vin -Vin -Vout BLM21AG471S N1 MGJ 2D051509S C J P 15 C24 1uF/50V TP 16 Q4 2S TF1360 1 CLOS ED D7 BZT585B20T D8 BZT585B16T D9 BZT585B2V7T GNDIS O_L DCDCL- VAUX 3 1 + 3V3 C25 N.M. Electr. P 7.5/10 C26 N.M. SMD 1812 C27 N.M. SMD 1812 C28 N.M. Film P 27.5 C29 33nF/1.25kV R16 10M Film P 15mm C31 4.7uF/10V 2 C30 10uF/25V 10M 2 J P 18 CLOS ED 2-3 3V3_REG R14 HV VAUX R15 240R D10 MMS Z3V3T1G VDD 1 TP 17 GNDIS O_L J P 17 CLOS ED VAUX C21 4.7uF/50V GNDP WR 6 5 VH_L 3 R12 1K FB3 BLM21AG471S N1 OP EN 2 J4 N.M. DB4268 - Rev 1 page 3/12 EVALSTGAP2HSCM Bill of material 2 Bill of material Table 1. Bill of Material – components common to all device variants Description Value / Generic Part Number Tab FASTON 250 horizontal TE 928814-1 C1,C2,C8,C9 SMT ceramic capacitor 100 nF/50 V C3,C7,C10,C14 SMT ceramic capacitor 1 uF/50 V C4,C11 SMT ceramic capacitor N.M. C5,C6,C12,C13 SMT ceramic capacitor 220 pF/25 V C15,C17,C19,C20,C22,C24 SMT ceramic capacitor 1 uF/50 V C16,C21 SMT ceramic capacitor 4.7 uF/50 V C18,C23 SMT ceramic capacitor N.M. THT electrolitic capacitor N.M. SMT ceramic capacitor N.M. C28 Film capacitor N.M. C29 Film capacitor 33 nF/1.25k V C30 SMT ceramic capacitor 10 uF/25 V C31 SMT ceramic capacitor 4.7 uF/10 V Automotive low drop power Schottky rectifier STPS2L40ZFY High voltage ultrafast rectifier STTH112A D4,D8 Surface mount precision Zener diode BZT585B16T D5,D7 Surface mount precision Zener diode BZT585B20T D6,D9 Surface mount precision Zener diode BZT585B2V7T Zener Voltage Regulator 500 mW MMSZ3V3T1G FB1,FB2,FB3,FB4 Ferrite beads BLM21AG471SN1 JP2,JP3,JP4,JP5,JP8,JP9,JP11,JP13, JP15,JP17 SMT jumper Closed JP1,JP6,JP7,JP10,JP12,JP14,JP16 SMT jumper Open JP18 SMT jumper Closed 2-3 J1 Connector terminal block T.H. 7 POS 3.5 mm MORSV-350-7P_screw J2 Strip connector 7 POS, 2.54 mm STRIP 1x7 J3,J4 Connector terminal block T.H. 2 POS 5.08 mm N.M. Q1,Q2 N-channel IGBT or MOSFET up to 1700 V N.M. Q1A,Q2A N-channel IGBT or MOSFET up to 1700 V N.M. Q3,Q4 Low voltage fast-switching NPN power transistors 2STF1360 R1,R6 SMT resistor 22R R2,R8 SMT resistor 2R2 R3,R4,R7,R9 SMT resistor 100R R5 SMT resistor N.M. R10,R12 SMT resistor 1K Reference CN1,CN2,CN3 C25 C26,C27 D1,D3 D2 D10 DB4268 - Rev 1 page 4/12 EVALSTGAP2HSCM Bill of material Description Value / Generic Part Number R11,R13 SMT resistor 0R R14,R16 SMT resistor 10M R15 SMT resistor 240R Test point - PCB 1.5 mm diameter T POINT R THT ring test point TPTH-ANELLO-1MM T1,T2 Common mode choke, SMD 4.7x4.5 mm N.M. U1,U2 Galvanically isolated 4 A single gate driver STGAP2HSCM U3,U4 5.2KVDC isolated 2W gate drive DC-DC converters MGJ2D051509SC VP2 PCB assembly version solder dot Full VP1,VP3,VP4 PCB assembly version solder dot Empty Reference TP1,TP2,TP3,TP4,TP5,TP6,TP7,TP8, TP11,TP13,TP14,TP15,TP16,TP17 TP9,TP10,TP12 P.C.B. EVALSTGAP2HS Rev.1 DB4268 - Rev 1 page 5/12 EVALSTGAP2HSCM Layout and component placements 3 Layout and component placements Figure 3. EVALSTGAP2HSCM – Layout (component placement top view) Figure 4. EVALSTGAP2HSCM – Layout (component placement bottom view) DB4268 - Rev 1 page 6/12 EVALSTGAP2HSCM Layout and component placements Figure 5. EVALSTGAP2HSCM – Layout (top layer) Figure 6. EVALSTGAP2HSCM – Layout (bottom layer) DB4268 - Rev 1 page 7/12 EVALSTGAP2HSCM Revision history Table 2. Document revision history DB4268 - Rev 1 Date Version 08-Sep-2020 1 Changes Initial release. page 8/12 EVALSTGAP2HSCM Contents Contents 1 Schematic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4 3 Layout and component placements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 List of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 List of figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 DB4268 - Rev 1 page 9/12 EVALSTGAP2HSCM List of tables List of tables Table 1. Table 2. Bill of Material – components common to all device variants . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 DB4268 - Rev 1 page 10/12 EVALSTGAP2HSCM List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. DB4268 - Rev 1 EVALSTGAP2HSCM circuit schematic – gate drivers . . . . . . . . . . . . . . . . EVALSTGAP2HSCM circuit schematic – supply, connectors and decoupling EVALSTGAP2HSCM – Layout (component placement top view) . . . . . . . . . EVALSTGAP2HSCM – Layout (component placement bottom view) . . . . . . EVALSTGAP2HSCM – Layout (top layer). . . . . . . . . . . . . . . . . . . . . . . . . EVALSTGAP2HSCM – Layout (bottom layer) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 3 6 6 7 7 page 11/12 EVALSTGAP2HSCM IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. 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