EVALSTGAP2SCM

EVALSTGAP2SCM Demonstration board for STGAP2SCM isolated 4 A single gate driver Data brief Description The STGAP2SCM is an isolated single gate driver. The gate driver is characterized by 4 A current capability and rail-to-rail outputs, making the device suitable also for high power inverter applications such as motor drivers in industrial applications equipped with MOSFET/IGBT/SiC power switch. Two different variants are available: one with separated source and sink outputs, the other with single output pin and a dedicated pin for Miller clamp function. The EVALSTGAP2S is suitable for both output configuration variants. The device integrates protection functions: UVLO and thermal shutdown are included to simplify the design of high reliability systems. Dual input pins allow choosing the control signal polarity and also implementing HW interlocking protection in order to avoid cross-conduction in case of controller malfunction. Features  High voltage rail up to 1700 V  Driver current capability: – 4 A source/sink at 25 °C  Separate sink and source for simplified gate driving configuration (STGAP2SM)  4 A Miller clamp (STGAP2SCM)  Short propagation delay: 100 ns The device allows the implementation of negative gate driving, and the on-board isolated DC-DC converters allow working with optimized driving voltage for MOSFET/IGBT or SiC. The EVALSTGAP2S board allows evaluating all the STGAP2SCM features while driving a halfbridge power stage with voltage rating up to 1700 V in TO-220 or TO-247 package.  UVLO function  Gate driving voltage up to 26 V  Negative gate driving  On-board isolated DC-DC converters to supply gate drivers, fed by VAUX = 5 V  VDD logic supply local 3.3 V or VAUX  3.3 V, 5 V TTL/CMOS inputs with hysteresis  Easy jumper selection of driving voltage configuration: – +15/0 V; +15/-3 V; +19/0 V; +19/-3 V The board facilitates the selection and modification of the values of relevant external components in order to ease driver's performance evaluation under different applicative conditions and fine pre-tuning of final application components.  Temperature shutdown protection November 2018 DocID031781 Rev 2 For further information contact your local STMicroelectronics sales office. 1/12 www.st.com Contents EVALSTGAP2SCM Contents 1 Schematic diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Bill of material . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Layout and component placements . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2/12 DocID031781 Rev 2 EVALSTGAP2SCM 1 Schematic diagrams Schematic diagrams Figure 1. EVALSTGAP2SM schematic - gate driver with separate outputs (STGAP2SM) $/   )7 $ 7%% 3 $@*/) 3 3 */)  3 */)  $  $ 7)@) 6  $@*/) 3 ()  3 7%% 7) */ (0/ */ (0'' (/% Q'7 Q'7 (/%*40 $  O'
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NN 3   . $ ". DocID031781 Rev 2 5/12 12 Bill of material 2 EVALSTGAP2SCM Bill of material Table 1. Bill of material Part value Part reference Part description EVALSTGAP2SM EVALSTGAP2SCM CN3, CN5, CN6 TE 928814-1 FASTON 6.35 mm TAB C1 N.M. Film capacitor, 27.5 mm pitch C2 33 nF / 1.25 kV Film capacitor, 15 mm pitch C3, C5, C8, C16 100 nF / 50 V Ceramic capacitor, SMT 0603 C6, C10 N.M. Ceramic capacitor, SMT 0805 C7 4.7 μF / 16 V Ceramic capacitor, SMT 0603 C11 10 μF / 25 V Ceramic capacitor, SMT 0805 C12, C13, C14, C15 220 pF / 25 V Ceramic capacitor, SMT 0603 C17, C18, C20, C21 1 μF / 50 V Ceramic capacitor, SMT 0805 C19, C23 N.M. Ceramic capacitor, SMT 0603 C22, C26 4.7 μF / 50 V Ceramic capacitor, SMT 1206 C27, C28, C29, C31, C32, C33 1 μF / 50 V Ceramic capacitor, SMT 0603 C34, C35 N.M. Ceramic capacitor, SMT 1812 C36 N.M. Electrolytic capacitor diam. 22 mm, pitch 7.5/10 mm D1, D7 BZT585B2V7T Zener diode 2.7 V, SOD-523 D2 MMSZ3V3T1G Zener diode 3.3 V, SOD-123 D3 STTH112A HV ultrafast diode 1200 V, 1 A, SMA D4, D5 STPS2L40ZFY Schottky diode 40 V, 2 A, SOD-123 D8, D10 BZT585B20T Zener diode 20 V, SOD-523 D11, D13 BZT585B16T FB1, FB2, FB3, FB4 BLM21AG471SN1 Ferrite Bead 470 , SMT 0805 JP1, JP5, JP6, JP12, JP15, JP17, JP18, JP20 CLOSED SMT jumper JP7, JP13, JP14, JP16, JP21 OPEN SMT jumper 6/12 Zener diode 16 V, SOD-523 JP9, JP11 CLOSED OPEN SMT jumper JP8, JP10 OPEN CLOSED SMT jumper JP22 CLOSED 2-3 SMT jumper J1, J2 N.M. Connector header block T.H. 2 POS 5.08 mm J9 PIN strip Strip connector header 7 POS 2.54 mm DocID031781 Rev 2 EVALSTGAP2SCM Bill of material Table 1. Bill of material (continued) Part value Part reference Part description EVALSTGAP2SM EVALSTGAP2SCM J10 WE 691243110007 or similar Connector header block T.H. 6 POS 3.5 mm Q1, Q2 To be selected by customer N-channel IGBT or MOSFET up to 1700 V TO-247 (or TO-220) Q5, Q6 BCX56 Transistor NPN, SOT-89 R1, R5 22  Chip resistor, SMT 1210 R2, R4 2.2  Chip resistor, SMT 1210 R3 N.M. Chip resistor, SMT 1206 R8, R9, R10, R11 100  Chip resistor, SMT 0603 R13, R15 0 Chip resistor, SMT 0603 R17 240  Chip resistor, SMT 0805 R19, R22 1 k Chip resistor, SMT 0603 R23, R24 10 M Chip resistor, SMT 1206 TP4, TP8, TP9 Test point Loop test point, THT TP10, TP11, TP12, TP13, TP14, TP15, TP16, TP17, TP18, TP19, TP20, TP21, TP22, TP23 Test point Pad test point, SMD T1, T2 N.M. Common mode choke TDK ACM4520, SMD 4.7 x 4.5 mm U5, U6 MGJ2D051509SC 5 V to +15/-9 V Isolated DC-DC converter, Murata U1, U2 STGAP2SM STGAP2SCM DocID031781 Rev 2 Isolated 4 A single gate driver, SO8 7/12 12 Layout and component placements 3 EVALSTGAP2SCM Layout and component placements Figure 4. EVALSTGAP2SCM - layout (component placement top view) ". 8/12 DocID031781 Rev 2 EVALSTGAP2SCM Layout and component placements Figure 5. EVALSTGAP2SCM - layout (component placement bottom view) ". DocID031781 Rev 2 9/12 12 Layout and component placements EVALSTGAP2SCM Figure 6. EVALSTGAP2SCM - layout (top layer) ". Figure 7. EVALSTGAP2SCM - layout (bottom layer) ". 10/12 DocID031781 Rev 2 EVALSTGAP2SCM 4 Revision history Revision history Table 2. Document revision history Date Revision Changes 13-Apr-2018 1 Initial release. 7-Nov-2018 2 Updated cover image and Table 1 (Bill of material) DocID031781 Rev 2 11/12 12 EVALSTGAP2SCM IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2018 STMicroelectronics – All rights reserved 12/12 DocID031781 Rev 2