EVL62XX-MAIN,EVL62XX-PLUG
Data brief
Evaluation kit environment for L62xx family of dual brush DC and stepper motor
drivers based on STM32 Nucleo
Features
•
•
•
•
•
•
•
Voltage range from 8 V to 52 V
Phase current up to 2.8 A r.m.s (with L6205, L6206, L6207 and L6208 devices)
or 1.4 A r.m.s. (with L6225, L6226, L6227 and L6228 devices)
Easy interchangeable plug-in boards for quick evaluation of the whole stepper
and brush DC drivers of the L62xx family
Programmable high-side overcurrent protection (L6206 and L6226 devices)
Programmable OFF-time of the PWM current control (L6207, L6227, L6208 and
L6228 devices)
Compatible with Arduino UNO R3 connector
RoHS compliant
Description
The EVL62XX-MAIN is an expansion board that can host small EVL62XX-PLUG
plug-in boards for quick and easy evaluation of brush DC and stepper motor drivers
of the L62xx family.
These boards provide an affordable and easy-to-use solution to drive dual brush
DC and bipolar stepper motors in association with the evaluation software STSPIN
Studio.
The EVL62XX-MAIN is compatible with the Arduino UNO R3 connector.
Product status link
EVL62XX-MAIN
EVL6205-PLUG
EVL6206-PLUG
EVL6207-PLUG
EVL6208-PLUG
EVL6225-PLUG
EVL6226-PLUG
EVL6227-PLUG
EVL6228-PLUG
DB4485 - Rev 1 - July 2021
For further information contact your local STMicroelectronics sales office.
www.st.com
EVL62XX-MAIN,EVL62XX-PLUG
Schematic diagrams
1
Schematic diagrams
Figure 1. EVL62XX-MAIN
FID1
FID40RD_80RD
FID2
VDD
ST
VDD
FID40RD_80RD
FID3
NP
FDV302P
FOR EVALUATION PURPOSE ONLY
2
1
3
D5
Gre e n
R15
330R
D6
Re d
TP 1 GND
VDD
1
1
1
2
3
4
5
6
7
8
Vin
TP 2
VS
J1
CON-1x8
S TRIP 254P -F-8
OUT2A
CN8
R18 0R
R19 0R
R20 0R
R21 0R
PA0_TIM2_CH1
PA1_TIM2_CH2
IN1A
IN2A
ADC-4_S ENS EB
VREFB
PB0_TIM3_CH3
PA4_ADC1_4
RES ET
R3
4.7K
VREFA
C9
NP
R4
C5
68NF
2.2K
CON-1x6
S TRIP 254P -F-6
IN1A/CLOCK
IN1A
ADC-6_S ENS EA
OUT1A
CN9
1
2
3
4
5
6
7
8
R17
10k
2
2
R16
330R
D7
Re d
CN6
1
2
3
4
5
6
FID40RD_80RD
FDV302P
FAULTB
1
ROHS COMPLIANT 2002/95/IEC & LOGO
VS
NP
2
FAULTA
Q1
1
& LOGO
R32
3
NUCLEO
Q2
2
R31
ENA
FAULTA
IN2B
IN1B
VREFA
R23 0R
R22 0R
R24 0R
R25 0R
R26 0R
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
8-50V
+ C1
R7 10K
P ROGCLA
IN2A/CW _CCW
RCA
100K R1
Vin
2
GND
CN3
CN1
ENA
1
OUT2A
OUT1A
OUT1A
OUT1B
PROGCLA
OUT2B
C7
820P F
R9
200K
1
TP 3
FAULTA
C3
5.6NF
IN2A
GND
100UF
63V
100NF
A-
2
A+
3
B+
4
B-
RCA
BS E-020-01-F-D-A-TR
PA10
PB3
PB5_TIM3_CH2
PB4_TIM3_CH1
PB10_TIM2_CH3
C2
OUT2A
CN2
RS 805-1699 2.1/2.5mm
1
2
Vin
3
GND
PB6
PA7
2
2
J2
ADC-6_S ENS EA
PA6_ADC1_6
OUT2B
C10
NP
R5
4.7K
VREFB
CON-1x10
R6
C11
68NF
2.2K
IN1B/CONTROL
IN1B
ADC-4_S ENS EB
OUT1B
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
OUT2B
R11
10K
R8 10K
P ROGCLB
IN2B/HALF_FULL
RCB
OUT1B
R10
200K
100K R2
1
PA9
FAULTB
ENB
YELLOW YELLOW
D3
D4
R12
10K
1
RES ET
1
R27 0R
R28 0R
R29 0R
R30 0R
YELLOW YELLOW
D1
D2
1
1
2
3
4
5
6
7
8
9
10
2
VS
2
CON-1x8
CN5
R13
10K
R14
10K
FAULTB
ENB
C4
5.6NF
IN2B
PROGCLB
C8
820P F
RCB
BS E-020-01-F-D-A-TR
Figure 2. EVL6205-PLUG
VS
C3
D1
BAR43
OUT2A
1
3
2
J1
220NF
C1
10NF
R19
100R
IN1A
S ENS EA
VS
OUT1A
6
7
14
15
1
2
IN1B
IN2B
2
2
J7
2
J6
IN1A
IN2A
IN1B
IN2B
VBOOT
VCP
VS A
VS B
ENA
ENB
OUT1A
OUT1B
OUT2A
OUT2B
S ENS EA
S ENS EB
GND
GND
GND
GND
GND
J5
J8
5
16
1
10
11
20
21
1
1
1
IN1A
IN2A
C2100NF
U1
L6205P D
17
4
2
19
ENA
ENB
TP 4
OUT1ATP 5
9
12
3
18
OUT1B
OUT2A
ENA
IN2A
OUT1A
BTE-020-01-F-D-A-TR
OUT2B TP 6
TP 7
8
13
R1
0R
R3
R2 0R
NP
VS
R4
NP
J2
S ENS EA
OUT2B
C5
NP
S ENS EB
IN1B
S ENS EB
FID40RD_80RD
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
OUT2A
C4
NP
FID1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
OUT1B
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
OUT2B
ENB
IN2B
OUT1B
FID2
BTE-020-01-F-D-A-TR
FID40RD_80RD
FID3
FID40RD_80RD
DB4485 - Rev 1
page 2/8
EVL62XX-MAIN,EVL62XX-PLUG
Schematic diagrams
Figure 3. EVL6206-PLUG
VS
J1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
OUT2A
C3
D1
BAR43
ENA_RS T
R9
VREFA_P CA R8
1
NP
NP
3
2
220NF
IN1A_CLOCK
S ENS EA
C1
10NF
OUT1A
R19
100R
OCDA_RCA
OCDB_RCB
13
24
R4
NP
4
33
R3
R2
NP
VCP
VBOOT
VS A
VS B
R1
0R
S ENS EA
0R
S ENS EB
1
18
19
36
FID1
FID40RD_80RD
FID2
OUT1A
FID40RD_80RD
FID3
FID40RD_80RD
FID5
J2
25
SENSEB
R18
NP
R17
NP
NP
IN2A_C/CCW
OCDA_RCA
FID40RD_80RD
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
OUT2B
12
SENSEA
GND
GND
GND
GND
R16
NP
32
OUT2B
IN1B_VREFB
VREFB_CTRL_P CB
ENA_RS T
VREFA_P CA
VS
C5
NP
2
3
6
14
16
17
20
21
23
31
34
35
37
VREFA_P CA
22
OUT1B
OCDA
OCDB
R7
0R
0R
FID4
OUT1A
TP 5
OUT2A
TP 6
OUT1B
TP 7
OUT2B
5
OUT2A
U1
L6206P D
PROGCLA
PROGCLB
R5
R6
TP 4
15
OUT1A
IN1A
IN2A
IN1B
IN2B
VREFA_P CA
9
VREFB_CTRL_P CB28
2
J6
7
30
2
2
1
2
2
IN1B_VREFB
IN2B_HALFFULL
ENA
ENB
10
11
26
27
J7
OUT2A
BTE-020-01-F-D-A-TR
C2
100NF
NC#2
NC#3
NC#6
NC#14
NC#16
NC#17
NC#20
NC#21
NC#23
NC#31
NC#34
NC#35
NC#37
1
1
1
1
J5
J8
J9
2
8
29
1
IN1A_CLOCK
IN2A_C/CCW
J 10
VS
C6
NP
ENA_RS T
ENB_ENABLE
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
C4
NP
IN1B_VREFB
R15 NP
VREFB_CTRL_P CB R14 NP
IN1B_VREFB
R13 0R
VREFB_CTRL_P CB R12 NP
S ENS EB
OUT1B
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
FID40RD_80RD
OUT2B
FID6
FID40RD_80RD
R10 0R
ENB_ENABLE
VREFB_CTRL_P CB
R11 NP
IN2B_HALFFULL
OCDB_RCB
OUT1B
BTE-020-01-F-D-A-TR
Figure 4. EVL6207-PLUG
VS
J1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
OUT2A
C3
D1
BAR43
ENA_RS T
R9
VREFA_P CA R8
1
NP
0R
3
2
220NF
IN1A_CLOCK
S ENS EA
C1
10NF
OUT1A
R19
100R
C6
NP
2
1
2
2
10
11
26
27
J7
2
IN1B_VREFB
IN2B_HALFFULL
VREFA_P CA
9
VREFB_CTRL_P CB28
2
J6
OCDA_RCA
OCDB_RCB
4
33
VS A
VS B
OUT2B
SENSEA
15
TP 5
5
TP 6
22
TP 7
32
ENA_RS T
VREFA_P CA
IN2A_C/CCW
OCDA_RCA
OUT1A
VS
OUT2A
OUT1B
J2
OUT2B
12
25
R4
0R
R3
R2
0R
R1
0R2
S ENS EA
0R2
S ENS EB
2
3
6
14
16
17
20
21
23
31
34
35
37
IN1B_VREFB
R15 NP
VREFB_CTRL_P CB R14 0R
IN1B_VREFB
R13 0R
VREFB_CTRL_P CB R12 NP
S ENS EB
C5
NP
C4
NP
FID1
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
OUT2B
R18
NP
R17
NP
0R
NP
0R
OUT1A
IN1B_VREFB
VREFB_CTRL_P CB
R16
NP
OUT1B
SENSEB
1
18
19
36
VREFA_P CA
VCP
VBOOT
OUT2A
RCA
RCB
R5
R6
R7
BTE-020-01-F-D-A-TR
C2
100NF
U1
L6207P D
VREFA
VREFB
OUT2A
TP 4
OUT1A
IN1A
IN2A
IN1B
IN2B
GND
GND
GND
GND
13
24
ENA
ENB
NC#2
NC#3
NC#6
NC#14
NC#16
NC#17
NC#20
NC#21
NC#23
NC#31
NC#34
NC#35
NC#37
1
1
1
1
J5
J8
J9
2
8
29
1
IN1A_CLOCK
IN2A_C/CCW
7
30
ENA_RS T
ENB_ENABLE
J 10
VS
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
OUT1B
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
OUT2B
FID40RD_80RD
R10 NP
ENB_ENABLE
VREFB_CTRL_P CB
FID40RD_80RD
R11 0R
IN2B_HALFFULL
OCDB_RCB
FID2
FID3
FID40RD_80RD
OUT1B
BTE-020-01-F-D-A-TR
Figure 5. EVL6208-PLUG
VS
J1
C3
D1
BAR43
1
ENA_RS T
R9
VREFA_P CA R8
0R
0R
3
2
OUT2A
220NF
IN1A_CLOCK
S ENS EA
C1
10NF
OUT1A
R19
100R
2
1
VREFA_P CA
IN1B_VREFB
9
26
2
OCDA_RCA
OCDB_RCB
RCA
RCB
R16
NP
VREFB_CTRL_P CB
R17
NP
R18
NP
4
33
VS A
VS B
FID1
NP
NP
ENA_RS T
VREFA_P CA
FID40RD_80RD
R7
0R
IN2A_C/CCW
OCDA_RCA
FID2
OUT1A
FID40RD_80RD
FID3
FID40RD_80RD
BTE-020-01-F-D-A-TR
C2
100NF
OUT1A
OUT2A
U1
L6208P D
OUT2A
R5
R6
OUT1B
OUT2B
SENSEA
SENSEB
TP 5
5
TP 6
22
TP 7
32
OUT1A
VS
OUT2A
OUT1B
J2
OUT2B
OUT2B
12
25
R3
R1
R2
0R
R4
0R
0R2
S ENS EA
0R2
S ENS EB
IN1B_VREFB
1
18
19
36
VREFA_P CA
VCP
VBOOT
VREFA
VREFB
GND
GND
GND
GND
13
24
CLOCK
CW/CCW
CONTROL
HALF/FULL
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
TP 4
15
2
3
6
14
16
17
20
21
23
31
34
35
37
J6
RESET
EN
NC#2
NC#3
NC#6
NC#14
NC#16
NC#17
NC#20
NC#21
NC#23
NC#31
NC#34
NC#35
NC#37
1
1
2
2
10
11
28
27
J7
VREFB_CTRL_P CB
IN2B_HALFFULL
2
1
1
J5
J8
J9
2
8
29
1
IN1A_CLOCK
IN2A_C/CCW
7
30
ENA_RS T
ENB_ENABLE
J 10
VS
C6
100NF
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
C4
NP
C5
NP
IN1B_VREFB
R15 0R
VREFB_CTRL_P CB R14 NP
IN1B_VREFB
R13 NP
VREFB_CTRL_P CB R12 0R
S ENS EB
OUT1B
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
OUT2B
R10 NP
ENB_ENABLE
VREFB_CTRL_P CB
R11 0R
IN2B_HALFFULL
OCDB_RCB
OUT1B
BTE-020-01-F-D-A-TR
DB4485 - Rev 1
page 3/8
EVL62XX-MAIN,EVL62XX-PLUG
Schematic diagrams
Figure 6. EVL6225-PLUG
VS
C3
J1
BAR43
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
OUT2A
1
3
2
D1
220NF
C1
10NF
IN1A
S ENS EA
R19
0R
VS
J5
J8
6
7
14
15
2
1
IN1B
IN2B
2
2
J7
VBOOT
VCP
VS A
VS B
1
1
1
5
16
ENA
ENB
IN1A
IN2A
IN1B
IN2B
2
TP 5
TP 7OUT2B
R3
R1
0R
IN2A
OUT1A
VS
J2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
S ENS EA
OUT2B
C5
NP
C4
NP
ENA
TP 6
R4
NP
R2 0R
NP
OUT2A
BTE-020-01-F-D-A-TR
OUT1B
OUT2A
8
13
S ENS EA
S ENS EB
1
10
11
20
21
J6
9
12
3
18
OUT1A
OUT1B
OUT2A
OUT2B
GND
GND
GND
GND
GND
IN1A
IN2A
C2
100NF
TP 4
OUT1A
U1
L6225P D
17
4
2
19
ENA
ENB
OUT1A
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
S ENS EB
IN1B
S ENS EB
FID1
OUT1B
FID40RD_80RD
FID2
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
OUT2B
ENB
IN2B
OUT1B
BTE-020-01-F-D-A-TR
FID40RD_80RD
FID3
FID40RD_80RD
Figure 7. EVL6226-PLUG
VS
J1
C3
D1
BAR43
1
ENA_RS T
R9
VREFA_P CA R8
NP
NP
3
2
OUT2A
220NF
IN1A_CLOCK
S ENS EA
C1
10NF
OUT1A
R19
0R
C6
NP
2
2
VREFA_P CA
9
VREFB_CTRL_P CB28
2
OCDA_RCA
OCDB_RCB
IN1A
IN2A
IN1B
IN2B
PROGCLA
PROGCLB
OCDA
OCDB
R16
NP
R17
NP
VS A
VS B
4
33
7
OUT1A
OUT2A
U1
L6226P D
OUT1B
OUT2B
SENSEA
SENSEB
15
TP 5
5
0R
0R
ENA_RS T
VREFA_P CA
R7
NP
IN2A_C/CCW
OCDA_RCA
OUT1A
FID1
FID40RD_80RD
R18
NP
FID40RD_80RD
TP 6
FID3
22
TP 7
32
OUT1A
VS
OUT2A
OUT1B
OUT2B
25
R3
R1
R2
NP
R4
NP
0R
S ENS EA
0R
S ENS EB
C4
NP
FID40RD_80RD
J2
OUT2B
12
IN1B_VREFB
1
18
19
36
VREFB_CTRL_P CB
VCP
VBOOT
ENA
ENB
GND
GND
GND
GND
13
24
VREFA_P CA
R5
R6
BTE-020-01-F-D-A-TR
C2
100NF
2
3
6
14
16
17
20
21
23
31
34
35
37
J6
OUT2A
TP 4
NC#2
NC#3
NC#6
NC#14
NC#16
NC#17
NC#20
NC#21
NC#23
NC#31
NC#34
NC#35
NC#37
10
11
26
27
J7
1
IN1B_VREFB
IN2B_HALFFULL
2
2
1
1
1
1
J5
J8
J9
2
8
29
1
IN1A_CLOCK
IN2A_C/CCW
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
FID2
30
ENA_RS T
ENB_ENABLE
J 10
VS
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
C5
NP
IN1B_VREFB
R15 NP
VREFB_CTRL_P CB R14 NP
IN1B_VREFB
R13 0R
VREFB_CTRL_P CB R12 NP
S ENS EB
OUT1B
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
OUT2B
R10 0R
ENB_ENABLE
VREFB_CTRL_P CB
R11 NP
IN2B_HALFFULL
OCDB_RCB
OUT1B
BTE-020-01-F-D-A-TR
DB4485 - Rev 1
page 4/8
EVL62XX-MAIN,EVL62XX-PLUG
Schematic diagrams
Figure 8. EVL6227-PLUG
VS
J1
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
OUT2A
C3
D1
BAR43
ENA_RS T
R9
VREFA_P CA R8
1
NP
0R
3
2
220NF
IN1A_CLOCK
S ENS EA
C1
10NF
OUT1A
R19
0R
VREFA_P CA
9
VREFB_CTRL_P CB28
2
J6
OCDA_RCA
OCDB_RCB
4
33
OUT1B
OUT2B
SENSEA
RCA
RCB
SENSEB
15
TP 5
5
TP 6
22
TP 7
32
ENA_RS T
VREFA_P CA
R7
0R
IN2A_C/CCW
OCDA_RCA
FID1
OUT1A
FID40RD_80RD
FID2
FID40RD_80RD
FID3
FID40RD_80RD
VS
OUT2A
OUT1B
J2
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
OUT2B
OUT2B
12
25
R4
0R
R3
R2
0R
R1
0R2
S ENS EA
0R2
S ENS EB
C4
NP
IN1B_VREFB
R15 NP
VREFB_CTRL_P CB R14 0R
IN1B_VREFB
R13 0R
VREFB_CTRL_P CB R12 NP
S ENS EB
C5
NP
2
3
6
14
16
17
20
21
23
31
34
35
37
R18
NP
R17
2.2K
0R
NP
OUT1A
IN1B_VREFB
VREFB_CTRL_P CB
R16
2.2K
VS A
VS B
OUT2A
VREFA
VREFB
R5
R6
TP 4
OUT1A
U1
L6227P D
1
18
19
36
VREFA_P CA
VCP
VBOOT
IN1A
IN2A
IN1B
IN2B
GND
GND
GND
GND
13
24
7
30
2
1
2
2
10
11
26
27
J7
ENA
ENB
OUT2A
BTE-020-01-F-D-A-TR
C2
100NF
NC#2
NC#3
NC#6
NC#14
NC#16
NC#17
NC#20
NC#21
NC#23
NC#31
NC#34
NC#35
NC#37
1
1
J8
IN1B_VREFB
IN2B_HALFFULL
2
1
1
J5
J9
2
8
29
1
IN1A_CLOCK
IN2A_C/CCW
J 10
VS
C6
NP
ENA_RS T
ENB_ENABLE
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
OUT1B
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
OUT2B
R10 NP
ENB_ENABLE
VREFB_CTRL_P CB
R11 0R
IN2B_HALFFULL
OCDB_RCB
OUT1B
BTE-020-01-F-D-A-TR
Figure 9. EVL6228-PLUG
VS
J1
C3
D1
BAR43
1
ENA_RS T
R9
VREFA_P CA R8
0R
0R
3
2
OUT2A
220NF
IN1A_CLOCK
S ENS EA
C1
10NF
OUT1A
R19
0R
9
26
OCDA_RCA
OCDB_RCB
RCA
RCB
R16
2.2K
VREFB_CTRL_P CB
R17
NP
4
33
VS A
VS B
OUT2A
U1
L6228P D
OUT1B
OUT2B
SENSEA
SENSEB
15
R18
2.2K
R5
R6
NP
NP
ENA_RS T
VREFA_P CA
R7
0R
IN2A_C/CCW
OCDA_RCA
TP 5
5
TP 6
22
TP 7
32
FID40RD_80RD
FID2
FID40RD_80RD
FID3
FID40RD_80RD
VS
OUT2A
OUT1B
J2
OUT2B
OUT2B
12
25
R3
R1
R2
0R
R4
0R
0R2
S ENS EA
0R2
S ENS EB
C4
NP
FID1
OUT1A
OUT1A
IN1B_VREFB
1
18
19
36
VREFA_P CA
VCP
VBOOT
VREFA
VREFB
GND
GND
GND
GND
13
24
7
30
2
1
VREFA_P CA
IN1B_VREFB
2
J6
CLOCK
CW/CCW
CONTROL
HALF/FULL
OUT2A
TP 4
OUT1A
NC#2
NC#3
NC#6
NC#14
NC#16
NC#17
NC#20
NC#21
NC#23
NC#31
NC#34
NC#35
NC#37
10
11
28
27
J7
RESET
EN
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
BTE-020-01-F-D-A-TR
C2
100NF
2
3
6
14
16
17
20
21
23
31
34
35
37
1
2
2
1
J8
VREFB_CTRL_P CB
IN2B_HALFFULL
2
1
1
J5
J9
2
8
29
1
IN1A_CLOCK
IN2A_C/CCW
J 10
VS
C6
100NF
ENA_RS T
ENB_ENABLE
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
C5
NP
IN1B_VREFB
R15 0R
VREFB_CTRL_P CB R14 NP
IN1B_VREFB
R13 NP
VREFB_CTRL_P CB R12 0R
S ENS EB
OUT1B
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
OUT2B
R10 NP
ENB_ENABLE
VREFB_CTRL_P CB
R11 0R
IN2B_HALFFULL
OCDB_RCB
OUT1B
BTE-020-01-F-D-A-TR
DB4485 - Rev 1
page 5/8
EVL62XX-MAIN,EVL62XX-PLUG
Revision history
Table 1. Document revision history
DB4485 - Rev 1
Date
Version
01-Jul-2021
1
Changes
Initial release.
page 6/8
EVL62XX-MAIN,EVL62XX-PLUG
Contents
Contents
1
Schematic diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
DB4485 - Rev 1
page 7/8
EVL62XX-MAIN,EVL62XX-PLUG
IMPORTANT NOTICE – PLEASE READ CAREFULLY
STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST
products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST
products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement.
Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of
Purchasers’ products.
No license, express or implied, to any intellectual property right is granted by ST herein.
Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service
names are the property of their respective owners.
Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2021 STMicroelectronics – All rights reserved
DB4485 - Rev 1
page 8/8
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