EVLVIP26H-12WFN

VIPER26 Datasheet Fixed frequency VIPer plus family Features • • • • DIP-7 S O16 narrow – DC Output Voltage DC Input Voltage DRAIN VDD • • COMP VIPER26 GND LIM FB 800 V avalanche rugged power MOSFET allowing wide range VAC input range to be covered Embedded HV startup and sense-FET Current mode PWM controller Minimized system input power consumption: – Less than 30 mW @ 230 VAC in no-load condition • • • • Less than 400 mW @ 230 VAC with 250 mW load Limiting current with adjustable set point Jittered switching frequency to reduce the EMI filter cost: – 60 kHz ±4 kHz (L type) – 115 kHz ±8 kHz (H type) Embedded error amplifier Hysteretic thermal shutdown Built-in soft-start for improved system reliability Protections with automatic restart: overload/short-circuit (OLP), feedback loop disconnection Application Product status link VIPER26 • • • • Auxiliary power supply for appliances Power metering LED drivers SMPS for set-top boxes, DVD players and recorders Product label Description The VIPER26 device is a smart high voltage converter that integrates an 800 V avalanche-rugged power MOSFET with PWM current mode control. The power MOSFET with 800 V breakdown voltage allows an extended input voltage range to be applied, as well as the size of the DRAIN snubber circuit to be reduced. This IC meets the most stringent energy-saving standards with very low consumption and burst mode operation under light load. The design of flyback, buck and buck boost converters is supported. The integrated HV startup, sense-FET, error amplifier and oscillator with jitter allow complete application designs with a minimum number of components. DS6901 - Rev 3 - October 2020 For further information contact your local STMicroelectronics sales office. www.st.com VIPER26 Pin settings 1 Pin settings Figure 1. Connection diagram (top view) DIP7 SO16N 16 DRAIN DRAIN N.C. DRAIN N.A. DRAIN VDD N.C. LIM N.C. FB N.C. COMP N.C. GND VDD 8 GND 1 Note: 1 GND DRAIN DRAIN LIM FB COMP The copper area for heat dissipation has to be designed under the DRAIN pins. Table 1. Pin descriptions Pin number DIP7 SO16N Function 1 1-2 GND Ground and MOSFET source. Connection of the source of the internal MOSFET and controller ground reference. - 3 N.C. Not connected. This pin can be soldered to GND. - 4 N. A. Not available for user. This pin is mechanically connected to the controller die pad of the frame. In order to improve noise immunity, it is highly recommended to connect it to GND (pin 1,2). VDD Controller Supply. An external storage capacitor has to be connected across this pin and GND. The pin, internally connected to the high voltage current source, provides the VDD capacitor charging current at startup and during fault conditions. A small bypass capacitor (0.1 μF typ.) in parallel, placed as close as possible to the IC, is also recommended for noise filtering purposes. 2 5 3 6 LIM Drain current limitation. This pin allows setting the drain current limitation to a lower value than the default IDlim value. The limit can be reduced by connecting an external resistor between this pin and GND. In case of high electrical noise, a capacitor may be connected between this pin and GND; the capacitor value must be lower than 470 nF in order to not impact the functionality of the pin. The pin can be left open if the default drain current limitation, IDlim, is used. 4 7 FB Direct feedback. It is the inverting input of the internal transconductance E/A, which is internally referenced to 3.3 V with respect to GND. In a non-isolated converter, the output voltage information is directly fed into the pin through a voltage divider. In primary regulation, the FB voltage divider is connected to the VCC. The E/A is disabled by soldering FB to GND. 5 8 - 9-12 7,8 DS6901 - Rev 3 Name 13-16 Compensation. It is the output of the internal E/A. A compensation network is placed between this pin and GND to achieve stability and good dynamic performance of the control loop. In case of COMP isolated secondary side regulation, the internal E/A must be disabled and the COMP directly driven by the optocoupler to control the DRAIN peak current setpoint. N.C. Not internally connected. These pins must be left floating in order to ensure a safe clearance distance. MOSFET drain. The internal high voltage current source sinks current from this pin to charge the VCC capacitor at startup. These pins are mechanically connected to the internal metal PAD of the DRAIN MOSFET in order to facilitate heat dissipation. On the PCB, the copper area must be placed under these pins in order to decrease the total junction-to-ambient thermal resistance, thus facilitating the power dissipation. page 2/34 VIPER26 Electrical and thermal ratings 2 Electrical and thermal ratings Table 2. Absolute maximum ratings Symbol Parameter Min. Max. Unit VDRAIN Drain-to- source (ground) voltage - 800 V IDRAIN Pulse drain current (limited by TJ = 150 °C) - 3 A VCOMP COMP voltage -0.3 3.5V V VFB FB voltage -0.3 4.8 V VLIM LIM voltage -0.3 2.4 V VDD Supply voltage -0.3 Self limited V IDD Input current -0.3 20 mA Power Dissipation @ Tamb < 40 °C (DIP7) - 1 W Power Dissipation @ Tamb < 60 °C (SO16N) - 1.5 W Junction Temperature operating range -40 150 °C Storage Temperature -55 150 °C PTOT TJ TSTG Table 3. Thermal data Symbol RTH-JC RTH-JA RTH-JC RTH-JA Parameter Max. value Unit SO16N DIP-7 10 10 °C/W 120 120 °C/W 5 5 °C/W 85 95 °C/W Thermal resistance junction to case(1) (Dissipated power = 1 W) Thermal resistance junction ambient (1) (Dissipated power = 1 W) Thermal resistance junction to case (2) (Dissipated power = 1 W) Thermal resistance junction ambient (2) (Dissipated power = 1 W) 1. When mounted on a standard, single side FR4 board with minimum copper area. 2. When mounted on a standard, single side FR4 board with 100 mm2 of Cu (35 µm thick). DS6901 - Rev 3 page 3/34 VIPER26 Electrical characteristics Figure 2. Rth versus area RthJA/(RthJA@A=100mm2) 1.500 1.375 SO16N DIP-7 1.250 1.125 1.000 0.875 0.750 0 25 50 *Copper tickness is 35 µm 75 100 125 150 175 200 225 A(mm2) Table 4. Avalanche characteristics Symbol 2.1 Parameter Min. Max. Unit EAV Repetitive avalanche energy (limited by TJ=150°C) - 5 mJ IAR Repetitive avalanche current (limited by TJ=150°C) - 1.5 A Electrical characteristics TJ = -40 to 125°C, VDD = 14 V (unless otherwise specified) Note: Adjust VDD above VDD on startup threshold before setting to 14 V Table 5. Power section Symbol Parameter VBVDSS Breakdown voltage IOFF RDS(on) OFF state drain current Static drain-source ON‑resistance Test condition Min. Typ. Max. Unit 800 - - V - - 60 µA IDRAIN = 0.2 A, TJ = 25°C - - 7 Ω IDRAIN = 0.2 A, TJ = 125°C - - 14 Ω IDRAIN = 1 mA, VCOMP = VGND, TJ = 25°C VDRAIN = max. rating, VCOMP = VGND, TJ = 25°C Table 6. Supply section Symbol Parameter Test condition Min. Typ. Max. Unit Voltage VDRAIN_START Drain-source start voltage IDDch1 DS6901 - Rev 3 Charging current during startup IDRAIN = 1 mA; VCOMP = GND; TJ = 25°C VDRAIN = 100 to 640 V; VDD = 4 V - - 90 V -0.6 - -1.8 mA page 4/34 VIPER26 Electrical characteristics Symbol IDDch2 VDD VDDclamp VDDon VDDCSon VDDoff Parameter Test condition Min. Typ. Max. Unit Charging current during autorestart VDRAIN = 100 to 640 V; VDD = 9 V falling edge Operating voltage range - VDD clamp voltage IDD = 15 mA; -7 - -13 mA 11.5 - 23.5 V 23.5 - - V 13 14 V VDD startup threshold - 12 VDD on internal high voltage current generator threshold - 9.5 VDD undervoltage shutdown threshold - 7 8 9 FOSC = 0 kHz; VCOMP = GND - - 0.6 VDRAIN = 120 V; VSW = 60 kHz - - 2 VDRAIN = 120 V; VSW = 115 kHz - - 3 10.5 11.5 V V Current IDD0 Operating supply current, not switching IDD1 Operating supply current, switching IDDoff Operating supply current with VDD < VDDoff VDD < VDDoff - - 0.35 IDDol Open loop failure current threshold VDD = VDDclamp; VCOMP = 3.3 V 4 - - mA Table 7. Controller section Symbol Parameter Test condition Min. Typ. Max. Unit Error amplifier VREF_FB IFB_PULL UP GM FB reference voltage - 3.2 3.3 3.4 V Pull-up current - - -1 - µA - 2 - mA/V - 0.5 - V Trans conductance VCOMP = 1.5 V, VFB > VFB REF Current setting (LIM) pin VLIM_LOW Low level clamp voltage ILIM = -100 µA Compensation (COMP) pin VCOMPH Upper saturation limit TJ = 25°C - 3 - V VCOMPL Burst mode threshold TJ = 25°C 1 1.1 1.2 V TJ = 25°C - 40 - mV - 3 - V/A VFB = GND - 15 - kΩ Source / sink current VFB > 100 mV - 150 - Max. source current VCOMP = GND; VFB = GND - 220 - ILIM = -10 µA; VCOMP = 3.3 V; TJ = 25 °C 0.66 0.7 0.74 A Soft-start time - - 8.5 - ms tON_MIN Minuimum turn-on time - - - 480 ns IDlim_bm Burst mode current limitation - 145 - mA - 50 - ms VCOMPL_HYS Burst mode hysteresis HCOMP ΔVCOMP/ΔIDRAIN RCOMP(DYN) Dynamic resistance ICOMP - µA Current limitation IDLIM tSS Drain current limitation VCOMP = VCOMPL Overload tOVL DS6901 - Rev 3 Overload time - page 5/34 VIPER26 Electrical characteristics Symbol Parameter tRESTART Restart time after fault Test condition Min. Typ. Max. - - 1 - VIPER26L 54 60 66 VIPER26H 103 115 127 FOSC = 60 kHz - ±4 - FOSC = 115 kHz - ±8 - Unit s Oscillator section FOSC Switching frequency kHz FD Modulation depth FM Modulation frequency - - 230 - Hz DMAX Maximum duty cycle - 70 - 80 % kHz Thermal shutdown DS6901 - Rev 3 TSD Thermal shutdown temperature threshold - 150 160 - °C THYS Thermal shutdown hysteresis - - 30 - °C page 6/34 VIPER26 Typical electrical characteristics 3 Typical electrical characteristics Figure 3. IDLIM vs. TJ Figure 4. FOSC vs. TJ IDLIM/ IDLIM@25C 2.00 FOSC/ FOSC@25C 2.00 1.80 1.80 1.60 1.60 1.40 1.40 1.20 1.20 1.00 1.00 0.80 0.80 0.60 0.60 0.40 0.40 0.20 0.20 0.00 0.00 -50 0 50 100 -50 150 Figure 5. VDRAIN_START vs. TJ 50 100 150 Figure 6. HCOMP vs. TJ VDRAIN_START/ VDRAIN_START@25C 2.00 0 HCOMP / HCOMP@25C 2.00 1.80 1.80 1.60 1.60 1.40 1.40 1.20 1.20 1.00 1.00 0.80 0.80 0.60 0.60 0.40 0.40 0.20 0.20 0.00 0.00 -50 -50 0 50 100 Figure 7. GM vs. TJ 50 100 150 Figure 8. VREF_FB vs. TJ GM / GM@25C 2.00 0 150 VREF_FB / VRE_FB@25C 2.00 1.80 1.80 1.60 1.60 1.40 1.40 1.20 1.20 1.00 1.00 0.80 0.80 0.60 0.60 0.40 0.40 0.20 0.20 0.00 0.00 -50 DS6901 - Rev 3 0 50 100 150 -50 0 50 100 150 page 7/34 VIPER26 Typical electrical characteristics Figure 9. ICOMP vs. TJ Figure 10. Operating supply current (no switching) vs TJ ICOMP / ICOMP@25C 2.00 IDD0 / IDD0@25C 2.00 1.80 1.80 1.60 1.60 1.40 1.40 1.20 1.20 1.00 1.00 0.80 0.80 0.60 0.60 0.40 0.40 0.20 0.20 0.00 0.00 -50 0 50 100 150 -50 0 Figure 11. Operating supply current (switching) vs TJ IDD1 / IDD1@25C 1.80 100 150 Figure 12. IDLIMvs. RLIM IDLIM/ IDLIM@100KOhm 1.20 2.00 50 1.00 1.60 1.40 0.80 1.20 0.60 1.00 0.80 0.40 0.60 0.40 0.20 0.20 0.00 0.00 -50 0 50 100 Figure 13. Power MOSFET on-resistance vs TJ RDSON/ RDSON@25C 5.00 0 150 40 60 80 100 120 Figure 14. Power MOSFET breakdown voltage vs TJ BVDSS/ BVDSS@25C 2.00 4.50 1.80 4.00 1.60 3.50 1.40 3.00 1.20 2.50 1.00 2.00 0.80 1.50 0.60 1.00 0.40 0.50 0.20 0.00 20 0.00 -50 DS6901 - Rev 3 0 50 100 150 -50 0 50 100 150 page 8/34 VIPER26 Typical electrical characteristics Figure 15. Power MOSFET capacitance variation vs VDS COSS [pF] 1000 100 10 1 0.1 1 10 100 1000 VDS [V] Figure 16. SOA SO16N package Figure 17. SOA DIP7 package When mounted on a standard single side FR4 board with 100 mm² of Cu (35μm thick) ID[A] When mounted on a standard single side FR4 board with 100 mm² of Cu (35μm thick) I [A] 1.0E+01 D 1.0E+01 1.0E+00 1.0E+00 1.0E-01 1.0E-01 1.0E-02 1.0E-03 is ea ar on) ( this ds in x R n a atio M er by Op ited lim 1.0E-02 1.0E-03 1us 10us 1.0E-04 1.0E-05 1.0E-07 1.0E-04 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 1.0E+02 1us 10us 1.0E-04 100us 100us 1ms 1ms 1.0E-05 1.0E-06 1.0E+03 1.0E+04 1.0E-07 1.0E-04 Ron Tj=150°C Tc=25°C Single pulse Ron Tj=150°C Tc=25°C Single pulse 1.0E-06 is ea ar on) ( this ds R n in ax io M at er by Op ited lim 1.0E-03 1.0E-02 1.0E-01 1.0E+00 1.0E+01 VDS[V] 1.0E+02 1.0E+03 1.0E+04 VDS[V] Figure 18. Thermal shutdown VDD VDDon VDDCSon VDDoff IDRAIN time TJ time TSD TSD - THYST Normal operation DS6901 - Rev 3 Shut down after over temperature Normal operation time page 9/34 VIPER26 Typical circuits 4 Typical circuits Figure 19. Buck converter (VOUT>VDDCSon) D2 D1 R1 L1 AC IN VIPer26 FB R3 DRAIN C6 CONTROL C1 C2 VDD COMP D4 GND LIM R4 R2 C3 C4 R6 (Optional) C5 AC IN L2 Vout C7 D3 C8 R5 GND Figure 20. Flyback converter (isolated) AC IN R1 L1 D3 C3 BR - R3 C6 + D1 D2 AC IN Vout C1 GND R2 C2 R5 C4 VIPer26 VDD FB DRAIN OPTO R6 R7 CONTROL LIM COMP GND C7 REF R4 (Optional) C5 OPTO R8 DS6901 - Rev 3 page 10/34 VIPER26 Typical circuits Figure 21. Flyback converter (primary regulation) AC IN R1 L1 D3 C3 BR - Vout R3 C7 + D1 C1 C2 D2 GND R2 AC IN C4 R4 VIPer26 VDD FB DRAIN CONTROL LIM COMP GND R5 C5 R6 (Optional) C6 R7 Figure 22. Flyback converter (non isolated, VOUT ≥ VDDCSon) AC IN R1 L1 D3 C3 BR - R2 + Vout C7 D1 D2 C1 GND C2 AC IN C4 R3 VIPer26 VDD FB DRAIN CONTROL LIM COMP GND R4 R5 (Optional) C5 C6 R6 DS6901 - Rev 3 page 11/34 VIPER26 Block diagram Figure 23. Flyback converter (non isolated, VOUT < VDDCSon) AC IN R1 L1 D3 C3 BR - Vout R3 C7 + D1 C1 C2 D2 GND R2 AC IN C4 R4 VIPer26 VDD FB DRAIN CONTROL LIM COMP GND R5 C5 R6 (Optional) C6 R7 4.1 Block diagram Figure 24. Block diagram VDD SOFT START SUPPLY & UVLO Internal Supply BUS & REFERENCE VOLTAGES IDLIM set-up LIM DRAIN HV_ON UVLO Oscillator IDDch THERMAL SHUTDOWN OTP VCOMPL BURST-MODE Logic + Burst OCP BURST TURN-ON LOGIC S LEB R Q + FB - VREF_FB E/A + PWM OLP LOGIC OTP RSENSE COMP DS6901 - Rev 3 GND page 12/34 VIPER26 Typical power 4.2 Typical power Table 8. VIPer26 typical power 230 VAC 85-265 VAC Adapter (1) Open Frame (2) Adapter (1) Open Frame (2) 18 W 20 W 10 W 12 W 1. Typical continuous power in non-ventilated enclosed adapter measured at 50°C ambient. 2. Maximum practical continuous power in an open frame design at 50°C ambient, with adequate heat sinking. DS6901 - Rev 3 page 13/34 VIPER26 Power section 5 Power section The power section is implemented with an n-channel power MOSFET with a breakdown voltage of 800 V min. and a typical RDS(on) of 7 Ω. It includes a SenseFET structure to allow virtually lossless current sensing and a thermal sensor. The gate driver of the power MOSFET is designed to supply a controlled gate current during turn ON and turn OFF in order to minimize common mode EMI. During UVLO conditions, an internal pull-down circuit holds the gate low in order to ensure that the power MOSFET cannot be turned ON accidentally. DS6901 - Rev 3 page 14/34 VIPER26 High-voltage current generator 6 High-voltage current generator The high voltage current generator is supplied by the DRAIN pin. On initial startup of the converter, it is enabled when the voltage across the input bulk capacitor reaches the VDRAIN_START threshold, sourcing the IDDch1 current (see Table 6. Supply section). As the VDD voltage reaches the VDDon start-up threshold, the power section starts switching and the high voltage current generator is turned OFF. The VIPer26 is powered by the external source. After the start-up, the auxiliary winding or the diode connected to the output voltage must power the VDD capacitor with a voltage higher than the VDDCSon threshold (see Table 6). During the switching, the internal current source is disabled and the consumptions are minimized. If a fault occurs, switching is stopped and the device is self biased by the internal high voltage current source; it is activated between the levels VDDCSon and VDDon delivering the current IDDch2 to the VDD capacitor during the MOSFET OFF time, see Figure 25. At converter power-down, the VDD voltage drops and the converter activity stops as it falls below the VDDoff threshold (see Table 6). Figure 25. Power ON and power OFF VIN VIN < VDRAIN_START HV startup is no more activated VDRAIN_START VDD regulation is lost here VDDon time VDDCSon VDDoff VDRAIN time IDD time IDDch2 IDDch1 Power-on DS6901 - Rev 3 Normal operation Power-off time page 15/34 VIPER26 Oscillator 7 Oscillator The switching frequency is internally fixed at 60 kHz (VIPER26LN or LD) or 115 kHz (VIPER26HN or HD). In both cases, the switching frequency is modulated by approximately ±4 kHz (60 kHz version) or ±8 kHz (115 kHz version) at 230 Hz (typical) rate, so that the resulting spread-spectrum action distributes the energy of each harmonic of the switching frequency over a number of sideband harmonics, having the same net energy but with smaller amplitudes. DS6901 - Rev 3 page 16/34 VIPER26 Soft startup 8 Soft startup During the converter start-up phase, the soft-start function progressively increases the cycle-by-cycle drain current limit, up to the default value IDlim. This way, the drain current is further limited and the output voltage is progressively increased, therefore reducing the stress on the secondary diode. The soft-start time is internally fixed to tSS (see typical value on Table 7. Controller section) and the function is activated for any converter startup attempt or a fault event. This function helps prevent transformer saturation during start-up and short-circuit. DS6901 - Rev 3 page 17/34 VIPER26 Adjustable current limit set point 9 Adjustable current limit set point The VIPer26 includes a current mode PWM controller: cycle by cycle the drain current is sensed through the integrated resistor RSENSE and the voltage is applied to the non inverting input of the PWM comparator, see Figure 24. Block diagram. As soon as the sensed voltage is equal to the voltage derived from the COMP pin, the power MOSFET is switched OFF. In parallel with the PWM operations, the comparator OCP, see Figure 24, checks the level of the drain current and switch OFF the power MOSFET in case the current is higher than the threshold IDlim, see Table 7. Controller section. The level of the drain current limit, IDlim, can be reduced depending on the sunk current from the pin LIM. The resistor RLIM, between LIM and GND pins, fixes the current sunk and therefore the level of the current limit, IDlim, see Figure 12. IDLIMvs. RLIM. When the LIM pin is left open or if the RLIM has a high value (i.e., > 80 kΩ), the current limit is fixed to its default value, IDlim, as reported in Table 7. DS6901 - Rev 3 page 18/34 VIPER26 FB pin and COMP pin 10 FB pin and COMP pin The device can be used both in non-isolated and in isolated topology. In case of non-isolated topology, the feedback signal from the output voltage is applied directly to the FB pin as inverting input of the internal error amplifier with reference voltage, VREF_FB, see Table 7. Controller section. The output of the error amplifier sources and sinks the current, ICOMP, to and from the compensation network connected on the COMP pin. This signal is then compared in the PWM comparator with the signal coming from the SenseFET; the power MOSFET is switched off when the two values are the same on a cycle by cycle basis. See Figure 24. Block diagram and Figure 26. Feedback circuit. When the power supply output voltage is equal to the error amplifier reference voltage, VREF_FB, a single resistor has to be connected from the output to the FB pin. For higher output voltages, the external resistor divider is needed. If the voltage on FB pin is accidentally left floating, an internal pull-up protects the controller. The output of the error amplifier is externally accessible through the COMP pin and it is used for the loop compensation: usually an RC network. As shown in Figure 26, the internal error amplifier has to be disabled in isolated power supplies (FB pin shorted to GND). In this case, an internal resistor is connected between an internal reference voltage and the COMP pin, see Figure 26. The current loop has to be closed on the COMP pin through the opto-transistor in parallel with the compensation network. The VCOMP dynamic range is between VCOMPL and VCOMPH, as shown in Figure 27. When the voltage VCOMP drops below the voltage threshold VCOMPL, the converter enters burst mode, see Section 11 Burst mode. When the voltage VCOMP rises above the VCOMPH threshold, the peak drain current will reach its limit, as well as the deliverable output power. Figure 26. Feedback circuit VREF Without isolation: switch open and E\A enabled With isolation: switch closed and E\A disabled VOUT switch closed FB (E/A disabled) - VREF_FB non iso option VCOMPL PWM stop + - SW BUS from RSENSE E/A + RH R comp to PWM + nR iso option - RL R COMP DS6901 - Rev 3 page 19/34 VIPER26 FB pin and COMP pin Figure 27. COMP pin voltage versus IDLIM IDRAIN I Dlim IDlim_bm VCOMPL DS6901 - Rev 3 VCOMPH VCOMP page 20/34 VIPER26 Burst mode 11 Burst mode When the voltage VCOMP drops below the threshold, VCOMPL, the power MOSFET is kept in the OFF state and the consumption is reduced to IDD0 current, as given in Table 6. Supply section. In reaction to the energy delivery interruption, the VCOMP voltage increases and, as soon as it exceeds the threshold VCOMPL + VCOMPL_HYS, the converter starts switching again with consumption level equal to IDD1 current. This ON-OFF operation mode, referred to as “burst mode” (see Figure 28), reduces the average frequency, which can fall down even to a few hundreds hertz, thus minimizing all frequency-related losses and making it easier to comply with energy saving regulations. During burst mode, the drain current limit is reduced to the value IDlim_bm (given in Table 7. Controller section) in order to avoid audible noise issues. Figure 28. Load-dependent operating modes: timing diagrams VCOMP VCOMPL +VCOMPL_HYS VCOMPL time IDD IDD1 IDD0 time IDRAIN IDlim_bm time Burst Mode DS6901 - Rev 3 page 21/34 VIPER26 Automatic restart after overload or short-circuit 12 Automatic restart after overload or short-circuit The overload protection is implemented automatically through the integrated up-down counter. Every cycle, it is incremented or decremented depending on whether the current logic detects the limit condition or not. The limit condition is the peak drain current, IDlim given in Table 7. Controller section, or the one set by the user through the RLIM resistor, as shown in Figure 12. IDLIMvs. RLIM. After the reset of the counter, if the peak drain current is continuously equal to the level IDlim, the counter will be incremented until the fixed time, tOVL, after which the power MOSFET switch ON is disabled. It is activated again, through the soft start, after the tRESTART time, see Figure 29. Timing diagram: OLP sequence and the relevant time values in Table 7. In case of an overload or short-circuit event, the power MOSFET switching is stopped after a time that depends on the counter and whose maximum can equal tOVL. The protection occurs in the same way until the overload condition is removed, see Figure 29. This protection ensures restart attempts of the converter with low repetition rate, so that it works safely with extremely low power throughput and avoids IC overheating in case of repeated overload events. If the overload is removed before the protection tripping, the counter will be decremented cycle by cycle down to zero and the IC will not be stopped. Figure 29. Timing diagram: OLP sequence VDD Short-circuit removed Short-circuit occurs VDDon VDDCSon IDRAIN time IDLIM tOVL tOVL tSS DS6901 - Rev 3 time tRESTART tRESTART tSS page 22/34 VIPER26 Open loop failure protection 13 Open loop failure protection If the power supply is built in fly-back topology and the VIPer26 is supplied by an auxiliary winding, as shown in Figure 30. FB pin connection for non-isolated flyback and Figure 31. FB pin connection for isolated fly-back, the converter is protected against feedback loop failure or accidental disconnections of the winding. Regarding the Figure 30 and Figure 31 schematics for non-isolated flyback and isolated flyback, if RH is opened or RL is shorted, the VIPer26 works at its drain current limitation. The output voltage, VOUT, will increase and so will the auxiliary voltage, VAUX, which is coupled with the output according to the secondary-to-auxiliary turns ratio. As the auxiliary voltage increases up to the internal VDD active clamp, VDDclamp (value given in Table 7. Controller section) and the clamp current injected on VDD pin exceeds the open loop failure current threshold, IDDol (value given in Table 7), a fault signal is internally generated. In order to distinguish an actual malfunction from a bad auxiliary winding design, both the above conditions (drain current equal to the drain current limitation and VDD current higher than IDDol through VDD clamp) have to be verified to reveal the fault. If RL is opened or RH is shorted, the output voltage, VOUT, will be clamped to the reference voltage VREF_FB in case of non isolated flyback or to the external TL voltage reference in case of isolated flyback). Figure 30. FB pin connection for non-isolated flyback R C AUX D AUX VAUX VDD VDD VOUT V COMPL PWM stop + - RH BUS FB from R SENSE - E/A V + RL to PWM REF_FB + nR - R COMP Cp Rs Cs DS6901 - Rev 3 page 23/34 VIPER26 Open loop failure protection Figure 31. FB pin connection for isolated fly-back R C AUX D AUX VAUX VDD V REF_FB R comp V COMPL PWM st op + - SW BUS FB Disable d - VOUT SENSE + V REF_FB from R E/A to PWM + nR - R Ropto R H COMP R3 U5 Rc Cc Cc omp TL R L DS6901 - Rev 3 - page 24/34 VIPER26 Package information 14 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 14.1 DIP-7 package information Figure 32. DIP-7 package outline DS6901 - Rev 3 page 25/34 VIPER26 DIP-7 package information Table 9. DIP-7 package mechanical data Dim. DS6901 - Rev 3 mm Notes Min. Typ. Max. A - - 5.33 - A1 0.38 - - - A2 2.92 3.30 4.95 - b 0.36 0.46 0.56 - b2 1.14 1.52 1.78 - c 0.20 0.25 0.36 - D 9.02 9.27 10.16 - E 7.62 7.87 8.26 - E1 6.10 6.35 7.11 - e - 2.54 - - eA - 7.62 - - eB - - 10.92 - L 2.92 3.30 3.81 - M - 2.508 N 0.40 0.50 0.60 - N1 - - 0.60 - O - 0.548 - 7-8 6-8 page 26/34 VIPER26 SO16 narrow package information 14.2 SO16 narrow package information Figure 33. SO16 narrow package outline DS6901 - Rev 3 page 27/34 VIPER26 SO16 narrow package information Table 10. SO16 narrow mechanical data Dim. mm Min. Typ. A 1.75 A1 0.1 A2 1.25 b 0.31 0.51 c 0.17 0.25 D 9.8 9.9 10 E 5.8 6 6.2 E1 3.8 3.9 4 e 0.25 1.27 h 0.25 0.5 L 0.4 1.27 k 0 8 ccc DS6901 - Rev 3 Max. 0.1 page 28/34 VIPER26 Order code 15 Order code Table 11. Order code Order code VIPER26LN VIPER26HN Package Packing DIP-7 Tube VIPER26HD VIPER26HDTR VIPER26LD VIPER26LDTR DS6901 - Rev 3 Tube SO16N Tape and reel Tube Tape and reel page 29/34 VIPER26 Revision history Table 12. Document revision history Date Version Changes 26-Aug-2010 1 Initial release. 01-Sep-2010 2 Updated Figure 30 on page 23. Throughout document: - updated document template - general reorganisation of sections - minor text edits On cover page: - updated Features and Description - added Product status link and Product label In Section 1 Pin settings: 11-Oct-2020 3 - updated Table 1. Pin descriptions In Section 2 Electrical and thermal ratings: - updated Table 3. Thermal data - added Figure 2. Rth versus area and Table 4. Avalanche characteristics In Table 6. Supply section: - updated VDRAIN_START and IDD1 Max. values In Section 3 Typical electrical characteristics: - added Figure 16. SOA SO16N package and Figure 17. SOA DIP7 package In Section 4 Typical circuits: - updated all figures DS6901 - Rev 3 page 30/34 VIPER26 Contents Contents 1 Pin settings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2 2 Electrical and thermal ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2.1 Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 Typical electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 Typical circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10 4.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.2 Typical power. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5 Power section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 6 High-voltage current generator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 7 Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16 8 Soft startup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 9 Adjustable current limit set point . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 10 FB pin and COMP pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 11 Burst mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21 12 Automatic restart after overload or short-circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22 13 Open loop failure protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 14 Package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25 15 14.1 DIP-7 package information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 14.2 SO16 narrow package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Order code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31 List of tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .32 List of figures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 DS6901 - Rev 3 page 31/34 VIPER26 List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Table 12. Pin descriptions . . . . . . . . . . . . Absolute maximum ratings . . . . Thermal data. . . . . . . . . . . . . . Avalanche characteristics . . . . . Power section . . . . . . . . . . . . . Supply section . . . . . . . . . . . . . Controller section. . . . . . . . . . . VIPer26 typical power. . . . . . . . DIP-7 package mechanical data SO16 narrow mechanical data. . Order code . . . . . . . . . . . . . . . Document revision history . . . . . DS6901 - Rev 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 . 3 . 3 . 4 . 4 . 4 . 5 13 26 28 29 30 page 32/34 VIPER26 List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Figure 11. Figure 12. Figure 13. Figure 14. Figure 15. Figure 16. Figure 17. Figure 18. Figure 19. Figure 20. Figure 21. Figure 22. Figure 23. Figure 24. Figure 25. Figure 26. Figure 27. Figure 28. Figure 29. Figure 30. Figure 31. Figure 32. Figure 33. DS6901 - Rev 3 Connection diagram (top view) . . . . . . . . . . . . . . . Rth versus area. . . . . . . . . . . . . . . . . . . . . . . . . . IDLIM vs. TJ. . . . . . . . . . . . . . . . . . . . . . . . . . . . . FOSC vs. TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDRAIN_START vs. TJ . . . . . . . . . . . . . . . . . . . . . . HCOMP vs. TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . GM vs. TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VREF_FB vs. TJ . . . . . . . . . . . . . . . . . . . . . . . . . . ICOMP vs. TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating supply current (no switching) vs TJ . . . . . Operating supply current (switching) vs TJ . . . . . . . IDLIMvs. RLIM . . . . . . . . . . . . . . . . . . . . . . . . . . . Power MOSFET on-resistance vs TJ . . . . . . . . . . . Power MOSFET breakdown voltage vs TJ . . . . . . . Power MOSFET capacitance variation vs VDS . . . . SOA SO16N package . . . . . . . . . . . . . . . . . . . . . SOA DIP7 package . . . . . . . . . . . . . . . . . . . . . . . Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . Buck converter (VOUT>VDDCSon) . . . . . . . . . . . . . . Flyback converter (isolated) . . . . . . . . . . . . . . . . . Flyback converter (primary regulation) . . . . . . . . . . Flyback converter (non isolated, VOUT ≥ VDDCSon) . Flyback converter (non isolated, VOUT < VDDCSon) . Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . Power ON and power OFF . . . . . . . . . . . . . . . . . . Feedback circuit . . . . . . . . . . . . . . . . . . . . . . . . . COMP pin voltage versus IDLIM . . . . . . . . . . . . . . . Load-dependent operating modes: timing diagrams. Timing diagram: OLP sequence . . . . . . . . . . . . . . FB pin connection for non-isolated flyback . . . . . . . FB pin connection for isolated fly-back . . . . . . . . . . DIP-7 package outline . . . . . . . . . . . . . . . . . . . . . SO16 narrow package outline. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 . 4 . 7 . 7 . 7 . 7 . 7 . 7 . 8 . 8 . 8 . 8 . 8 . 8 . 9 . 9 . 9 . 9 10 10 11 11 12 12 15 19 20 21 22 23 24 25 27 page 33/34 VIPER26 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2020 STMicroelectronics – All rights reserved DS6901 - Rev 3 page 34/34