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FDA803Q-V0T

FDA803Q-V0T

  • 厂商:

    STMICROELECTRONICS(意法半导体)

  • 封装:

  • 描述:

  • 数据手册
  • 价格&库存
FDA803Q-V0T 数据手册
FDA803Q 1 channel class D digital input automotive power amplifier with diagnostics, wide voltage operation range for car audio and telematic Data brief  2 Ω loads driving  Amplitude limiter function (configurable through I2C)  I2C bus diagnostics: – Short to VCC/GND – Short load and open load detection (also in play mode) – Four thermal warnings GAPGPS03203 VFQFPN 7x7x1.0 48L (Exposed pad down)  DC offset detector (also in play) and 'hot spot' detection Features  Clipping detector  AEC-Q100 qualified  Integrated thermal protection  Integrated 108 dB D/A conversion  Legacy mode ('no I2C' mode), 4 configurable settings  I2S and TDM digital input (4/8/16CH TDM)  Input sampling frequency: 44.1 kHz, 48 kHz, 96 kHz, 192 kHz  Short circuit and ESD integrated protections  Package: VFQFPN48 exposed pad down 2  Full I C bus driving (3.3/1.8 V) Table 1. Device summary  CISPR 25 - Class V (Fourth edition)  Very low quiescent current  Output lowpass filter included in the feedback allowing outstanding audio performances Order code Package Packing FDA803Q-V0T VFQFPN48 (exposed pad down) Tape & reel FDA803Q-V0Y Tray  Wide operating supply range from 3.3 to 18 V, suitable for car radio, telematics and e-call  MOSFET power outputs allowing high output power capability – 1 x 25 W /4 Ω @ 14.4 V, 1 kHz THD = 1% – 1 x 31 W /4 Ω @ 14.4 V, 1 kHz THD = 10% May 2021 DB4487 Rev 1 For further information contact your local STMicroelectronics sales office. 1/16 www.st.com Contents FDA803Q Contents 1 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 4 Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 5 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 6 5.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11 5.2 Maximum operating voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5.3 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 6.1 7 2/16 VFQFPN (7x7x1.0 48L - opt. D) package information . . . . . . . . . . . . . . . 13 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 DB4487 Rev 1 FDA803Q List of tables List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pin list function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Maximum operating voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Thermal data - QFN48 slug-down package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 VFQFPN (7x7x1.0 48L - opt. D) package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . 14 Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 DB4487 Rev 1 3/16 3 List of figures FDA803Q List of figures Figure 1. Figure 2. Figure 3. Figure 4. 4/16 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin connection diagram (BOTTOM view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Application diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 VFQFPN (7x7x1.0 48L - opt. D) package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 DB4487 Rev 1 FDA803Q 1 Description Description The FDA803Q is a single bridge class D amplifier, designed in the most advanced BCD technology, intended for any automotive audio application (car radio, telematics and e-call, noise and tone generators, etc). The FDA803Q integrates a high performance D/A converter together with powerful MOSFET outputs in class D, so it is very compact and powerful, moreover it reaches outstanding efficiency performances (90%). It has a very wide operating range: it can be operated both with standard car battery levels (5.5-18 V operating, compatible to load dump pulse) and with external step-down generated voltages or emergency battery (since it is compatible to minimum 3.3 V operative). The feedback loop includes the output L-C low-pass filter, allowing superior frequency response linearity and lower distortion. FDA803Q is configurable through I2C bus interface and integrates a complete diagnostics array specially intended for automotive applications including innovative open load and DC offset detection in play mode. Thanks to the solutions implemented to solve the EMI problems, the device is intended to be used in the standard single DIN car-radio box together with the tuner. Moreover, FDA803Q features a configurable amplitude limiter function, and can be optionally operated under no I2C mode ('legacy mode'). DB4487 Rev 1 5/16 15 Block diagram 2 FDA803Q Block diagram Figure 1. Block diagram VCCM VCCM VCCP VCCP 8 7 4 3 25 33 D1V8SVR 32 26 I2CClk 23 DGSVR I2Cdata 22 17 Enable 4 21 SdataIN 18 Enable 3 I2Sws DVdd Enable 2 20 I2Sclk DGnd Enable 1 PLL I2C interface 37 38 36 46 Interpolator & Noise Shaper I2S interface Current Generator Array Scrambler PWM Transresistance Power Amplifier 1/47/48 OUTP 12/13/14 OUTM 15 FBM 5 GNDP GNDM GNDM AGSVR GNDP 8 AGSVR 6 41 AVdd 7 42 SVR AGnd 43 HWMUTE 39 44 CDDiag SyncOUT 40 24 35 6/16 FBP GAPG1105160712PS DB4487 Rev 1 FDA803Q 3 Pin description Pin description Figure 2. Pin connection diagram (BOTTOM view) OUTP OUTP NC FBP SVR HWMUTE AGSVR A5VSVR AVdd AGnd I2Sws I2Sclk 48 37 I2SdataIn 36 1 SyncOUT OUTP NC NC VCCP I2Cclk VCCP I2Cdata GNDP NC GNDP NC GNDM NC GNDM NC VCVM NC VCCM DGSVR NC 12 13 25 24 D1V8SVR OUTM OUTM OUTM FBM NC DGnd DVdd NC Enable1 Enable2 Enable3 Enable4 CDDiag GADG2111170833PS Table 2. Pin list function N# Pin 1 OUTP 2 NC 3 VCCP 4 Function Definition Internal structure Output - - - Channel half bridge plus Supply - VCCP Channel half bridge plus Supply - 5 GNDP Channel half bridge plus Supply - 6 GNDP Channel half bridge plus Supply - 7 GNDM Channel half bridge minus Supply - 8 GNDM Channel half bridge minus Supply - 9 VCCM Channel half bridge minus Supply - 10 VCCM Channel half bridge minus Supply - 11 NC - - 12 OUTM Channel half bridge minus Output - 13 OUTM Channel half bridge minus Output - Channel half bridge plus Not connected Not connected DB4487 Rev 1 7/16 15 Pin description FDA803Q Table 2. Pin list function (continued) N# Pin 14 OUTM 15 FBM 16 NC 17 Definition Internal structure Output - Input - Not connected - - DGnd Digital ground Supply - 18 DVdd Digital supply Supply - 19 NC Not connected - - 20 Enable1 Enable pin Input - 21 Enable2 Enable pin Input - 22 Enable3 Enable pin Input - 23 Enable4 Enable pin Input - 24 CDDiag Clipping detector and diagnostic Output Open-Drain 25 D1V8SVR Positive digital supply V(SVR) + 0.9 V (Internally generated) Internal - 26 DGSVR Negative digital supply V(SVR) - 0.9 V (Internally generated) Internal - 27 NC Not connected - - 28 NC Not connected - - 29 NC Not connected - - 30 NC Not connected - - 31 NC Not connected - - Channel half bridge minus Channel half bridge minus, Feedback I2Cdata I 2C Data Input/Output Open-Drain 33 I2Cclk I 2C Clock Input - 34 NC Not connected - - 35 SyncOUT PWM synchronization signal Output Pull-Up & Pull-Down I2SdataIn I2S/TDM data Input - I2Sclk I2S/TDM Clock Input - 38 I2Sws I2S/TDM Sync/Word Select Input - 39 AGnd Analog ground Supply - 40 AVdd Analog supply Supply - 41 A5VSVR Positive Analog Supply V(SVR) + 2.5 V (Internally generated) Internal - 42 AGSVR Negative Analog Supply V(SVR) - 2.5 V (Internally generated) Internal - 43 SVR Supply Voltage Ripple Rejection Capacitor Internal - Input - - - 32 36 37 44 45 8/16 Function HWMUTE Hardware mute pin NC Not connected DB4487 Rev 1 FDA803Q Pin description Table 2. Pin list function (continued) N# Pin 46 FBP 47 OUTP 48 OUTP Function Definition Internal structure Input - Channel half bridge plus Output - Channel half bridge plus Output - Channel half bridge plus, Feedback DB4487 Rev 1 9/16 15 Application diagram 4 FDA803Q Application diagram Figure 3. Application diagram C1 4.7uF C2 10nF C3 100pF HWMUTE 11 2 1uF C4 C6 2 1 VCC 2 I2S_WS 4.7nF I2S_SCL 2 VCC 3 4 5 C8 C9 C10 6 CH1+ 1uF 470uF 100nF SPK 7 CH1- 8 VCC GND 9 10 37 I2Sclk 39 38 I2Sws 40 42 41 44 43 SVR 46 45 OUTP AGSVR 1 330pF A5VSVR C7 HWMUTE R2 10R GND NC 48 OUTP GND 47 L1 10uH 3.3uF FBP 1 AGnd 10R AVdd C5 R1 OUTP 2 I2SdataIn NC SyncOut VCCP NC VCCP I2Cclk GNDP I2Cdata GNDP NC FDA803Q GNDM NC GNDM NC VCCM NC VCCM NC 36 I2S_DataIn 35 SyncOut 34 33 I2C_SCL 32 I2C_SDA 31 MCU 30 29 28 27 C11 11 2 11 2 C15 R5 10R 1uF C16 1 2 1 C13 CDDiag 25 4.7uF 24 Enable4 23 Enable3 Enable2 21 22 Enable1 NC 19 D1V8SVR 10nF 2 CDDIAG L2 10uH VCC 3.3uF GND 10/16 20 DGnd DVdd 18 17 NC 16 15 FBM OUTM OUTM 12 13 330pF C12 26 100pF C14 OUTM GND DGSVR 14 R4 10R NC DB4487 Rev 1 EN4 EN3 EN2 EN1 FDA803Q Electrical specifications 5 Electrical specifications 5.1 Absolute maximum ratings Table 3. Absolute maximum ratings Symbol Parameter Value Unit -0.3 to 28 V -0.3 to 40 V Ground pin voltage difference -0.3 to 0.3 V ∆VCCmax [DVDD-AVDD, VCCP-DVDD, VCCP-AVDD, Supply pins voltage difference VCCM-DVDD, VCCMAVDD, VCCP-VCCM] -0.3 to 0.3 V Ground pin voltage difference -0.3 to 0.3 V I2C bus pins voltage -0.3 to 5.5 V -0.3 to 5.5 V -0.3 to 5.5 V -0.3 to 7 V -0.3 to 5.5 V Internally limited A Ambient operating temperature -40 to 125 °C Storage and junction temperature -55 to 150 °C VCCmax [VCCP ,VCCM, AVDD, DC supply voltage DVDD] Transient supply voltage for t = 100 ms(1) GNDmax [DGND, AGND, GNDP, GNDM] ∆GNDmax [AGND-DGND, GNDP-AGND, GNDPDGND, GNDM-DGND, GNDM-AGND, GNDPGNDM] VI2C [I2Cdata, I2Cclk] VI2S [I2SdataIN, I2Sclk, I2Sws, SyncOUT] Enable [Enable1, Enable2, Enable3, Enable4] Vmute [HWMute] VCD [CDDiag] Io Tamb Tstg, Tj I2S bus pins voltage and Synchronization pin Enables Hardware mute CD/DIAG pins voltage Output current (repetitive f > 10 Hz) ESDHBM ESD protection HBM 2000 V ESDCDM ESD protection CDM 500 V 1. VCC = 35 V for t < 400 ms as per ISO16750-2 load dump with centralized load dump suppression. DB4487 Rev 1 11/16 15 Electrical specifications 5.2 FDA803Q Maximum operating voltage Table 4. Maximum operating voltage Symbol Parameter Value Unit 18 V I2C bus pins voltage 3.6 V I2S bus pins voltage and Synchronization pin 3.6 V Enables 3.6 V 5 V 3.6 V VCCmax [VCCP ,VCCM, AVDD, DC supply voltage DVDD] VI2C [I2Cdata, I2Cclk] VI2S [I2SdataIN, I2Sclk, I2Sws, SyncOUT] Enable [Enable1, Enable2, Enable3, Enable4] Vmute [HWMute] VCD [CDDiag] 5.3 Hardware mute CD/DIAG pins voltage Thermal data Table 5. Thermal data - QFN48 slug-down package Symbol Parameter Rth j-a-2s2pv Thermal resistance junction-to-ambient (2s2p+vias) Value Unit 28.5 °C/W 2s2p is referred to a board with 2 layers dedicated to the signals and 2 layers dedicated to the power signals and supplies. 12/16 DB4487 Rev 1 FDA803Q 6 Package information Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. VFQFPN (7x7x1.0 48L - opt. D) package information Figure 4. VFQFPN (7x7x1.0 48L - opt. D) package outline A B 48 48 36 INDEX AREA 1 36 1 C0.35 R0 E2 .1 25 D2 D 12 0.36 Ref. 12 L 24 24 A E A1 e b Terminal Length 0.5±0.05 DETAIL A 0.10 C 48X ddd C C A3 0.075 Ref 48X 0.20 Ref 6.1 0.10 M C A B 0.48 Ref. 0.20 Ref Terminal Thickness 0.18 Ref. 0.05 Ref DETAIL A NOTE : 1. ALL DIMENSIONS ARE IN mm. ANGLES IN DEGREES. 2. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. COPLANARITY SHALL NOT EXCEED 0.08 mm. 3. WARPAGE SHALL NOT EXCEED 0.10 mm. 4. REFER JEDEC MO-220. DB4487 Rev 1 0.30 Ref. 13/16 15 Package information FDA803Q Table 6. VFQFPN (7x7x1.0 48L - opt. D) package mechanical data Dimensions Symbol 14/16 Min. Typ. Max. A 0.85 0.95 1.05 A1 - 0.00 0.05 A2 - 0.75 - A3 - 0.20 - b 0.15 0.25 0.35 D 6.85 7.00 7.15 D2 5.15 5.30 5.45 E 6.85 7.00 7.15 E2 5.15 5.30 5.45 e 0.45 0.50 0.55 L 0.45 0.50 0.55 ddd - - 0.08 DB4487 Rev 1 FDA803Q 7 Revision history Revision history Table 7. Document revision history Date Revision 03-May-2021 1 Changes Initial release. DB4487 Rev 1 15/16 15 FDA803Q IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2021 STMicroelectronics – All rights reserved 16/16 DB4487 Rev 1
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