HCF4042B
QUAD CLOCKED D LATCH
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CLOCK POLARITY CONTROL
Q AND Q OUTPUTS
COMMON CLOCK
LOW POWER TTL COMPATIBLE
STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
QUIESCENT CURRENT SPECIFIED UP TO
20V
5V, 10V AND 15V PARAMETRIC RATINGS
INPUT LEAKAGE CURRENT
II = 100nA (MAX) AT VDD = 18V TA = 25°C
100% TESTED FOR QUIESCENT CURRENT
MEETS ALL REQUIREMENTS OF JEDEC
JESD13B " STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
DESCRIPTION
The HCF4042B is a monolithic integrated circuit
fabricated in Metal Oxide Semiconductor
technology available in DIP and SOP packages.
The HCF4042B types contains four latch circuit,
each strobes by a common clock. Complementary
buffered outputs are available from each circuit.
The impedance of the n and p channel output
devices is balanced and all outputs are electrically
identical.
DIP
SOP
ORDER CODES
PACKAGE
TUBE
T&R
DIP
SOP
HCF4042BEY
HCF4042BM1
HCF4042M013TR
Information present at the data input is transferred
to outputs Q and Q during the CLOCK level which
is programmed by the POLARITY input. For
POLARITY = 0 the transfer occurs during the 0
CLOCK level and for POLARITY = 1 the transfer
occurs during the 1 CLOCK level. The outputs
follow the data input providing the CLOCK and
POLARITY levels defined above are present.
When a CLOCK transition occurs (positive for
POLARITY = 0 and negative for POLARITY = 1)
the information present at the input during the
CLOCK transition is retained at the outputs until
an opposite CLOCK transition occurs.
PIN CONNECTION
September 2001
1/9
HCF4042B
IINPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL
4, 7, 13, 14
2, 10, 11, 1
3, 9, 12, 15
5
6
8
D1 to D4
Q1 to Q4
Q1 to Q4
CLOCK
POLARITY
VSS
16
VDD
NAME AND FUNCTION
Data Inputs
Q outputs
Q outputs
Clock Input
Polarity inputs
Negative Supply Voltage
Positive Supply Voltage
FUNCTIONAL DIAGRAM
TRUTH TABLE
CLOCK
POLARITY
Q
L
0
D
0
LATCH
H
2/9
1
D
1
LATCH
HCF4042B
LOGIC BLOCK DIAGRAM
This logic diagram has not be used to estimate propagation delays
ABSOLUTE MAXIMUM RATINGS
Symbol
VDD
Parameter
Supply Voltage
Value
Unit
-0.5 to +22
V
VI
DC Input Voltage
-0.5 to VDD + 0.5
V
II
DC Input Current
± 10
mA
200
100
mW
mW
Top
Power Dissipation per Package
Power Dissipation per Output Transistor
Operating Temperature
-55 to +125
°C
Tstg
Storage Temperature
-65 to +150
°C
PD
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
All voltage values are referred to VSS pin voltage.
RECOMMENDED OPERATING CONDITIONS
Symbol
VDD
Parameter
Supply Voltage
VI
Input Voltage
Top
Operating Temperature
Value
Unit
3 to 20
V
0 to VDD
V
-55 to 125
°C
3/9
HCF4042B
DC SPECIFICATIONS
Test Condition
Symbol
IL
VOH
VOL
VIH
VIL
IOH
IOL
II
CI
Parameter
Quiescent Current
High Level Output
Voltage
Low Level Output
Voltage
VI
(V)
0/5
0/10
0/15
0/20
0/5
0/10
0/15
5/0
10/0
15/0
High Level Input
Voltage
Low Level Input
Voltage
Output Drive
Current
Output Sink
Current
Input Leakage
Current
Input Capacitance
VO
(V)
0/5
0/5
0/10
0/15
0/5
0/10
0/15
0/18
0.5/4.5
1/9
1.5/13.5
4.5/0.5
9/1
13.5/1.5
2.5
4.6
9.5
13.5
0.4
0.5
1.5
Value
|IO| VDD
(µA) (V)
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