HDMI2C2-5F2

HDMI2C2-5F2 Datasheet ESD protection and signal booster for HDMI sink control stage interface Features • • • • • WLCSP (10 bumps) package • • • For HDMI 1.4, 2.0 & 2.1 application, operating temperature from -40 to 85 °C 8 kV contact ESD protection on connector side (IEC 61000-4-2 level 4) Supports direct connection to low-voltage HDMI ASIC (down to 1.8 V) High integration level in 1 package DDC capacitive decoupling between ASIC and HDMI connector and dynamic pull-up for long cable driving Enable function to sense 5V power supply presence from HDMI connector and to switch off for power consumption optimization Backdrive protection on DDC bus Proposed in 500 µm pitch WLCSP package 10 bumps for easy PCB layout Benefits • Minimal PCB footprint in tablet, set top box, game console and other consumer application • Protection of ultra-sensitive HDMI ASICs • Power consumption optimization thanks to Enable function • Improved HDMI interface ruggedness and user experience • Long and/or poor quality cable support with dynamic pull-up on DDC bus Product status link Complies with the following standards • Dedicated for HDMI 1.4, 2.0 and 2.1 version • IEC 61000-4-2 level 4 • JESD22-A114D level 2 HDMI2C2-5F2 HDMI logo and High-Definition Multimedia Interface are trademarks or registered trademarks of HDMI Licensing LLC. Applications Consumer and computer electronics HDMI Sink device such as: • Tablet and smartphone • HD set-top boxes • Game console • DVD and Blu-Ray Disk systems • Notebook • PC graphic cards Description The HDMI2C2-5F2 is an integrated ESD protection and signal conditioning device for control links of HDMI transmitters (sink). This device is a simple solution that provides HDMI designers with an easy and fast way to reach full compliance with the stringent HDMI CTS on a wide temperature range. DS12666 - Rev 2 - May 2019 For further information contact your local STMicroelectronics sales office. www.st.com HDMI2C2-5F2 Functional description 1 Functional description The HDMI2C2-5F2 is a fully integrated ESD protection and signal conditioning device for control stage of HDMI receivers (sink). The component offers two bidirectional buffers, integrating signal conditioning dynamic pull-up on DDC bus for maximum system robustness and signal integrity. These buffers embed also a protection to prevent from connector backdrive current from connector. ENABLE_IC function is available to sense 5 V power supply presence from HDMI connector. On top of 5 V sensing, Enable_IC can be used to switch off our device even if 5V_IN is present. All these features are provided in a single 10 bumps WLCSP package featuring natural PCB routing, cost optimization and saving space on the board. The HDMI2C2-5F2 is a simple solution that provides HDMI designers with an easy and fast way to reach full compliance with the stringent HDMI CTS on a wide temperature range. STMicroelectronics proposes also a large range of High Speed ESD protections and common mode filter (ECMF series) dedicated to the TMDS lanes giving the flexibility to the designer to filter and protect these (high speed video link against ESD strikes and EMC issues. Figure 1. Pin configuration (bump side) SCL 5V_IN SDA CEC HPD ENABLE_IC VDD_IC DS12666 - Rev 2 GND SDA_IC SCL_IC page 2/18 HDMI2C2-5F2 Application information 2 Application infomation 2.1 DDC bus description The DDC bus is described in the HDMI standards as the display data channel. The topology corresponds to an I2C bus that must be compliant with the I2C bus specification UM10204 revision 5 (October 2012). The DDC bus is made of 2 lines; data line (SDA) and clock line (SCL). It is used to create a point to point communication link from the source to the sink. EEDID and HDCP protocols are especially flowing through this link, making this I2C communication channel a key element in the HDMI application. The DDC block integrated in the HDMI2C2-5F2 allows a bidirectional communication between the cable and the ASIC. It is fully compliant with the HDMI 2.0 standard (I2C bus specification) and its CTS, and with the I2C bus specification version 2.1. It is shifting the 5 V voltage from the cable (V5V_IN) down to the ASIC voltage level (VDD_IC) that can be as low as 1.8 V. The Figure 2. DDC buffer functional diagram (SCL and SDA lines) shows the functional diagram of the DDC block integrated in the HDMI2C2-5F2 device. Figure 2. DDC buffer functional diagram (SCL and SDA lines) VDD_IC VDD_IC RPU_ASIC RPU_ASIC decoupling capacitance VDD_IC 5V_IN 5V_IN ENABLE_IC 3 2 1 5V_IN SCL_IC SDA_IC IEC61000-4-2 HBM 18 16 14 12 10 8 RPU_BUS SCL SDA res haping circuit Drive 19 17 15 13 11 9 Enable IEC61000-4-2 5V_IN VDD_IC dynamic pull-up 7 6 5 4 Enable HBM HDMI ASIC HDMI connector ENABLE_IC function is available to sense 5 V power supply presence from HDMI connector and to disable DDC block. The DDC outputs (SCL and SDA on cable side) integrate a protection against ESD which is compliant with IEC61000-4-2 standard, level 4 (8 kV contact). The Figure 3 illustrates the electrical parameter of the DDC block specified by the Table 6. DS12666 - Rev 2 page 3/18 HDMI2C2-5F2 DDC bus description Figure 3. Simplified view of the electrical parameters of the DDC block ASIC side SDA_IC V DD_IC V tup_IC V Tdown_IC t SDA Cable side 5V_IN 70% V tup_BUS V Tdown_BUS V HYST_BUS 30% t TFALL_BUS IC drives TRISE_BUS Cable drives Capacitance measured at the HDMI connector output is equal to the sum of HDMI2C2-5F2 capacitance plus bus capacitance between HDMI2C2-5F2 and HDMI connector output. Thanks to the internal structure of the integrated DDC block, measured capacitance is equal to the input capacitance and then independent from the IC actual capacitance. For compliance test, capacitance on DDC bus must be measured with HDMI2C2-5F2 powered on. The HDMI standard specifies that the max capacitance of the cable can reach up to 700 pF. Knowing that the max capacitance of the source input can reach up to 50 pF, this means that the I2C buffer must be able to drive a load capacitance up to 750 pF. On the other hand, the I2C standard specifies a maximum rise time (30%-70%) of the signal must be lower than 1 µs in order to keep the signal integrity. Taking into account the max cable capacitance of 750 pF, it is not possible to guarantee a rise time lower than 1µs in worst case. Therefore, a dynamic pull-up has been integrated at the output of SDA and SCL lines and synchronized with the I2C driver. This signal booster accelerates for a short period the charging time of the equivalent cable capacitance, allowing driving any HDMI cable. The Figure 4. Benefit of the dynamic pull-up on the DDC bus illustrates the benefit of the dynamic pull-up integrated in the HDMI2C2-5F2 device. DS12666 - Rev 2 page 4/18 HDMI2C2-5F2 DDC bus description Figure 4. Benefit of the dynamic pull-up on the DDC bus I2C driver without dynamic pull-up I2C driver with dynamic pull-up 5V_ IN dynamic pull - up 5V_ IN RPU_BUS 750pF 750pF HDMI™ cable model HDMI™ cable model IC control VDD_IC IC control VDD_IC Signal on the cable 5V_IN RPU_BUS Signal on the cable 5V_IN In order to activate the DDC bus, following conditions must be respected: V5V_IN must be higher than the V5V_ON threshold (see Table 3. Absolute maximum ratings (limiting values)), ENABLE_IC input must be set to a high level and all inputs and outputs (SDA, SCL, SDA_IC, SCL_IC) must be set to a high level at the same time. The DDC outputs (SCL and SDA on cable side) integrate a protection against ESD which is compliant with IEC61000-4-2 standard, level 4 (8 kV contact). DS12666 - Rev 2 page 5/18 HDMI2C2-5F2 ENABLE_IC description 2.2 ENABLE_IC description ENABLE_IC function is available to sense 5 V power supply presence from HDMI connector. On top of 5 V sensing, Enable_IC can be used to switch off our device even if 5V_IN is present. Following conditions are required: • The Enable function senses the 5V_IN power supply and provides a logic flag on the ENABLE_IC pin: – ENABLE_IC = "1" (VDD_IC) : V5V_IN > VDD_5V_ON (VDD_5V_ON = 3.8 V (see Table 3)) – • ENABLE_IC = "0": V5V_IN > VDD_5V_ON The ENABLE_IC pin is also an enables / disables input: – ENABLE_IC = "1" (VDD_IC) : V5V_IN > VDD_5V_ON and the circuit is enabled – ENABLE_IC = forced at "0": The circuit is disabled (low quiescent) whatever V5V_IN Figure 5. Enable function: Block diagram 5V_IN VDD_IC Under Voltage Lock Out IEC 8kV CABLE side C1 100nF HBM 2kV ENABLE INPUT BUFFER VDD_OK EN_DDC & ENABLE_IC ON VDD_IC VDD_IC R3 10kΩ HDMI ASIC HDMI ASIC ENABLE HBM 2kV ENABLE OUPUT BUFFER DS12666 - Rev 2 page 6/18 HDMI2C2-5F2 Backdrive protection 2.3 Backdrive protection Thanks to the innovative switch architecture, when the ENABLE_IC input is set at a low level, backdrive current is blocked when backdrive current is coming from DDC lines. DS12666 - Rev 2 page 7/18 HDMI2C2-5F2 Application block diagrams 2.4 Application block diagrams The Figure 6. Application block diagram shows an application block diagram proposal, with all possible options implemented. Thanks to ENABLE_IC signal control, the designer has then the tools to optimize the power consumption of the global application with a stand-by mode. Figure 6. Application block diagram VDD_IC HDMI2C2-5F2 VDD_IC +5V pow er 5V_IN C3 C2 EEPROM (EEDID) R3 R2 ENABLE_IC ENABLE_IC VDD_IC R4 R5 DDC data SDA_IC DDC clo ck SCL_IC HPD HPD / HEAC - SDA SDA SCL SCL CEC HDMI connector HDMI ASIC VDD_IC R1 CEC bus GND Table 1. External component recommendations Note: DS12666 - Rev 2 Ref. Typical value R1, R4 and R5 10 kΩ Pull-up resistance on DDC bus, ASIC side, value selected to be compliant with I2C levels. C3 100 nF Decoupling capacitance on power supplies. R2 and R3 47 kΩ Pull-up resistances on DDC bus, specified by the HDMI standard. C2 1 µF Comment ESD decoupling capacitance. SCL_IC, SDA_IC have to be driven with an ASIC working with open drain outputs. page 8/18 HDMI2C2-5F2 Application block diagrams Table 2. Pin description Pin Name Direction Description A1 SCL BI DDC output HDMI cable side B1 SDA BI DDC output HDMI cable side C1 5V_IN PWR A2 CEC BI B2 GND PWR C2 HDP BI HPD input HDMI cable side A3 SDA_IC BI DDC input ASIC side C3 ENABLE_IC BI Sensing of +5 V main power supply A4 SCL_IC BI DDC input ASIC side C4 VDD_IC PWR +5 V power supply HDMI cable side CEC output HDMI cable side Ground HDMI ASIC power supply Figure 7. Pin numbering (bump side) DS12666 - Rev 2 page 9/18 HDMI2C2-5F2 Electrical characteristics 3 Electrical characteristics Table 3. Absolute maximum ratings (limiting values) Symbol Parameter VPP_BUS VPP_IC Test conditions Value ESD discharge on HDMI cable side (pins A1, B1,C1, A2 and C2) Contact discharge ±8(1) IEC 61000-4-2 level 4 Air discharge ±15 ESD discharge (all pins) Contact discharge ±2 HBM ‑JESD22-A114D, level 2 Air discharge ±2 Unit kV kV TSTG Storage temperature range -55 to +150 °C TOP Operating temperature range -40 to +85 °C 260 °C 6 V -0.3 to 6 V TL Maximum lead temperature V5V_IN, VDD_IC Supply voltages Inputs Logical input min / max voltage range 1. With a 1 µF low ESR capacitor connected to the 5V_IN pin Table 4. Power supply characteristics (Tamb = 25 °C) Value Symbol Parameter VDD_IC Low-voltage supply voltage 1.62 5 V supply voltage range 4.7 +5 V power on reset 3.5 V5V_IN VDD_5V_ON (1) IQS_5V_IN IQS_IC Quiescent currents on V5V_IN, VDD_IC Test conditions Min. Typ. Max. VDD_IC = 1.8 V, V5V_IN = 5 V, idle-state on DDC links, ENABLE_IC = 1.8 V Unit 3.63 V 5.0 5.3 V 3.8 4.1 V 340 450 µA 41 65 µA 1. In order to activate the DDC lines, the VDD_5V has to reach the V5V_IN threshold. The inputs and outputs of the bidirectional level shifters must be set to a high level after the power-on. Table 5. Enable electrical characteristics (Tamb = 25 °C, VDD_5V = 5 V and DD_IC = 1.8 V, unless otherwise specified) Symbol ILEAK IQS_5V_OFF IQS_IC_OFF VTH_EN / VDD_IC VOL_EN_IC DS12666 - Rev 2 Parameter Backdrive current for SDA, SCL Quiescent currents on V5V_IN, VDD_IC Test conditions Min. Typ. Max. Unit ENABLE_IC=0 1 µA 54 70 µA 4 8 µA 50 70 % 10 %VDD_IC V5_IN = 0 V, VDD_IC = 0 V, Tested pin = 5 V SCL_IC, SDA_IC = VDD_IC, SDA and SCL = V5V_IN and ENABLE_IC = 0 V Enable input threshold level Output low-level on Enable_IC PIN Value 30 Current sunk by ENABLE_IC pins is 1 mA, V5V_IN < VDD_5V_ON page 10/18 HDMI2C2-5F2 Electrical characteristics Table 6. DDC bus (SDA and SCL lines) line electrical characteristics (Tamb = 25 °C, V5V_IN = 5 V, VDD_IC = 1.8 V, unless otherwise specified) Symbol Parameter VTup_BUS Upward input voltage threshold on bus side VTdown_BUS Test conditions Value Min. Typ. Max. 3.5 Downward input voltage threshold on bus side 1.5 VHYST_BUS Input hysteresis on bus side Unit V V 1.0 1.3 V Output low level Current sunk by SDA and SCL pin is 3 mA 0.35 V TRISE_BUS Output rise-time (30%-70%) CBUS = 750 pF(1), RUP = 2 kΩ // 47 kΩ + 10 % (2) 500 ns TFALL_BUS Output fall-time (70%-30%) 200 ns VOL_BUS VTup_IC Upward input voltage threshold on IC side 55 60 65 %VDD_IC VTdown_IC Downward input voltage threshold on IC side 35 40 45 %VDD_IC 20 %VDD_IC 30(3) pF VOL_IC CIN_DDC Output low-level on IC side Current sunk by SDA_IC or SCL_IC pins is 3 mA Input capacitance on DDC link VDD_5V = 0 V, VDD_IC = 0 V, f = 1 MHz, VOSC = 30 mV 25 1. Maximum load capacitance allowed on I2C entire link (cable plus connector) is 750 pF in HDMI 1.4 specification. 2. Two pull-up resistors in parallel (sink+source). For typical value is 47 kΩ and maximum value is 47 kΩ +10% in HDMI 1.4 specification. 3. Maximum capacitance allowed at connector output is 50 pF in HDMI 1.4 specification. Figure 8. DDC typical waveforms – communication from sink to source Note: DS12666 - Rev 2 Measurements performed with 750 pF load, VDD_IC = 1.8 V page 11/18 HDMI2C2-5F2 Electrical characteristics Figure 9. DDC typical waveforms - communication from source to sink Note: DS12666 - Rev 2 Measurements performed with 750 pF load, VDD_IC=1.8 V page 12/18 HDMI2C2-5F2 Package information 4 Package information In order to meet environmental requirements, ST offers these devices in different grades of ECOPACK packages, depending on their level of environmental compliance. ECOPACK specifications, grade definitions and product status are available at: www.st.com. ECOPACK is an ST trademark. 4.1 WLCSP 10 bumps package information Figure 10. WLCSP 10 bumps package outline DS12666 - Rev 2 page 13/18 HDMI2C2-5F2 WLCSP 10 bumps packing information 4.2 WLCSP 10 bumps packing information Figure 11. Marking Note: More packing information is available in the application note: • AN2348 Flip-Chip: “Package description and recommendations for use” Figure 12. Footprint DS12666 - Rev 2 page 14/18 HDMI2C2-5F2 WLCSP 10 bumps packing information Figure 13. WLCSP 10 bumps tape and reel specification (all dimensions in mm) DS12666 - Rev 2 page 15/18 HDMI2C2-5F2 Ordering information 5 Ordering information Figure 14. Ordering information scheme HDMI2C 2 - 5 F2 HDMI and I2C compliant link HDMI port type Sink Number of protected links 5 lines protected according to IEC 61000-4-2 Package typpe F = Flip Chip 2 : Lead-free, pitch = 500 µm, bump = 255 µm Table 7. Ordering information Note: DS12666 - Rev 2 Order code Marking Package Weight Base qty. Delivery mode HDMI2C2-5F2 PW WLCSP 3.2 mg 5000 Tape and reel More information is available in AN2348 application note : • STMicroelectronics 400 micro-meter Flip Chip: package description and recommendation for use page 16/18 HDMI2C2-5F2 Revision history Table 8. Document revision history DS12666 - Rev 2 Date Revision Changes 10-Aug-2018 1 Initial release. 07-May-2019 2 Updated Section Applications. page 17/18 HDMI2C2-5F2 IMPORTANT NOTICE – PLEASE READ CAREFULLY STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to ST products and/or to this document at any time without notice. Purchasers should obtain the latest relevant information on ST products before placing orders. ST products are sold pursuant to ST’s terms and conditions of sale in place at the time of order acknowledgement. Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or the design of Purchasers’ products. No license, express or implied, to any intellectual property right is granted by ST herein. Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product. ST and the ST logo are trademarks of ST. For additional information about ST trademarks, please refer to www.st.com/trademarks. All other product or service names are the property of their respective owners. Information in this document supersedes and replaces information previously supplied in any prior versions of this document. © 2019 STMicroelectronics – All rights reserved DS12666 - Rev 2 page 18/18