HSP061-4M10
4-line ESD protection for high speed lines
Datasheet - production data
Applications
The HSP061-4M10 is designed to protect against
electrostatic discharge on sub micron technology
circuits driving:
• HDMI 1.3 and 1.4
• Digital Video Interface
• Display Port
• USB 3.0
• Serial ATA
• Thunderbolt
µQFN-10L package
Figure 1. Functional schematic (top view)
Features
• Flow-through routing to keep signal integrity
Internally
not connected
I/O 1 1
10
I/O 2 2
9
• Extended operating junction temperature
range: -40 °C to 150 °C
GND 3
8 GND
• Thin package: 0.5 mm max.
I/O 3 4
7
I/O 4 5
6
• Ultralarge bandwidth: 8.7 GHz
• Ultralow capacitance: 0.3 pF
• Low leakage current: 70 nA at 25 °C
• RoHS compliant
Benefits
Internally
not connected
• High ESD robustness of the equipment
• Suitable for high density boards
Description
Complies with following standards
• MIL-STD 883G Method 3015-7 Class 3B:
– 8 kV
• IEC 61000-4-2 level 4:
– 8 kV (contact discharge)
– 15 kV (air discharge)
The HSP061-4M10 is a 4-channel ESD array with
a rail to rail architecture designed specifically for
the protection of high speed differential lines.
The ultralow variation of the capacitance ensures
very low influence on signal-skew. The large
bandwidth makes the device compatible with
3.4 Gbps.
The device is packaged in µQFN-10L 2.5 x 1 mm
with a 500 µm pitch, which minimizes the PCB
area.
June 2014
This is information on a product in full production.
DocID023716 Rev 3
1/11
www.st.com
Characteristics
1
HSP061-4M10
Characteristics
Table 1. Absolute maximum ratings Tamb = 25 °C
Symbol
Value
Unit
8
20
kV
Operating junction temperature range
-40 to +150
°C
Tstg
Storage temperature range
-65 to +150
°C
TL
Maximum lead temperature for soldering during 10 s
260
°C
VPP
Tj
Parameter
Peak pulse voltage
IEC 61000-4-2 contact discharge
IEC 61000-4-2 air discharge
Table 2. Electrical characteristics Tamb = 25 °C
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
VBR
Breakdown voltage
IR = 1 mA
IRM
Leakage current
VRM = 3 V
70
nA
VCL
Clamping voltage
IPP = 1 A, 8/20 µs
15
V
CI/O - I/O
Capacitance
(I/O to I/O)
VI/O = 0 V, F = 1 MHz, VOSC = 30 mV
0.3
0.4
pF
CI/O - GND
Capacitance
(I/O to GND)
VI/O = 0 V F = 1 MHz, VOSC = 30 mV
0.6
0.8
pF
Cut-off frequency
-3dB
8.7
Differential
impedance
tr = 200 ps (10 - 90%)(1), Z0 Diff = 100 Ω
fC
ZDiff
6
85
V
100
GHz
115
1. HDMI specification conditions. This information can be provided for other applications. Please contact your
local ST office.
2/11
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Ω
HSP061-4M10
Characteristics
Figure 2. Leakage current versus junction
temperature (typical values)
10
Figure 3. S21 attenuation measurement
0 S21 (db)
IR (nA)
VR =VRM= 3V
-1
1
-2
-3
0,1
-4
TJ(°C)
0,01
25
50
75
100
125
150
Figure 4. Differential impedance (Zdiff)(1)
F (Hz)
-5
100k
1M
10M
100M
1G
10G
Figure 5. Eye diagram - HDMI mask at 3.4 Gbps
per channel(1)
250 mV/div
tr = 200 ps (10% - 90%)
12.5 Ω /div
50 ps/div
1. HDMI specification conditions. This information can be provided for other applications. Please contact your local ST office.
Figure 6. ESD response to IEC 61000-4-2
(+8 kV contact discharge)
20 V/div
Figure 7. ESD response to IEC 61000-4-2
(-8 kV contact discharge)
20 V/div
1 VPP: ESD peak voltage
2 VCL :clamping voltage @ 30 ns
3 VCL :clamping voltage @ 60 ns
112 V 1
27 V
-16 V
2
20 V 3
2
-11 V
3
1 VPP: ESD peak voltage
2 VCL :clamping voltage @ 30 ns
3 VCL :clamping voltage @ 60 ns
-119 V 1
20 ns/div
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20 ns/div
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Ordering information scheme
2
HSP061-4M10
Ordering information scheme
Figure 8. Ordering information scheme
HSP 06 1 - 4 M10
High speed line protection
Breakdown voltage
Version
Number of lines
Package
µQFN-10L
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HSP061-4M10
3
Package information
Package information
•
Epoxy meets UL94, V0
•
Lead-free package
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 9. µQFN-10L dimension definitions
D
R
b1
0.
12
5
1
5
L
E
PIN 1 ID
6
10
b
e
A
A1
Seating
plane
A2
Table 3. µQFN-10L dimension values
Dimensions
Ref.
Millimeters
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
A
0.40
0.48
0.50
0.018
0.019
0.020
A1
0.00
0.03
0.05
0.00
0.001
0.002
A2
0.13
0.005
b
0.15
0.20
0.30
0.006
0.008
0.012
b1
0.35
0.40
0.45
0.014
0.016
0.041
D
2.40
2.50
2.60
0.094
0.098
0.102
E
0.9
1.00
1.10
0.035
0.039
0.043
e
L
0.50
0.30
0.38
0.206
0.425
DocID023716 Rev 3
0.012
0.015
0.017
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Package information
HSP061-4M10
Figure 10. Footprint recommendations
(dimensions in mm)
0.40
Figure 11. Marking
0.50
0.20
0.58
H4M
1.40
2.20
Figure 12. µQFN-10L tape and reel specification
Dot identifying Pin A1 location
2.0
Ø 1.55
4.0
1.35
H4M
H4M
H4M
8.0
5.5
2.75
1.75
0.25
4.0
0.55
All dimensions are typical values in mm
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HSP061-4M10
4
Recommendation on PCB assembly
Recommendation on PCB assembly
Figure 13. Recommended stencil window position
Copper
Thickness:
100 µm
Stencil window
Footprint
10 µm
5 µm
10 µm
5 µm
380 µm
550 µm
15 µm
580 µm
550 µm
580 µm
15 µm
190 µm
15 µm
15 µm
400 µm
4.1
200 µm
Solder paste
1.
Use halide-free flux, qualification ROL0 according to ANSI/J-STD-004.
2.
“No clean” solder paste recommended.
3.
Offers a high tack force to resist component displacement during PCB movement.
4.
Use solder paste with fine particles: powder particle size 20-45 µm.
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Recommendation on PCB assembly
4.2
4.3
HSP061-4M10
Placement
1.
Manual positioning is not recommended.
2.
It is recommended to use the lead recognition capabilities of the placement system, not
the outline centering.
3.
Standard tolerance of ± 0.05 mm is recommended.
4.
3.5 N placement force is recommended. Too much placement force can lead to
squeezed out solder paste and cause solder joints to short. Too low placement force
can lead to insufficient contact between package and solder paste that could cause
open solder joints or badly centered packages.
5.
To improve the package placement accuracy, a bottom side optical control should be
performed with a high resolution tool.
6.
For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is
recommended during solder paste printing, pick and place and reflow soldering by
using optimized tools.
PCB design
1.
To control the solder paste amount, the closed via is recommended instead of open
vias.
2.
The position of tracks and open vias in the solder area should be well balanced. The
symmetrical layout is recommended, in case any tilt phenomena caused by
asymmetrical solder paste amount due to the solder flow away.
Figure 14. Printed circuit board layout recommendations
1
10
500 µm
Via to
Via to
GND
GND
5
Footprint pad
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PCB tracks
HSP061-4M10
4.4
Recommendation on PCB assembly
Reflow profile
Figure 15. ST ECOPACK® recommended soldering reflow profile for PCB mounting
240-245 °C
Temperature (°C)
250
-2 °C/s
2 - 3 °C/s
60 sec
(90 max)
200
-3 °C/s
150
-6 °C/s
100
0.9 °C/s
50
Time (s)
0
Note:
30
60
90
120
150
180
210
240
270
300
Minimize air convection currents in the reflow oven to avoid component movement.
Maximum soldering profile corresponds to the latest IPC/JEDEC J-STD-020.
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Ordering information
5
HSP061-4M10
Ordering information
Table 4. Ordering information
6
Order code
Marking
Package
Weight
Base qty
Delivery mode
HSP061-4M10
H4M
µQFN-10L
3.27 mg
3000
Tape and reel
Revision history
Table 5. Document revision history
10/11
Date
Revision
Changes
05-Sep-2012
1
Initial release.
18-Oct-2012
2
Updated VPP in Table 1.
17-Jun-2014
3
Updated Figure 12 and reformatted to current standard.
DocID023716 Rev 3
HSP061-4M10
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