HSP061-8M16
8-line ESD protection for high speed lines
Datasheet - production data
Applications
The HSP061-8M16 is designed to protect against
electrostatic discharge on sub micron technology
circuits driving:
• HDMI 1.3 and 1.4
• Digital Video Interface
• Display Port
• Serial ATA
µQFN-16L
Figure 1. Functional schematic (top view)
Features
In 1
1
16 Out 1
• Ultralarge bandwidth: 6.3 GHz
In 2
2
15 Out 2
• Low time domain reflection
In 3
3
14 Out 3
• Low leakage current: 100 nA at 25 °C
In 4
4
13 Out 4
• Extended operating junction temperature
range: -40 °C to 150 °C
In 5
5
12 Out 5
• Package size in mm: 3.3 x 1.5 x 0.55
In 6 6
11 Out 6
• RoHS compliant
In 7
7
10 Out 7
Benefits
In 8
8
9
• Ultralow capacitance: 0.6 pF
• High ESD robustness of the equipment
GND on tab
• Suitable for high density boards
Description
Complies with following standards
• MIL-STD 883G Method 3015-7 Class 3B:
– 8 kV
• IEC 61000-4-2 level 4:
– 8 kV (contact discharge)
– 15 kV (air discharge)
Out 8
The HSP061-8M16 is an 8-channel ESD array
with a rail to rail architecture designed specifically
for the protection of high speed differential lines.
The ultra-low variation of the capacitance ensures
very low influence on signal-skew. The large
bandwidth and the low reflection make it
compatible with 3.4 Gbps.
The device is packaged in µQFN-16L with a
400 µm pitch, which minimizes the PCB area.
April 2014
This is information on a product in full production.
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Characteristics
1
HSP061-8M16
Characteristics
Table 1. Absolute maximum ratings Tamb = 25 °C
Symbol
Parameter
Value
Unit
8
20
kV
IEC 61000-4-2 contact discharge
IEC 61000-4-2 air discharge
VPP
Peak pulse voltage(1)
Ipp
Repetitive peak pulse current (8/20 µs)
3
A
Tj
Operating junction temperature range
-40 to +150
°C
Tstg
Storage temperature range
-65 to +150
°C
TL
Maximum lead temperature for soldering during 10 s
260
°C
1. Measurements done on IEC 61000-4-2 test bench. For further details see Application note AN3353.
Table 2. Electrical characteristics Tamb = 25 °C
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
VBR
Breakdown voltage
IR = 1 mA
IRM
Leakage current
VRM = 3 V
VCL
Clamping voltage
IEC 61000-4-2, +8 kV contact (IPP
= 30 A), measured at 30 ns
14
Capacitance (input/output to
ground)
VI/O = 0 V F = 200 to 3000 MHz,
VOSC = 30 mV
0.6
0.8
pF
Capacitance variation
(input/output to ground)
VI/O = 0 V F = 200 to 3000 MHz,
VOSC = 30 mV
0.03
0.05
pF
Cut-off frequency
-3dB
6.3
CI/O - GND
ΔCI/O - GND
fC
ZDiff
Differential impedance
tr = 200 ps (10 Z0 Diff = 100 Ω
6
Unit
V
100
90%)(1)
90
nA
V
GHz
105
Ω
1. HDMI specification conditions. This information can be provided for other applications. Please contact your local ST office.
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HSP061-8M16
Characteristics
Figure 2. Leakage current versus junction
temperature (typical values)
Figure 3. S21 attenuation measurement
0
1000.0
db
IR (nA)
-1
-2
100.0
-3
-4
10.0
-5
1.0
VR = V RM = 3 V
-6
Tj (°C)
-7
0.1
25
50
75
100
125
F (Hz)
150
-8
10MHz
Figure 4. Differential impedance (Zdiff)(1)
30MHz
100MHz 300MHz
1GHz
3GHz
Figure 5. Eye diagram, HDMI mask, at 3.4 Gbps
per channel(1)
tr = 200 ps (10% - 90%)
12.5 Ω /div
Vertical : 200 mV / div
Horizontal : 50 ps / div
Z0Diff = 100 Ω-
1. HDMI specification conditions. This information can be provided for other applications. Please contact your local ST office.
Figure 6. ESD response to IEC 61000-4-2
(+8 kV contact discharge)
Figure 7. ESD response to IEC 61000-4-2
(-8 kV contact discharge)
50 V / div
20 ns / div
20 GS / s
50 V / div
20 ns / div
20 GS / s
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Package information
2
HSP061-8M16
Package information
•
Epoxy meets UL94, V0
•
Lead-free package
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 8. µQFN-16L dimensions
Dimensions
Ref.
e
INDEX AREA
(D/2 x E/2)
E2
K
E
D2
L
Inches
Min.
Typ.
Max.
Min.
Typ.
Max.
A
0.50
0.55
0.60 0.020 0.022 0.024
A1
0.00
0.02
0.05 0.000 0.001 0.002
b
0.15
0.20
0.25 0.006 0.008 0.010
D
3.20
3.30
3.40 0.126 0.130 0.134
D2
2.45
2.60
2.70 0.096 0.102 0.106
E
1.40
1.50
1.60 0.055 0.059 0.063
E2
0.20
0.35
0.45 0.008 0.014 0.018
b
EXPOSED PAD
PIN # 1 ID
Millimeters
D
A1
A
e
Figure 9. Footprint recommendations
(dimensions in mm)
0.40
0.40
K
0.20
L
0.20
0.008
0.30
0.40 0.008 0.012 0.016
Figure 10. Marking
0.20
0.45
XX
0.40
0.85 1.75
2.80
3.00
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0.016
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WW
YP
Dot: Pin 1
XX: Marking
WW: Assembly week
Y: Assembly year
P: Assembly plant
HSP061-8M16
Package information
Figure 11. µQFN-16L tape and reel specification
Dot identifying Pin A1 location
2.0
Ø 1.55
4.0
12.0
5.5
3.60
1.75
0.25
XX
WW
YP
XX
WW
YP
1.80
XX
WW
YP
4.0
0.80
All dimensions are typical values in mm
User direction of unreeling
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Recommendation on PCB assembly
HSP061-8M16
3
Recommendation on PCB assembly
3.1
Stencil opening design
1.
General recommendation on stencil opening design
a)
Stencil opening dimensions: L (Length), W (Width), T (Thickness).
Figure 12. Stencil opening dimensions
L
T
b)
W
General design rule
Stencil thickness (T) = 75 ~ 125 µm
W
Aspect Ratio = ----- ≥ 1,5
T
L×W
Aspect Area = ---------------------------- ≥ 0,66
2T ( L + W )
2.
Reference design
a)
Stencil opening thickness: 100 µm
b)
Stencil opening for central exposed pad: Opening to footprint ratio is 50%.
c)
Stencil opening for leads: Opening to footprint ratio is 90%.
Figure 13. Recommended stencil window position
4 µm
4 µm
14 µm
422 µm
450 µm
T=100 µm
192 µm
14
200 µm
µm
2800 µm
400 µm
280 µm
60 µm
Footprint
2000 µm
60 µm
400 µm
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Stencil window
Footprint
HSP061-8M16
3.2
3.3
3.4
Recommendation on PCB assembly
Solder paste
1.
Use halide-free flux, qualification ROL0 according to ANSI/J-STD-004.
2.
“No clean” solder paste recommended.
3.
Offers a high tack force to resist component displacement during PCB movement.
4.
Use solder paste with fine particles: powder particle size 20-45 µm.
Placement
1.
Manual positioning is not recommended.
2.
It is recommended to use the lead recognition capabilities of the placement system, not
the outline centering.
3.
Standard tolerance of ± 0.05 mm is recommended.
4.
3.5 N placement force is recommended. Too much placement force can lead to
squeezed out solder paste and cause solder joints to short. Too low placement force
can lead to insufficient contact between package and solder paste that could cause
open solder joints or badly centered packages.
5.
To improve the package placement accuracy, a bottom side optical control should be
performed with a high resolution tool.
6.
For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is
recommended during solder paste printing, pick and place and reflow soldering by
using optimized tools.
PCB design preference
1.
To control the solder paste amount, the closed via is recommended instead of open
vias.
2.
The position of tracks and open vias in the solder area should be well balanced. The
symmetrical layout is recommended, in case any tilt phenomena caused by
asymmetrical solder paste amount due to the solder flow away.
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Recommendation on PCB assembly
3.5
HSP061-8M16
Reflow profile
Figure 14. ST ECOPACK® recommended soldering reflow profile for PCB mounting
240-245 °C
Temperature (°C)
250
-2 °C/s
2 - 3 °C/s
60 sec
(90 max)
200
-3 °C/s
150
-6 °C/s
100
0.9 °C/s
50
Time (s)
0
Note:
8/10
30
60
90
120
150
180
210
240
270
300
Minimize air convection currents in the reflow oven to avoid component movement.
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HSP061-8M16
4
Ordering information
Ordering information
Figure 15. Ordering information scheme
HSP 06 1 - 8
M16
High speed line protection
Breakdown Voltage
Version
Number of lines
Package
µQFN-16L
Table 3. Ordering information
5
Order code
Marking
Package
Weight
Base qty
Delivery mode
HSP061-8M16
HD
µQFN-16L
12 mg
3000
Tape and reel (7”)
Revision history
Table 4. Document revision history
Date
Revision
Changes
19-Nov-2010
1
Initial release.
05-May-2011
2
Updated air discharge value and added footnote in Table 1.
03-Apr-2014
3
Reformatted to current standard.
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HSP061-8M16
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