HVLED001
Offline controller for LED lighting with constant voltage primarysensing and high power factor
Datasheet - production data
Description
The HVLED001 is an enhanced peak current
mode controller capable of controlling mainly high
power factor (HPF) flyback or buck-boost
topologies in LED drivers having an output power
up to 150 W. Some other topologies, like buck,
boost and SEPIC can also be implemented.
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SSOP10
Quasi-resonant (QR) topology
Primary side regulation of output voltage
Direct optocoupler connection for current loop
regulation with feedback disconnection
detection and disable
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Advanced features are embedded to control
either the output voltage or output current
precisely and reliably using a reduced number of
components, mainly passive. Startup and lightload conditions are managed by dedicated
operating schemes to improve the quality of
output variable regulation in the final application.
Abnormal conditions such as open circuit, output
short-circuit, input overvoltage/undervoltage, and
circuit failures such as open loop and overcurrent
of the main switch are effectively controlled.
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800 V high voltage start-up
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High power factor and low THD in universal
range
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High efficiency and output stability in wide
voltage and current range
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Low start-up and quiescent current
Programmable minimum off time
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Integrated input voltage detection for high
power factor capability and protection
triggering
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ST’s innovative high voltage technology allows
direct connection of the HVLED001 to the input
voltage in order to both start up the device and
monitor the input voltage without the need for
external components.
Features
Latch free device guarantee by smart
autoreload timer (ART)
A smart auto-recover timer (ART) function is built
in to guarantee automatic application recovery,
without loss of reliability.
Table 1. Device summary
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0 - 10 and PWM dimming compatible
Remote control pin
Order code
Package
Packaging
HVLED001
SSOP10
Tube
HVLED001TR
Tape and reel
Applications
Single stage LED drivers with high power factor
up to 75 W
Two stages LED drivers up to 150 W
January 2015
This is information on a product in full production.
DocID027333 Rev 1
1/27
www.st.com
Contents
HVLED001
Contents
1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2
Typical application - HPF flyback . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
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4.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
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Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
6
Typical electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
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Operating modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
7.1.1
Start-up mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
7.1.2
Active mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
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Stop mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Low consumption mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Control loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
7.2.1
Current sense input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.2.2
Feedback input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.2.3
Zero current detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7.2.4
Primary side regulation feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
7.2.5
Burst-mode operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.3
Gate driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.4
IC supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.5
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7.4.1
VCC supply management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.4.2
High voltage start-up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Autorestart timer (ART) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
DocID027333 Rev 1
HVLED001
Contents
7.6
7.7
Protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.6.1
Overcurrent protection (OCP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.6.2
Input overvoltage protection (I-OVP) . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.6.3
Brownout protection (BO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.6.4
Optocoupler failure protection (OFP) . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Disable and monitor feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
8
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
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Block diagram
1
HVLED001
Block diagram
Figure 1. Block diagram
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HVLED001
2
Typical application - HPF flyback
Typical application - HPF flyback
Figure 2. Typical application
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Pin settings
3
HVLED001
Pin settings
Figure 3. Pin connection
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Table 2. Pin description
Symbol Pin
HVSU
1
Description
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High voltage start-up and input voltage detection.
The pin, able to withstand 800 V, is to be tied to the input voltage using a low value resistor
(1 k typ.). It embeds the internal start-up unit that charges the capacitor connected between the
VCC pin and GND pin during the start-up and low consumption.
During the operational mode, the voltage at this pin is used to both measure the input voltage and
detect input overvoltages.
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N.C.
2
Not connected pin.
TOFF
3
A blanking time for zero voltage detection can be set applying a voltage to this pin. A minimum
blanking time is obtained leaving the pin unconnected.
4
Input for loop regulation.
The pin is intended to be directly driven by the phototransistor (emitter-grounded) of an optocoupler
and / or to the compensation network related to the output voltage primary side regulation loop.
An upper threshold VOFP detects a failure of the optocoupler.
The burst-mode and disable conditions are also related to the voltage applied to this pin.
FB
CTRL
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ZCD
5
This pin is used to disable the IC and generate the soft-start ramp.
External active circuitry can be used to turn off the application.
6
Multiple function pin able to detect the zero current instant, to sense the output voltage for primary
side regulation and the input voltage for brownout detection.
A negative-going edge triggers the MOSFET's turn on, while an internal starter unit is active to
generate the triggering signal when not externally available (e.g.: start-up).
CS
7
Input to the current sense comparator for the power regulation.
A second level overcurrent (OCP) threshold detects abnormal currents (e.g.: due to transformer's
saturation) and, on this occurrence, activates the second level overcurrent protection procedure.
GND
8
Reference pin.
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DocID027333 Rev 1
HVLED001
Pin settings
Table 2. Pin description (continued)
Symbol Pin
GD
VCC
Description
9
Gate driver output.
The output stage is able to drive the power MOSFET's and IGBT's gate.
10
Supply voltage of the IC.
Internal UVLO logic prevents the operation at voltages that are insufficient for an efficient gate
driving or signal processing.
Both a bulk capacitor (typically around 10 µF) and a high frequency filter capacitor (100 nF ceramic,
mounted as close as possible to the device) are connected between this pin and GND.
Internal clamp structure prevents accidental low energy spikes damaging the device.
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Electrical data
HVLED001
4
Electrical data
4.1
Absolute maximum ratings
Table 3. Absolute maximum ratings
Symbol
Pin
Parameter
Test condition
Min. Max. Unit
VHVSU,bd
HVSU HVSU breakdown voltage
IHVSU < 100 µA, DC
VCC = 15 V
800
V
VHVSU,neg
HVSU HVSU negative voltage
IHVSU source < 2 mA
- 0.3
V
VGD
GD
Maximum swing voltage
- 0.3
VCS
CS
Current sense applied voltage
- 0.3
VZCD
ZCD
ZCD pin voltage
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VCC
V
7
V
7
V
- 0.3
3.6
V
- 0.3
VCC
V
18
V
7
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Negative, Isource < 1 mA - 0.3
VCTRL
CTRL
CTRL voltage
VCC,MAX
VCC
IC supply voltage
VTOFF
TOFF
Maximum applied voltage
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FB voltage
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- 0.3
Where not otherwise indicated the AMR are intended when VCC > VCC,on. When
VCC < VCC,on the minimum between the indicated value and VCC + 0.3 V has to be
considered.
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Thermal data
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Note:
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VFB
V
Symbol
Table 4. Thermal data
Parameter
Value
Unit
RthJA
Thermal resistance junction to ambient
120
°C/W
TJ
Junction temperature operating range
-40 to 125
°C
Tstg
Storage temperature range
-55 to 150
°C
DocID027333 Rev 1
HVLED001
5
Electrical characteristics
Electrical characteristics
Tj = Ta = 25 °C production tested, VCC = 15 V, unless otherwise specified.
Table 5. Electrical characteristics
Symbol
Pin
Parameter
Test condition
Min.
Typ.
Max. Unit
Supply voltage
VCC
VCC,on
VCC
VCC
After turn on(1)
Operating range
Turn on threshold
9.7
(2)
Low consumption mode
(2)
VCC,shd
VCC
VCC for IC reset
Low consumption(2)
7.8
Start-up current
Start-up, VCC < VCC,on
VCC
Operating supply current
Iq
VCC
Quiescent current
VHV
VHV,op
VHVstart
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HVSU Start voltage
IVCC < 100 A
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IHV, OFF
-O
HVSU Operating voltage range
Icharge
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Low consumption mode,
CTRL < VCTRL,dis
(1)
VCC
IHV, ON
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IHV < 100 A
Icharge,su
VCC
Pr
HVSU
V
125
250
A
2.6
4
mA
330
480
A
800
V
VHV
V
46
55
V
0.15
0.5
0.9
mA
2
3.4
5
mA
VHVSU > VHvstart, VCC < 2 V
0.2
0.7
1.1
VHVSU > VHvstart, start-up,
VCC < VCC,on
2.3
4
6
18
35
VHVSU > VHvstart, VCC < 2 V
VCC charge current
VHVSU > VHvstart, start-up,
VCC < VCC,on
OFF-state leakage
current
9.2
8.5
40
Initial charging current
HVSU ON-state current
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See Figure 4: Graph 1: VCC current
consumption on page 13
HVSU Breakdown voltage
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High voltage start-up generator
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2.2
ICC
9.7
9.2
Start-up
Stop mode, FB < VFB,dis
V
8.8
Low consumption mode
activation
VCC
14
13
VCC
Istart-up
V
12
VCC,su
Supply current
18
VHVSU = 400 V, active mode
mA
A
Input voltage sensing
Vsurge
HVSU
Surge protection
threshold
(3)
Tsurge
HVSU
Max. stop state duration
after surge
VHVSU > Vsurge(4)
540
9
10
V
11
ms
2.8
V
Feedback input
VFB
FB
FB pin regulation voltage
range
Active mode(1)
VFB,ref
FB
FB reference voltage
Active mode(5), (6)
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Electrical characteristics
HVLED001
Table 5. Electrical characteristics (continued)
Symbol
Pin
kp
FB
Multiplier gain
VFB,dis
FB
IC disabling threshold
from FB
IFBsrc
FB
Parameter
Test condition
Min.
Typ.
Max. Unit
Active mode, VFB = 2.8 V,
VHVSU = 300 V(6)
0.355
0.4
0.445
Falling edge
0.35
0.5
0.75
Active mode, VZCD,off = 2.0 V,
VFB = 1.65 V
FB pin pull-up current
1
V
mA
Low consumption VFB = 0.7 V(3)
40
75
120
90
230
350
µA
IFBsnk
FB
FB pull down current
Active mode, VZCD,off = 2.7 V,
VFB = 1.65 V(3)
VBm
FB
Burst-mode threshold
Active mode(5)
0.97
1.054
1.11
V
V(4)
0.94
1.04
1.16
ms
2.75
2.95
3.5
V
90
100
110
ms
2.55
2.6
2.65
2.5
2.6
2.7
1.3
2.3
3.2
Tbm
FB
Burst-mode repetition rate VFB = 0.8
VOFP
FB
Optocoupler failure
protection threshold
Active mode(5)
TOFP
FB
Max. active mode
duration after FB
clamping
VFB > VFB,max(4)
VREF,PSR
FB
PSR loop reference
gm
FB
Transconductance
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PSR function
Current sense input
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(8)
Ob
Tamb = 25 °C(7)
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(s
Over all temperature range
VCS,lim
CS
VCS,min
CS
Current sense minimum
level
ICS
CS
Current sense pin bias
current
TLEB
CS
Leading edge blanking
VOCP
CS
Saturation protection
threshold
During Ton
TOCP
CS
Max. stop state duration
after OCP
VCS_SS
CS
VCS during SS
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Pr
(3), (7)
IFB = ±10 µA, VFB = 1.65 V(3)
Current sense reference
clamp
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VHVSU = DC voltage, VFB = 3.3 V,
1.9 V < VCTRL < 2.4 V
746
VHVSU,pk = 400 V(3)
60
(3)
20
VHVSU,pk = 130 V
VCS = 500 mV(3)
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µA
V
mS
mV
mV
2.5
5
µA
130
200
340
ns
1
1.1
1.2
V
tpulse = 1 µs, amplitude 2 V(4)
0.94
1.04
1.16
ms
VCTRL = 0.7 V
280
348
450
mV
VCTRL = Vctrl,bias
VCS,lim
ZCD input
VZCD,arm
VZCD,trig
TBLANK
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ZCD
ZCD
ZCD
ZCD arming threshold
ZCD triggering threshold
ZCD blanking time
Positive-going edge(7)
Negative-going
VTOFF >
edge(7)
0.42
0.5
0.6
V
0.24
0.3
0.38
V
VTOFF,fix(3) (9)
,
(9)
VTOFF = 0 V
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200
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290
µs
HVLED001
Electrical characteristics
Table 5. Electrical characteristics (continued)
Symbol
Pin
Parameter
Test condition
VZCD,cl_l
ZCD
ZCD negative clamping
voltage
IZCD src = 1 mA
IZCDb
ZCD
ZCD pin biasing current
VZCD = 0.1 to 2.6 V(3)
IBO
ZCD
Brownout detection level
Sourcing during on time(3)
Min.
Typ.
Max. Unit
-230
-135
mV
1
100
IBO(4)
TBO
ZCD
Brownout detection time
IZCD <
Td,ZCD
ZCD
ZCD propagation delay
Measured from last VZCD,trig
crossing and GD rising edge(3)
90
100
µA
110
Trec
(4)
ms
300
ns
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Timing
Recovery time after opto
failure, analogue disable
or brownout
µA
2.2
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2.5
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Gate driver
eP
2.8
VGDH
GD
Output high voltage
IGD,source = 5 mA
VGDL
GD
Output low voltage
IGD,sink = 5 mA
Isource
GD
Output source peak
current
VGD = 7.5 V(3)
Isink
GD
Output sink peak current
VGD = 7.5 V(3)
Tf
GD
Fall time
CGD = 1 nF, from 13.5 V to 1.5 V
15
ns
Tr
GD
Rise time
CGD = 1 nF, from 1.5 V to 13.5 V
30
ns
VGD,shd
GD
Maximum voltage during
shutdown
Vcc < VCC,shd, IGD = 2 mA
1
2
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CTRL input
14.5
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V
0.1
V
0.3
A
0.6
A
CTRL Disabling threshold
Negative-going edge(10)
0.4
0.5
0.6
V
Vadis
CTRL Timed disabling threshold
(10)
2.4
2.6
2.85
V
TADIS
Max. operating interval
CTRL after analog disable
feature triggering
VCTRL > Vadis(4)
90
100
110
ms
1.85
2.05
2.25
VCTRL,dis
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Tamb = 25 °C(10)
Vctrl,bias
CTRL CTRL biasing voltage
Ictrl,bias
CTRL CTRL biasing current
VCTRL = 0 V
CTRL Internal parallel resistor
(11)
Vctrl,pd
Pin voltage during low
CTRL consumption (power
good)
Low consumption, ICTRL = 0.2 mA
Veoss
CTRL End of soft-start level
(10)
1.7
(1)
GND
Rctrl
Over whole temp. range
(3)
1.75
5
2.35
10
15
205
1.8
V
µA
k
0.2
V
1.9
V
3.3
V
TOFF characteristics
VTOFF
VTOFF,fix
TOFF Operating range
TOFF
Minimum fixed TBLANK
voltage
(3)
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Electrical characteristics
HVLED001
Table 5. Electrical characteristics (continued)
Symbol
koff
ITOFFpu
Pin
Parameter
Test condition
Min.
TOFF TOFF characteristic slope (3)
TOFF Pull-up current
5
Max. Unit
100
µs /
V
12
(3)
VTOFF,bias TOFF Internal bias voltage
Typ.
20
µA
2.4
V
1. Operating conditions not associated with specific production test.
2. Parameters in tracking group 1.
3. Parameters not tested in production.
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4. Parameter calculated.
5. Parameters in tracking group 2.
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6. kp parameter includes the overall tolerances of the multiplier block defined as per note 8.
7. Parameters in tracking group 3.
VHVSU
8.
VCS = kp -------------------------------- VFB – VFB, ref OR VCS, min,
VHVSU, pk
VHVSU,pk indicates the maximum value of VHVSU.
9. TBLANK = MAX {koff • (VTOFF,fix - VTOFF)}.
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10. Parameters in tracking group 4.
11. VCTRL,bias/ICTRL,bias.
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HVLED001
6
Typical electrical characteristics
Typical electrical characteristics
Figure 4. Graph 1: VCC current consumption
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Application information
HVLED001
7
Application information
7.1
Operating modes
The HVLED001 QR flyback controller is able to operate either as a single stage high power
factor (HPF) flyback controller or as a DC/DC flyback controller in dual stages topologies. Its
enhanced features are mainly intended to simplify the design and the management of
constant current applications (LED drivers).
Application schematics of the two main topologies are reported in Figure 5 and Figure 6.
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Figure 5. High power factor flyback - constant output current
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HVLED001
Application information
Figure 6. High power factor flyback – primary side regulated constant output voltage
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The HVLED001 has four main operating modes: the start-up mode, active mode, stop mode
and low consumption mode.
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7.1.1
Start-up mode
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This state is entered to begin the switching activity (during application's turn on or exiting
from low consumption state). The HVSU is involved into the mechanism of VCC charging;
all other peripherals, except the UVLO and logic supply, are turned off to minimize the startup time.
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During this state the CTLR pin is internally pulled to ground.
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Application information
HVLED001
Figure 7. Initial start-up phase
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7.1.2
Active mode
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It is the normal operational mode. During this state the external MOSFET is driven
accordingly to signals coming from the application in order to regulate the desired output
parameter in the closed loop (peak current control method).
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7.1.3
16/27
The active mode is exited when abnormal conditions are present or the VCC drops below the
VCC,su threshold. The HVSU is inactive during the active mode.
Stop mode
This state is intended to stop the switching activity without turning off the entire function set,
to quickly restart when abnormal or disabling conditions end. During this state the power
consumption is not minimized and the soft-start procedure is not enabled.
DocID027333 Rev 1
HVLED001
7.1.4
Application information
Low consumption mode
This state is intended to stop the switching activity reducing the power consumption to
a minimum level. The soft-start procedure is set to be performed when abnormal or
disabling condition is removed.
During this state the VCC is kept between VCC,su and VCC,on by the high voltage start-up
unit (HVSU) delivering Icharge to the output capacitor.
Note:
Important: HVSU charges VCC so any other external voltage (including auxiliary winding)
must be decoupled using a 1N4148 diode.
7.1.5
Soft-start
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The soft-start phase is entered after the start-up and every time the IC exits from low
consumption mode. This phase lasts until the voltage at the CTRL pin reaches the “end of
soft-start” level (Veoss).
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The current sense maximum limit is derived from this voltage, therefore the charging time of
a capacitor placed between the CTRL pin and GND defines the soft-start time.
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During this phase some protections (optocoupler failure protection (OFP), brownout (BO)
and analog disable (AN_DIS) are ignored.
7.2
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Control loop
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The control loop is based on the current mode quasi-resonant flyback control scheme and is
therefore performed turning off the MOSFET when the peak of its source current reaches
the threshold set by the control loop, and turning the MOSFET on in correspondence of the
resonant valley following the primary side demagnetization input.
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A detail of the block involved into this scheme is shown in Figure 8.
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Application information
7.2.1
HVLED001
Current sense input
The peak of the primary current is read across a shunt resistor placed between the
MOSFET's source and compared with a threshold equal to:
Equation 1
V HVSU
V CS + k p ------------------------------- V FB – V FB ref
V HVSU pk
Where the term VHVSU,pk is the maximum value of the HVSU voltage within around 20 ms
and is used to compensate the dependency on the input voltage of the open loop gain
transfer function. The gain kp collects all the proportional terms between the HVSU voltage
and CS threshold.
A leading edge blanking time (LEB) is applied after MOSFET's turn on.
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The Vcs signal is upper limited to a value that depends on the CTRL voltage and is lower
limited to a level defined as:
Equation 2
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VCS,min = VHVSU • 0.15
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A second level OCP threshold is present to temporarily stop the switching activity in case of
inductor saturation.
7.2.2
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Feedback input
The FB pin is intended to be connected directly to the collector of the optocoupler that
provides the galvanic insulation to the control loop as well as to act as compensation output
for the primary side control (PSR) loop of the output voltage (see Section 7.2.4). A suitable
RC network can be placed between FB and ground to compensate the control loop.
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In case of constant output voltage applications, the PSR loop can be used to regulate the
output voltage saving the secondary side error amplifier.
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The FB voltage is also used as an input parameter for the burst-mode operation described
in Section 7.2.5.
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7.2.3
The pin embeds protection to prevent from the operation with the failed optocoupler and can
be pulled to ground to interrupt the switching activity (stop mode).
Zero current detection
The zero level detection is performed by a trigger logic that, once armed by a rising voltage,
is sensitive to falling edges. The advanced ZCD logic is able to discriminate between the
normal operation, output short-circuit or start-up condition.
An internal blanking time prevents any triggering signal to activate the MOSFET's at the
very beginning of the off time, where spurious resonances could be present. As a result, the
first falling edge occurring after the blanking time turns on the MOSFET.
To ensure a proper operation, the transformer has to be designed to guarantee that the
inductor's demagnetization time is longer than TBLANK (at VTOFF > VTOFF,fix) when the
VCS value (Equation 1: ) is higher than 0.3 V (typ.).
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HVLED001
Application information
The TOFF pin is intended to select the blanking time duration. If the pin is left unconnected
a fixed blanking time is provided.
The TBLANK value depends on Toff voltage (Figure 9).
Figure 9. TBLANK voltage vs Tblank time (typical)
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An internal starter provides the triggering signal whenever a valid arming signal is not
detected.
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The ZCD pin embeds a negative clamp to limit the negative-going current.
7.2.4
Primary side regulation feature
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The ZCD pin is also is used as input of the PSR error amplifier (E/A). The reference voltage
of this loop is internally fixed to VREF,PSR and applied to the non-inverting input of the E/A.
The output of such error amplifier is connected to the FB pin where the relevant
compensation network has to be connected.
In a flyback or buck-boost topology the output voltage can be read from the primary side
using an auxiliary winding: in this case the output voltage is obtained using the following
equation:
Equation 3
N SEC
Rzcd
Vout = VREF PSR -------------- 1 + --------------
N AUX
Rfb
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Application information
HVLED001
The internal small signal model of the PSR E/A is obtained considering the voltage gain
(GV = 73 dB) and the gain bandwidth product (GBWP = 1 MHz) and is illustrated in
Figure 10.
Figure 10. PSR E/A small signal model
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7.2.5
Burst-mode operation
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As soon as the FB pin drops below Vbm, the burst-mode operating mode is entered. The
switching activity is temporarily interrupted until the FB voltage returns above the Vbm
value. An internal hysteresis improves the noise rejection of this feature. The FB biasing
current follows the same rules as in the normal operation; therefore the burst-mode
operation is either defined by the secondary side error amplifier when an optocoupler is
used or by the internal error amplifier if the PSR operation is on.
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An internal biasing mean prevents the FB voltage to drop below disabling thresholds during
the inactive state.
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7.3
Gate driver
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The output stage, connected to VCC potential and capable of the 300 mA source and the
600 mA sink current, is suitable to drive high current MOSFETs. The resulting managed
power can be greater than 150 W.
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7.4
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IC supply management
The IC's voltage supply is managed by the UVLO circuitry together with the high voltage
start-up unit and reference generators. These logics define also supply currents during
different operating conditions.
DocID027333 Rev 1
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7.4.1
Application information
VCC supply management
The IC is designed to operate with a range of supply voltage to ensure an optimum gate
driving. An active limiting device is embedded to prevent low energy fluctuations to bring the
VCC voltage above the technological constraints.
Both the active mode and the low consumption mode exhibits very low supply currents in
order to meet energy saving regulation.
The VCC pin can be driven independently from the HVSU pin's connection, for example
when auxiliary supply voltage is present. In this case the HVSU pin will be used solely to
monitor input voltage.
A bulk capacitor, having a capacitance of around 10 µF, followed by a ceramic capacitor,
having a typical capacitance of 100 nF and connected very tight to the VCC pin, are
necessary to properly sustain the Vcc voltage during all operating phases.
7.4.2
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High voltage start-up
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High voltage start-up (HVSU) circuitry is primarily intended to provide the start-up current to
the VCC pin and maintain the IC responsive during low consumption modes.
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This structure is able to sustain at least 800 V to avoid any damage in case of a surge or
a burst on the stage's input.
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The overall structure is off until input voltage reaches the VHVSU, start threshold, after that
it sources a minimum current (Icharge,su) to charge the VCC pin up to Vcc,su threshold.
This condition prevents the IC from severe damaging effects in case of a short-circuit on the
VCC pin.
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At this VCC voltage a higher current (Icharge) is provided to VCC to reach the VCC,on
threshold. At this occurrence the active mode is invoked and the HVSU is turned off.
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During other active mode's phases and the stop mode the HVSU is off.
If the low consumption mode is entered, the HVSU unit is turned on.
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Table 6 summarizes the HVSU behavior in all IC conditions.
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Table 6. HVSU operating modes
Operating condition (see Figure 7)
VCC range
All states if VIN < VHVSU,ON
-
OFF Icharge,su Icharge
X
0 V… Vcc,su
Start-up (logic start-up)
X
Vcc,su … Vcc,on
X
Active mode (no switching period)
Vcc,su … VCC,MAX
X
Active mode (switching period)
Vcc,su … VCC,MAX
X
Stop mode
Vcc,su … VCC,MAX
X
Start-up (IC start-up)
Low consumption mode
Low consumption mode (after the end of entering conditions)
Vcc,su Vcc,on (rising)
X
Vcc,su … Vcc,on
X
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Application information
7.5
HVLED001
Autorestart timer (ART)
The autorestart timer unit is responsible for the generation of the protection's intervals and
of the restart times after the low consumption mode. A summary of all possible combination
of times is described in each protection paragraph.
7.6
Protections
A comprehensive set of protections is embedded to ensure a high level of reliability of the
final application using a limited number of components.
7.6.1
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Overcurrent protection (OCP)
To prevent any damage to active components in case of inductor's saturation the MOSFET
is immediately turned off by the fast OCP protection. At this occurrence the IC temporarily
enters the stop state for a time equal to TOCP.
7.6.2
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Input overvoltage protection (I-OVP)
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Disturbances of the input voltage like surges or bursts may increase the voltage applied to
the transformer primary side. Worst, an excessive input voltage could be applied to the
application. These occurrences may result into MOSFET damage during the off-state when
the drain voltage rises to Vin plus reflected voltage, eventually above the maximum absolute
rating of the MOSFET itself.
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An input voltage higher than VSurge, measured by HVSU structure, immediately stops the
IC. If the extra voltage diminishes before Tsurge the device restarts immediately without
activating the start-up procedure, otherwise the low consumption mode is entered until the
input voltage returns below the safety threshold. An internal hysteresis improves the noise
rejection of this feature. In the latter case the ART activates the start-up procedure.
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Brownout protection (BO)
The current sourced by the ZCD pin's negative clamp during on time is compared to
a minimum value to determine whether the input voltage is lower than the input range
specification (brownout protection). If a value lower than IBO for a time longer than TBO,
managed by the ART, is detected, the IC is stopped for Trec and then restarted.
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7.6.4
When the protection is triggered, the ART performs the autorelaoding procedure after Trec.
The brownout protection is active during the active mode, but blanked during the soft-start.
Optocoupler failure protection (OFP)
This protection detects either the absence of the optocoupler control (no pull-down) or the
overload condition for more than a time equal to TOFP and switches off the application
putting the device in the low consumption mode. This prevents the output power from rising
above excessive values due to the loss of control.
The ART manages the TOFP interval and performs the auto-reloading procedure after Trec.
The OFP is active during the active mode, but blanked during the soft-start.
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7.7
Application information
Disable and monitor feature
Several disabling means are available to externally disable the IC:
1.
Driving FB pin low (FB_DIS): this occurrence immediately stops the switching activity
until the FB voltage returns above the threshold.
2.
Driving CTRL pin low (CTRL_DIS): this occurrence immediately puts the device in
the low consumption mode; when the CTLR pin is left free, the internal biasing mean
pulls-up the voltage above the threshold entering the soft-start procedure.
3.
Driving CTRL pin high (AN_DIS): a CTRL voltage higher than the threshold for a time
longer than Tdis causes the device to enter the low consumption mode. The ART timer
performs an auto-recover procedure after Trec.
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Anytime the HVLED001 device enters low consumption, an internal pull-down discharges
the soft-start capacitor and resets the soft-start time.
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Package information
8
HVLED001
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.
Figure 11. SSOP10 package outline
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8140761 rev. A
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Package information
Table 7. SSOP10 package mechanical data
Dimensions (mm)
Symbol
Min.
Typ.
Max.
A
1.75
A1
0.10
0.25
A2
1.25
b
0.31
0.51
c
0.17
0.25
D
4.80
4.90
E
5.80
6
E1
3.80
3.90
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0.25
L
0.40
K
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Revision history
9
HVLED001
Revision history
Table 8. Document revision history
Date
Revision
13-Jan-2015
1
Changes
Initial release.
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IMPORTANT NOTICE – PLEASE READ CAREFULLY
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acknowledgement.
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Purchasers are solely responsible for the choice, selection, and use of ST products and ST assumes no liability for application assistance or
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No license, express or implied, to any intellectual property right is granted by ST herein.
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